From ee218a9203fc45ceb3d738a3459fb80517e0f90f Mon Sep 17 00:00:00 2001 From: David Ung Date: Fri, 13 May 2005 15:24:35 +0000 Subject: mips.h (processor_type): Add new PROCESSOR_4KP name. * config/mips/mips.h (processor_type): Add new PROCESSOR_4KP name. * config/mips/mips.c: Add 4km alias. * config/mips/mips.md: Add 4kp to cpu attrib and include 4k.md. * config/mips/4k.md: New file, add 4Kc/4Kp DFA pipeline description. From-SVN: r99664 --- gcc/ChangeLog | 9 +++ gcc/config/mips/4k.md | 154 ++++++++++++++++++++++++++++++++++++++++++++++++ gcc/config/mips/mips.c | 3 +- gcc/config/mips/mips.h | 1 + gcc/config/mips/mips.md | 3 +- 5 files changed, 168 insertions(+), 2 deletions(-) create mode 100644 gcc/config/mips/4k.md (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 03261dc..6082e74 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2005-05-13 David Ung + + * config/mips/mips.h (processor_type): Add new PROCESSOR_4KP + name. + * config/mips/mips.c: Add 4km alias. + * config/mips/mips.md: Add 4kp to cpu attrib and include 4k.md. + * config/mips/4k.md: New file, add 4Kc/4Kp DFA pipeline + description. + 2005-05-13 Jan Hubicka * c-decl.c (finish_function): Suppress "control reaches end of diff --git a/gcc/config/mips/4k.md b/gcc/config/mips/4k.md new file mode 100644 index 0000000..a580c9e7 --- /dev/null +++ b/gcc/config/mips/4k.md @@ -0,0 +1,154 @@ +;; DFA-based pipeline descriptions for MIPS32 4K processor family +;; Contributed by Nigel Stephens (nigel@mips.com) +;; and David Ung (davidu@mips.com) +;; +;; References: +;; "MIPS32 4K Processor Core Family Software User's Manual, +;; Doc no: MD00016, Rev 1.18, Nov 15, 2004." +;; +;; 4Kc - pipelined multiplier and translation lookaside buffer (TLB) +;; 4km - pipelined multiplier and block address translator (BAT) +;; 4kp - non-pipelined multiplier and block address translator (BAT) +;; +;; Copyright (C) 2005 Free Software Foundation, Inc. +;; +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify it +;; under the terms of the GNU General Public License as published +;; by the Free Software Foundation; either version 2, or (at your +;; option) any later version. + +;; GCC is distributed in the hope that it will be useful, but WITHOUT +;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +;; License for more details. + +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING. If not, write to the +;; Free Software Foundation, 59 Temple Place - Suite 330, Boston, +;; MA 02111-1307, USA. + +(define_automaton "r4k_cpu, r4k_mdu") + +;; Integer execution unit. +(define_cpu_unit "r4k_ixu_arith" "r4k_cpu") +(define_cpu_unit "r4k_ixu_mpydiv" "r4k_mdu") + +(define_insn_reservation "r4k_int_load" 2 + (and (eq_attr "cpu" "4kc,4kp") + (eq_attr "type" "load")) + "r4k_ixu_arith") + +(define_insn_reservation "r4k_int_prefetch" 1 + (and (eq_attr "cpu" "4kc,4kp") + (eq_attr "type" "prefetch")) + "r4k_ixu_arith") + +(define_insn_reservation "r4k_int_store" 1 + (and (eq_attr "cpu" "4kc,4kp") + (eq_attr "type" "store")) + "r4k_ixu_arith") + +;; 4Kc/4Km +;; unsigned divide - 8/16/24/32 bit operand have latencies 9/17/25/33 +;; signed divide - 8/16/24/32 bit operand have latencies 10/18/26/34 +(define_insn_reservation "r4k_idiv_4kc" 34 + (and (eq_attr "cpu" "4kc") + (and (eq_attr "type" "idiv") + (eq_attr "mode" "!DI"))) + "r4k_ixu_arith+(r4k_ixu_mpydiv*34)") + +;; 4Kp +;; unsigned divide - 33 +;; signed divide - 33-35 +(define_insn_reservation "r4k_idiv_4kp" 35 + (and (eq_attr "cpu" "4kp") + (and (eq_attr "type" "idiv") + (eq_attr "mode" "!DI"))) + "r4k_ixu_arith+(r4k_ixu_mpydiv*35)") + +;; 4Kc/4Km fast 32x32 multiply +;; 16x32 is faster, but there's no way to detect this +(define_insn_reservation "r4k_mult_4kc" 2 + (and (eq_attr "cpu" "4kc") + (and (eq_attr "type" "imul,imadd") + (eq_attr "mode" "SI"))) + "r4k_ixu_arith+(r4k_ixu_mpydiv*2)") + +;; 4Kc/4Km MUL has 2 cycle latency, but has the special property that it will +;; stall the integer unit pipeline. MUL 16x16 or 32x16 forces 1 cycle stall, +;; while MUL 32x32 forces 2 cycle stall. If next insn use the result, an +;; additional stall is forced. +(define_insn_reservation "r4k_mul_4kc" 4 + (and (eq_attr "cpu" "4kc") + (and (eq_attr "type" "imul3") + (eq_attr "mode" "SI"))) + "(r4k_ixu_arith+r4k_ixu_mpydiv)*3") + +;; 4Kp slow iterative 2-op MULT +;; Latency of 32 if next insn is MADD/MSUB,MFHI/MFLO. +;; Repeat rate of 33 cycles. +(define_insn_reservation "r4k_mult_4kp" 32 + (and (eq_attr "cpu" "4kp") + (and (eq_attr "type" "imul") + (eq_attr "mode" "SI"))) + "r4k_ixu_arith+(r4k_ixu_mpydiv*32)") + +;; 4Kp slow iterative 3-op MUL +;; Latency of 32 cycles, but stalls the whole pipeline until complete. +(define_insn_reservation "r4k_mul_4kp" 32 + (and (eq_attr "cpu" "4kp") + (and (eq_attr "type" "imul3") + (eq_attr "mode" "SI"))) + "(r4k_ixu_arith+r4k_ixu_mpydiv)*32") + +;; 4Kp slow iterative MADD +;; Latency of 34 if next use insn is MADD/MSUB,MFHI/MFLO. +;; Repeat rate of 35 cycles. +(define_insn_reservation "r4k_madd_4kp" 34 + (and (eq_attr "cpu" "4kp") + (and (eq_attr "type" "imadd") + (eq_attr "mode" "SI"))) + "r4k_ixu_arith+(r4k_ixu_mpydiv*34)") + +;; Move to HI/LO -> MADD/MSUB,MFHI/MFLO has a 1 cycle latency. +(define_insn_reservation "r4k_int_mthilo" 1 + (and (eq_attr "cpu" "4kc,4kp") + (eq_attr "type" "mthilo")) + "r4k_ixu_arith+r4k_ixu_mpydiv") + +;; Move from HI/LO -> integer operation has a 2 cycle latency. +(define_insn_reservation "r4k_int_mfhilo" 2 + (and (eq_attr "cpu" "4kc,4kp") + (eq_attr "type" "mfhilo")) + "r4k_ixu_arith+r4k_ixu_mpydiv") + +;; All other integer insns. +(define_insn_reservation "r4k_int_alu" 1 + (and (eq_attr "cpu" "4kc,4kp") + (eq_attr "type" "arith,condmove,shift,const,nop,slt")) + "r4k_ixu_arith") + +(define_insn_reservation "r4k_int_branch" 1 + (and (eq_attr "cpu" "4kc,4kp") + (eq_attr "type" "branch")) + "r4k_ixu_arith") + +(define_insn_reservation "r4k_int_jump_4k" 1 + (and (eq_attr "cpu" "4kc,4kp") + (eq_attr "type" "jump,call")) + "r4k_ixu_arith") + +;; mfcx/mtcx - non FPU +;; (Disabled until we add cop0 support) +;; (define_insn_reservation "r4k_int_cop" 2 +;; (and (eq_attr "cpu" "4kc,4kp") +;; (eq_attr "type" "cop0")) +;; "r4k_ixu_arith") + +;; Unknown or multi - single issue +(define_insn_reservation "r4k_unknown" 1 + (and (eq_attr "cpu" "4kc,4kp") + (eq_attr "type" "unknown,multi")) + "r4k_ixu_arith+r4k_ixu_mpydiv") diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 622f704..9faddde 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -695,7 +695,8 @@ const struct mips_cpu_info mips_cpu_info_table[] = { /* MIPS32 */ { "4kc", PROCESSOR_4KC, 32 }, - { "4kp", PROCESSOR_4KC, 32 }, /* = 4kc */ + { "4km", PROCESSOR_4KC, 32 }, /* = 4kc */ + { "4kp", PROCESSOR_4KP, 32 }, /* MIPS32 Release 2 */ { "m4k", PROCESSOR_M4K, 33 }, diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 91a3b0b..aeadac3 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -34,6 +34,7 @@ Boston, MA 02111-1307, USA. */ enum processor_type { PROCESSOR_DEFAULT, PROCESSOR_4KC, + PROCESSOR_4KP, PROCESSOR_5KC, PROCESSOR_20KC, PROCESSOR_24K, diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 1473f55..5d58b73 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -266,7 +266,7 @@ ;; Attribute describing the processor. This attribute must match exactly ;; with the processor_type enumeration in mips.h. (define_attr "cpu" - "default,4kc,5kc,20kc,24k,24kx,m4k,r3000,r3900,r6000,r4000,r4100,r4111,r4120,r4130,r4300,r4600,r4650,r5000,r5400,r5500,r7000,r8000,r9000,sb1,sr71000" + "default,4kc,4kp,5kc,20kc,24k,24kx,m4k,r3000,r3900,r6000,r4000,r4100,r4111,r4120,r4130,r4300,r4600,r4650,r5000,r5400,r5500,r7000,r8000,r9000,sb1,sr71000" (const (symbol_ref "mips_tune"))) ;; The type of hardware hazard associated with this instruction. @@ -500,6 +500,7 @@ (define_cpu_unit "alu" "alu") (define_cpu_unit "imuldiv" "imuldiv") +(include "4k.md") (include "24k.md") (include "3000.md") (include "4000.md") -- cgit v1.1