From ebade076e750e589043e25b83bb1d421143c2848 Mon Sep 17 00:00:00 2001 From: Falk Hueffner Date: Sat, 1 May 2004 14:26:28 +0200 Subject: alpha.md (builtin_insbl, [...]): Disallow 0 as first input operand. * config/alpha/alpha.md (builtin_insbl, builtin_inswl, builtin_insll): Disallow 0 as first input operand. From-SVN: r81387 --- gcc/ChangeLog | 5 +++++ gcc/config/alpha/alpha.md | 6 +++--- 2 files changed, 8 insertions(+), 3 deletions(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d442d30..2b79a6c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2004-05-01 Falk Hueffner + * config/alpha/alpha.md (builtin_insbl, builtin_inswl, + builtin_insll): Disallow 0 as first input operand. + +2004-05-01 Falk Hueffner + * config/alpha/alpha.c (alpha_rtx_costs): Fix shiftadd costs. 2004-05-01 Ulrich Weigand diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 64c88e3..3d3b731 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -7185,7 +7185,7 @@ (define_expand "builtin_insbl" [(match_operand:DI 0 "register_operand" "") - (match_operand:DI 1 "reg_or_0_operand" "") + (match_operand:DI 1 "register_operand" "") (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { @@ -7201,7 +7201,7 @@ (define_expand "builtin_inswl" [(match_operand:DI 0 "register_operand" "") - (match_operand:DI 1 "reg_or_0_operand" "") + (match_operand:DI 1 "register_operand" "") (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { @@ -7217,7 +7217,7 @@ (define_expand "builtin_insll" [(match_operand:DI 0 "register_operand" "") - (match_operand:DI 1 "reg_or_0_operand" "") + (match_operand:DI 1 "register_operand" "") (match_operand:DI 2 "reg_or_8bit_operand" "")] "" { -- cgit v1.1