From dda49daffdfdbb10768cd4b89c7c349d3dd45415 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 20 Apr 2016 19:45:49 +0000 Subject: Add -mtune-ctrl=sse_typeless_stores to avx256-unaligned-store-2.c Since avx256-unaligned-store-2.c scans typeless SSE stores, add -mtune-ctrl=sse_typeless_stores to enable typeless SSE stores. * gcc.target/i386/avx256-unaligned-store-2.c: Add -mtune-ctrl=sse_typeless_stores. From-SVN: r235296 --- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) (limited to 'gcc') diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index a9dc717..1bb9411 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,10 @@ 2016-04-20 H.J. Lu + * gcc.target/i386/avx256-unaligned-store-2.c: Add + -mtune-ctrl=sse_typeless_stores. + +2016-04-20 H.J. Lu + * gcc.target/i386/avx256-unaligned-load-1.c: Update load scan. 2016-04-20 Bin Cheng diff --git a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c index 817be17..87285c6 100644 --- a/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c +++ b/gcc/testsuite/gcc.target/i386/avx256-unaligned-store-2.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! ia32 } } } */ -/* { dg-options "-O3 -dp -mavx -mavx256-split-unaligned-store -mno-prefer-avx128" } */ +/* { dg-options "-O3 -mtune-ctrl=sse_typeless_stores -dp -mavx -mavx256-split-unaligned-store -mno-prefer-avx128" } */ #define N 1024 -- cgit v1.1