From dca1376799471fb6005a43f3a8836f45db5b78c9 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 30 Nov 2005 09:30:48 +0100 Subject: ia64.c (ia64_expand_atomic_op): Only use fetchadd{4,8}.acq instruction if CODE is PLUS or MINUS... * config/ia64/ia64.c (ia64_expand_atomic_op): Only use fetchadd{4,8}.acq instruction if CODE is PLUS or MINUS, for MINUS negate VAL. From-SVN: r107703 --- gcc/ChangeLog | 6 ++++++ gcc/config/ia64/ia64.c | 7 ++++++- 2 files changed, 12 insertions(+), 1 deletion(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1dee38e..b7067e9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2005-11-30 Jakub Jelinek + + * config/ia64/ia64.c (ia64_expand_atomic_op): Only use + fetchadd{4,8}.acq instruction if CODE is PLUS or MINUS, for MINUS + negate VAL. + 2005-11-30 Paolo Bonzini * simplify-rtx.c (simplify_plus_minus): Remove final parameter. diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index 7267625..a07cc6e 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -2039,8 +2039,13 @@ ia64_expand_atomic_op (enum rtx_code code, rtx mem, rtx val, enum insn_code icode; /* Special case for using fetchadd. */ - if ((mode == SImode || mode == DImode) && fetchadd_operand (val, mode)) + if ((mode == SImode || mode == DImode) + && (code == PLUS || code == MINUS) + && fetchadd_operand (val, mode)) { + if (code == MINUS) + val = GEN_INT (-INTVAL (val)); + if (!old_dst) old_dst = gen_reg_rtx (mode); -- cgit v1.1