From da7343a6f48c6813a29640fec744b0a236b6540f Mon Sep 17 00:00:00 2001 From: Eric Botcazou Date: Wed, 10 Mar 2021 12:02:14 +0100 Subject: Fix miscompilation of Ada runtime on 64-bit SPARC Returning a REGMODE_NATURAL_SIZE of 4 for DFmode in 64-bit mode is just asking for trouble because sub-word SUBREGs are always treated differently than the others, in particular by the register allocator. gcc/ * config/sparc/sparc.c (sparc_regmode_natural_size): Return 4 for float and vector integer modes only if the mode is not larger. --- gcc/config/sparc/sparc.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) (limited to 'gcc') diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index f355793..f150417 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -13585,23 +13585,18 @@ sparc_expand_vcond (machine_mode mode, rtx *operands, int ccode, int fcode) emit_insn (gen_rtx_SET (operands[0], bshuf)); } -/* On sparc, any mode which naturally allocates into the float +/* On the SPARC, any mode which naturally allocates into the single float registers should return 4 here. */ unsigned int sparc_regmode_natural_size (machine_mode mode) { - int size = UNITS_PER_WORD; + const enum mode_class cl = GET_MODE_CLASS (mode); - if (TARGET_ARCH64) - { - enum mode_class mclass = GET_MODE_CLASS (mode); - - if (mclass == MODE_FLOAT || mclass == MODE_VECTOR_INT) - size = 4; - } + if ((cl == MODE_FLOAT || cl == MODE_VECTOR_INT) && GET_MODE_SIZE (mode) <= 4) + return 4; - return size; + return UNITS_PER_WORD; } /* Implement TARGET_HARD_REGNO_NREGS. -- cgit v1.1