From cc84a60af0c76d15cf3c2508238ba3616b943f13 Mon Sep 17 00:00:00 2001 From: Andrew Stubbs Date: Fri, 10 Nov 2023 09:43:21 +0000 Subject: amdgcn: Fix vector min/max ICE The DImode min/max instructions need a clobber that SImode does not, so add the special case to the reduction expand code. gcc/ChangeLog: * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode min/max instructions. --- gcc/ChangeLog.omp | 8 ++++++++ gcc/config/gcn/gcn.cc | 10 +++++++++- 2 files changed, 17 insertions(+), 1 deletion(-) (limited to 'gcc') diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp index c0a30ee..02f3ac2 100644 --- a/gcc/ChangeLog.omp +++ b/gcc/ChangeLog.omp @@ -3,6 +3,14 @@ Backport from mainline: Andrew Stubbs + * config/gcn/gcn.cc (gcn_expand_reduc_scalar): Add clobber to DImode + min/max instructions. + +2023-11-10 Andrew Stubbs + + Backport from mainline: + Andrew Stubbs + * config/gcn/gcn-valu.md (vec_extract_nop): Mention "operands" in condition to silence the warnings. diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc index 02964b0..eb1232a 100644 --- a/gcc/config/gcn/gcn.cc +++ b/gcc/config/gcn/gcn.cc @@ -5553,7 +5553,15 @@ gcn_expand_reduc_scalar (machine_mode mode, rtx src, int unspec) { rtx tmp = gen_reg_rtx (mode); emit_insn (gen_dpp_move (mode, tmp, in, shift_val)); - emit_insn (gen_rtx_SET (out, gen_rtx_fmt_ee (code, mode, tmp, in))); + rtx insn = gen_rtx_SET (out, gen_rtx_fmt_ee (code, mode, tmp, in)); + if (scalar_mode == DImode) + { + rtx clobber = gen_rtx_CLOBBER (VOIDmode, + gen_rtx_REG (DImode, VCC_REG)); + insn = gen_rtx_PARALLEL (VOIDmode, + gen_rtvec (2, insn, clobber)); + } + emit_insn (insn); } else { -- cgit v1.1