From be2f06ed3d5b59d19971e529889f185e9c2bc6c6 Mon Sep 17 00:00:00 2001 From: John David Anglin Date: Sun, 7 Sep 2008 19:54:30 +0000 Subject: pa32-regs.h (IRA_COVER_CLASSES): Define. * pa32-regs.h (IRA_COVER_CLASSES): Define. * pa64-regs.h (IRA_COVER_CLASSES): Define. From-SVN: r140093 --- gcc/ChangeLog | 5 +++++ gcc/config/pa/pa32-regs.h | 13 +++++++++++++ gcc/config/pa/pa64-regs.h | 15 ++++++++++++++- 3 files changed, 32 insertions(+), 1 deletion(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7e482f4..a0f9fad 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2008-09-07 John David Anglin + + * pa32-regs.h (IRA_COVER_CLASSES): Define. + * pa64-regs.h (IRA_COVER_CLASSES): Define. + 2008-09-07 Helge Deller * pa/linux-atomic.c: New file. diff --git a/gcc/config/pa/pa32-regs.h b/gcc/config/pa/pa32-regs.h index 89cbb9b..4463c63 100644 --- a/gcc/config/pa/pa32-regs.h +++ b/gcc/config/pa/pa32-regs.h @@ -287,6 +287,19 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \ {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */ +/* The following macro defines cover classes for Integrated Register + Allocator. Cover classes is a set of non-intersected register + classes covering all hard registers used for register allocation + purpose. Any move between two registers of a cover class should be + cheaper than load or store of the registers. The macro value is + array of register classes with LIM_REG_CLASSES used as the end + marker. */ + +#define IRA_COVER_CLASSES \ +{ \ + GENERAL_REGS, FP_REGS, SHIFT_REGS, LIM_REG_CLASSES \ +} + /* Defines invalid mode changes. */ #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ diff --git a/gcc/config/pa/pa64-regs.h b/gcc/config/pa/pa64-regs.h index 828265f..ec86560 100644 --- a/gcc/config/pa/pa64-regs.h +++ b/gcc/config/pa/pa64-regs.h @@ -235,12 +235,25 @@ enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, {{0x00000000, 0x00000000}, /* NO_REGS */ \ {0x00000002, 0x00000000}, /* R1_REGS */ \ {0xfffffffe, 0x00000000}, /* GENERAL_REGS */ \ - {0x00000000, 0x00000000}, /* FPUPPER_REGS */ \ + {0x00000000, 0x00000000}, /* FPUPPER_REGS */ \ {0x00000000, 0x0fffffff}, /* FP_REGS */ \ {0xfffffffe, 0x0fffffff}, /* GENERAL_OR_FP_REGS */ \ {0x00000000, 0x10000000}, /* SHIFT_REGS */ \ {0xfffffffe, 0x1fffffff}} /* ALL_REGS */ +/* The following macro defines cover classes for Integrated Register + Allocator. Cover classes is a set of non-intersected register + classes covering all hard registers used for register allocation + purpose. Any move between two registers of a cover class should be + cheaper than load or store of the registers. The macro value is + array of register classes with LIM_REG_CLASSES used as the end + marker. */ + +#define IRA_COVER_CLASSES \ +{ \ + GENERAL_REGS, FP_REGS, SHIFT_REGS, LIM_REG_CLASSES \ +} + /* Defines invalid mode changes. */ #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \ -- cgit v1.1