From bdf75257aad299cbad5a62dd10a45139ac3aa369 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Torbj=C3=B6rn=20SVENSSON?= <torbjorn.svensson@foss.st.com>
Date: Sun, 10 Nov 2024 12:30:02 +0100
Subject: testsuite: arm: Use effective-target for its.c test [PR94531]
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The test case gcc.target/arm/its.c was created together with restriction
of IT blocks for Cortex-M7. As the test case fails on all tunes that
does not match Cortex-M7, explicitly test it for Cortex-M7. To have some
additional faith that GCC does the correct thing, I also added another
variant of the test for Cortex-M3 that should allow longer IT blocks.

gcc/testsuite/ChangeLog:

	PR testsuite/94531
	* gcc.target/arm/its.c: Removed.
	* gcc.target/arm/its-1.c: Copy of gcc.target/arm/its.c. Use
	effective-target arm_cpu_cortex_m7.
	* gcc.target/arm/its-2.c: Copy of gcc.target/arm/its.c. Use
	effective-target arm_cpu_cortex_m3.

Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
---
 gcc/testsuite/gcc.target/arm/its-1.c | 25 +++++++++++++++++++++++++
 gcc/testsuite/gcc.target/arm/its-2.c | 24 ++++++++++++++++++++++++
 gcc/testsuite/gcc.target/arm/its.c   | 24 ------------------------
 3 files changed, 49 insertions(+), 24 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/arm/its-1.c
 create mode 100644 gcc/testsuite/gcc.target/arm/its-2.c
 delete mode 100644 gcc/testsuite/gcc.target/arm/its.c

(limited to 'gcc')

diff --git a/gcc/testsuite/gcc.target/arm/its-1.c b/gcc/testsuite/gcc.target/arm/its-1.c
new file mode 100644
index 0000000..2730a2c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/its-1.c
@@ -0,0 +1,25 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_cpu_cortex_m7_ok } */
+/* { dg-options "-O2" }  */
+/* { dg-add-options arm_cpu_cortex_m7 } */
+
+int test (int a, int b)
+{
+  int r;
+  if (a > 10)
+    {
+      r = a - b;
+      r += 10;
+    }
+  else
+    {
+      r = b - a;
+      r -= 7;
+    }
+  if (r > 0)
+    r -= 3;
+  return r;
+}
+/* Ensure there is no IT block with more than 2 instructions, ie. we only allow
+   IT, ITT and ITE.  */
+/* { dg-final { scan-assembler-not "\\sit\[te\]{2}" } } */
diff --git a/gcc/testsuite/gcc.target/arm/its-2.c b/gcc/testsuite/gcc.target/arm/its-2.c
new file mode 100644
index 0000000..2f4f629
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/its-2.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_cpu_cortex_m3_ok } */
+/* { dg-options "-O2" }  */
+/* { dg-add-options arm_cpu_cortex_m3 } */
+
+int test (int a, int b)
+{
+  int r;
+  if (a > 10)
+    {
+      r = a - b;
+      r += 10;
+    }
+  else
+    {
+      r = b - a;
+      r -= 7;
+    }
+  if (r > 0)
+    r -= 3;
+  return r;
+}
+/* Ensure there is an IT block with at least 2 instructions.  */
+/* { dg-final { scan-assembler "\\sit\[te\]{2}" } } */
diff --git a/gcc/testsuite/gcc.target/arm/its.c b/gcc/testsuite/gcc.target/arm/its.c
deleted file mode 100644
index f81a0df..0000000
--- a/gcc/testsuite/gcc.target/arm/its.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target arm_cortex_m } */
-/* { dg-require-effective-target arm_thumb2 } */
-/* { dg-options "-O2" }  */
-int test (int a, int b)
-{
-  int r;
-  if (a > 10)
-    {
-      r = a - b;
-      r += 10;
-    }
-  else
-    {
-      r = b - a;
-      r -= 7;
-    }
-  if (r > 0)
-    r -= 3;
-  return r;
-}
-/* Ensure there is no IT block with more than 2 instructions, ie. we only allow
-   IT, ITT and ITE.  */
-/* { dg-final { scan-assembler-not "\\sit\[te\]{2}" } } */
-- 
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