From af9253a1855855bc6513cbde949b6c224b51f2bd Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Sat, 6 Sep 2008 00:44:13 +0000 Subject: tm.texi (IRA_COVER_CLASSES): Fix a typo. 2008-09-05 Vladimir Makarov * doc/tm.texi (IRA_COVER_CLASSES): Fix a typo. From-SVN: r140053 --- gcc/ChangeLog | 6 +++++- gcc/doc/tm.texi | 2 +- 2 files changed, 6 insertions(+), 2 deletions(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 85315b7..4606969 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,8 @@ -2008-09-04 Vladimir Makarov +2008-09-05 Vladimir Makarov + + * doc/tm.texi (IRA_COVER_CLASSES): Fix a typo. + +2008-09-05 Vladimir Makarov * ira-color.c (ira_fast_allocation): Permit global allocno allocation. diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index d6cdc5a..eba39cd 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -2830,7 +2830,7 @@ as below: The macro defines cover classes for the Integrated Register Allocator (@acronym{IRA}). Cover classes are a set of non-intersecting register classes covering all hard registers used for register allocation -purposes. If a move between two registers in the same cover class are +purposes. If a move between two registers in the same cover class is possible, it should be cheaper than a load or store of the registers. The macro value should be the initializer for an array of register class values, with @code{LIM_REG_CLASSES} used as the end marker. -- cgit v1.1