From a7edae0a639463d706436863293c9f52632492b6 Mon Sep 17 00:00:00 2001 From: Mike Stump Date: Fri, 14 Jan 2011 19:37:16 +0000 Subject: alpha.md (umk_mismatch_args): Don't put a mode on set. * config/alpha/alpha.md (umk_mismatch_args): Don't put a mode on set. * config/fr30/fr30.md: Likweise (movsi_push): Likewise. (movsi_pop): Likewise. (enter_func): Likewise. * config/moxie/moxie.md (movsi_push): Likewise. (movsi_pop): Likewise. From-SVN: r168817 --- gcc/ChangeLog | 10 +++ gcc/config/alpha/alpha.md | 14 ++-- gcc/config/arm/iwmmxt.md | 2 +- gcc/config/fr30/fr30.md | 164 +++++++++++++++++++++++----------------------- gcc/config/moxie/moxie.md | 8 +-- 5 files changed, 104 insertions(+), 94 deletions(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d0c9abd..5405de5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +2011-01-14 Mike Stump + + * config/alpha/alpha.md (umk_mismatch_args): Don't put a mode on set. + * config/fr30/fr30.md: Likweise + (movsi_push): Likewise. + (movsi_pop): Likewise. + (enter_func): Likewise. + * config/moxie/moxie.md (movsi_push): Likewise. + (movsi_pop): Likewise. + 2011-01-14 Joseph Myers * config/mips/linux64.h (LINK_SPEC): Remove %{bestGnum} diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 579fa01..04f3ff8 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -6910,13 +6910,13 @@ ;; Load the CIW into r2 for calling __T3E_MISMATCH (define_expand "umk_mismatch_args" - [(set:DI (match_dup 1) (mem:DI (plus:DI (reg:DI 15) (const_int -16)))) - (set:DI (match_dup 2) (mem:DI (plus:DI (match_dup 1) (const_int -32)))) - (set:DI (reg:DI 1) (match_operand:DI 0 "const_int_operand" "")) - (set:DI (match_dup 3) (plus:DI (mult:DI (reg:DI 25) - (const_int 8)) - (match_dup 2))) - (set:DI (reg:DI 2) (mem:DI (match_dup 3)))] + [(set (match_dup 1) (mem:DI (plus:DI (reg:DI 15) (const_int -16)))) + (set (match_dup 2) (mem:DI (plus:DI (match_dup 1) (const_int -32)))) + (set (reg:DI 1) (match_operand:DI 0 "const_int_operand" "")) + (set (match_dup 3) (plus:DI (mult:DI (reg:DI 25) + (const_int 8)) + (match_dup 2))) + (set (reg:DI 2) (mem:DI (match_dup 3)))] "TARGET_ABI_UNICOSMK" { operands[1] = gen_reg_rtx (DImode); diff --git a/gcc/config/arm/iwmmxt.md b/gcc/config/arm/iwmmxt.md index 00dd232..7f13ae4 100644 --- a/gcc/config/arm/iwmmxt.md +++ b/gcc/config/arm/iwmmxt.md @@ -551,7 +551,7 @@ ;; ;; Note - you cannot use patterns like these here: ;; -;; (set: (match:) (: (match:) (match:))) +;; (set (match:) (: (match:) (match:))) ;; ;; Because GCC will assume that the truth value (1 or 0) is installed ;; into the entire destination vector, (with the '1' going into the least diff --git a/gcc/config/fr30/fr30.md b/gcc/config/fr30/fr30.md index afab051..f95559f 100644 --- a/gcc/config/fr30/fr30.md +++ b/gcc/config/fr30/fr30.md @@ -140,16 +140,16 @@ ;; Push a register onto the stack (define_insn "movsi_push" - [(set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 0 "register_operand" "a"))] + [(set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 0 "register_operand" "a"))] "" "st %0, @-r15" ) ;; Pop a register off the stack (define_insn "movsi_pop" - [(set:SI (match_operand:SI 0 "register_operand" "=a") - (mem:SI (post_inc:SI (reg:SI 15))))] + [(set (match_operand:SI 0 "register_operand" "=a") + (mem:SI (post_inc:SI (reg:SI 15))))] "" "ld @r15+, %0" ) @@ -292,8 +292,8 @@ "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128 && (GET_CODE (operands[0]) != SUBREG || SCALAR_INT_MODE_P (GET_MODE (XEXP (operands[0], 0))))" - [(set:SI (match_dup 0) (match_dup 1)) - (set:SI (match_dup 0) (sign_extend:SI (match_dup 2)))] + [(set (match_dup 0) (match_dup 1)) + (set (match_dup 0) (sign_extend:SI (match_dup 2)))] "{ operands[1] = GEN_INT (INTVAL (operands[1]) & 0xff); operands[2] = gen_lowpart (QImode, operands[0]); @@ -307,8 +307,8 @@ [(set (match_operand:SI 0 "register_operand" "") (match_operand:SI 1 "const_int_operand" ""))] "(INTVAL (operands[1]) < 0) && ((INTVAL (operands[1]) & 0x00ffffff) == 0)" - [(set:SI (match_dup 0) (match_dup 2)) - (parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (const_int 24))) + [(set (match_dup 0) (match_dup 2)) + (parallel [(set (match_dup 0) (ashift:SI (match_dup 0) (const_int 24))) (clobber (reg:CC 16))])] "{ HOST_WIDE_INT val = INTVAL (operands[1]); @@ -325,8 +325,8 @@ (match_operand:SI 1 "const_int_operand" ""))] "(INTVAL (operands[1]) > 0x00ffffff) && ((INTVAL (operands[1]) >> exact_log2 (INTVAL (operands[1]) & (- INTVAL (operands[1])))) < 0x100)" - [(set:SI (match_dup 0) (match_dup 2)) - (parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (match_dup 3))) + [(set (match_dup 0) (match_dup 2)) + (parallel [(set (match_dup 0) (ashift:SI (match_dup 0) (match_dup 3))) (clobber (reg:CC 16))])] "{ HOST_WIDE_INT val = INTVAL (operands[1]); @@ -417,108 +417,108 @@ ;; is during function prologues and epilogues. (define_peephole - [(set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 0 "high_register_operand" "h")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 1 "high_register_operand" "h")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 2 "high_register_operand" "h")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 3 "high_register_operand" "h"))] + [(set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 0 "high_register_operand" "h")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 1 "high_register_operand" "h")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 2 "high_register_operand" "h")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 3 "high_register_operand" "h"))] "fr30_check_multiple_regs (operands, 4, 1)" "stm1 (%0, %1, %2, %3)" [(set_attr "delay_type" "other")] ) (define_peephole - [(set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 0 "high_register_operand" "h")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 1 "high_register_operand" "h")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 2 "high_register_operand" "h"))] + [(set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 0 "high_register_operand" "h")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 1 "high_register_operand" "h")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 2 "high_register_operand" "h"))] "fr30_check_multiple_regs (operands, 3, 1)" "stm1 (%0, %1, %2)" [(set_attr "delay_type" "other")] ) (define_peephole - [(set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 0 "high_register_operand" "h")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 1 "high_register_operand" "h"))] + [(set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 0 "high_register_operand" "h")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 1 "high_register_operand" "h"))] "fr30_check_multiple_regs (operands, 2, 1)" "stm1 (%0, %1)" [(set_attr "delay_type" "other")] ) (define_peephole - [(set:SI (match_operand:SI 0 "high_register_operand" "h") - (mem:SI (post_inc:SI (reg:SI 15)))) - (set:SI (match_operand:SI 1 "high_register_operand" "h") - (mem:SI (post_inc:SI (reg:SI 15)))) - (set:SI (match_operand:SI 2 "high_register_operand" "h") - (mem:SI (post_inc:SI (reg:SI 15)))) - (set:SI (match_operand:SI 3 "high_register_operand" "h") - (mem:SI (post_inc:SI (reg:SI 15))))] + [(set (match_operand:SI 0 "high_register_operand" "h") + (mem:SI (post_inc:SI (reg:SI 15)))) + (set (match_operand:SI 1 "high_register_operand" "h") + (mem:SI (post_inc:SI (reg:SI 15)))) + (set (match_operand:SI 2 "high_register_operand" "h") + (mem:SI (post_inc:SI (reg:SI 15)))) + (set (match_operand:SI 3 "high_register_operand" "h") + (mem:SI (post_inc:SI (reg:SI 15))))] "fr30_check_multiple_regs (operands, 4, 0)" "ldm1 (%0, %1, %2, %3)" [(set_attr "delay_type" "other")] ) (define_peephole - [(set:SI (match_operand:SI 0 "high_register_operand" "h") - (mem:SI (post_inc:SI (reg:SI 15)))) - (set:SI (match_operand:SI 1 "high_register_operand" "h") - (mem:SI (post_inc:SI (reg:SI 15)))) - (set:SI (match_operand:SI 2 "high_register_operand" "h") - (mem:SI (post_inc:SI (reg:SI 15))))] + [(set (match_operand:SI 0 "high_register_operand" "h") + (mem:SI (post_inc:SI (reg:SI 15)))) + (set (match_operand:SI 1 "high_register_operand" "h") + (mem:SI (post_inc:SI (reg:SI 15)))) + (set (match_operand:SI 2 "high_register_operand" "h") + (mem:SI (post_inc:SI (reg:SI 15))))] "fr30_check_multiple_regs (operands, 3, 0)" "ldm1 (%0, %1, %2)" [(set_attr "delay_type" "other")] ) (define_peephole - [(set:SI (match_operand:SI 0 "high_register_operand" "h") - (mem:SI (post_inc:SI (reg:SI 15)))) - (set:SI (match_operand:SI 1 "high_register_operand" "h") - (mem:SI (post_inc:SI (reg:SI 15))))] + [(set (match_operand:SI 0 "high_register_operand" "h") + (mem:SI (post_inc:SI (reg:SI 15)))) + (set (match_operand:SI 1 "high_register_operand" "h") + (mem:SI (post_inc:SI (reg:SI 15))))] "fr30_check_multiple_regs (operands, 2, 0)" "ldm1 (%0, %1)" [(set_attr "delay_type" "other")] ) (define_peephole - [(set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 0 "low_register_operand" "l")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 1 "low_register_operand" "l")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 2 "low_register_operand" "l")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 3 "low_register_operand" "l"))] + [(set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 0 "low_register_operand" "l")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 1 "low_register_operand" "l")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 2 "low_register_operand" "l")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 3 "low_register_operand" "l"))] "fr30_check_multiple_regs (operands, 4, 1)" "stm0 (%0, %1, %2, %3)" [(set_attr "delay_type" "other")] ) (define_peephole - [(set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 0 "low_register_operand" "l")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 1 "low_register_operand" "l")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 2 "low_register_operand" "l"))] + [(set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 0 "low_register_operand" "l")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 1 "low_register_operand" "l")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 2 "low_register_operand" "l"))] "fr30_check_multiple_regs (operands, 3, 1)" "stm0 (%0, %1, %2)" [(set_attr "delay_type" "other")] ) (define_peephole - [(set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 0 "low_register_operand" "l")) - (set:SI (mem:SI (pre_dec:SI (reg:SI 15))) - (match_operand:SI 1 "low_register_operand" "l"))] + [(set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 0 "low_register_operand" "l")) + (set (mem:SI (pre_dec:SI (reg:SI 15))) + (match_operand:SI 1 "low_register_operand" "l"))] "fr30_check_multiple_regs (operands, 2, 1)" "stm0 (%0, %1)" [(set_attr "delay_type" "other")] @@ -1210,15 +1210,15 @@ (define_expand "enter_func" [(parallel - [(set:SI (mem:SI (minus:SI (match_dup 1) - (const_int 4))) - (match_dup 2)) - (set:SI (match_dup 2) - (minus:SI (match_dup 1) - (const_int 4))) - (set:SI (match_dup 1) - (minus:SI (match_dup 1) - (match_operand:SI 0 "immediate_operand")))] + [(set (mem:SI (minus:SI (match_dup 1) + (const_int 4))) + (match_dup 2)) + (set (match_dup 2) + (minus:SI (match_dup 1) + (const_int 4))) + (set (match_dup 1) + (minus:SI (match_dup 1) + (match_operand:SI 0 "immediate_operand")))] )] "" { @@ -1227,15 +1227,15 @@ }) (define_insn "*enter_func" - [(set:SI (mem:SI (minus:SI (reg:SI 15) - (const_int 4))) - (reg:SI 14)) - (set:SI (reg:SI 14) - (minus:SI (reg:SI 15) - (const_int 4))) - (set:SI (reg:SI 15) - (minus:SI (reg:SI 15) - (match_operand 0 "immediate_operand" "i")))] + [(set (mem:SI (minus:SI (reg:SI 15) + (const_int 4))) + (reg:SI 14)) + (set (reg:SI 14) + (minus:SI (reg:SI 15) + (const_int 4))) + (set (reg:SI 15) + (minus:SI (reg:SI 15) + (match_operand 0 "immediate_operand" "i")))] "reload_completed" "enter #%0" [(set_attr "delay_type" "other")] diff --git a/gcc/config/moxie/moxie.md b/gcc/config/moxie/moxie.md index a8e6887..64f8395 100644 --- a/gcc/config/moxie/moxie.md +++ b/gcc/config/moxie/moxie.md @@ -188,15 +188,15 @@ ;; Push a register onto the stack (define_insn "movsi_push" - [(set:SI (mem:SI (pre_dec:SI (reg:SI 1))) - (match_operand:SI 0 "register_operand" "r"))] + [(set (mem:SI (pre_dec:SI (reg:SI 1))) + (match_operand:SI 0 "register_operand" "r"))] "" "push $sp, %0") ;; Pop a register from the stack (define_insn "movsi_pop" - [(set:SI (match_operand:SI 1 "register_operand" "=r") - (mem:SI (post_inc:SI (match_operand:SI 0 "register_operand" "r"))))] + [(set (match_operand:SI 1 "register_operand" "=r") + (mem:SI (post_inc:SI (match_operand:SI 0 "register_operand" "r"))))] "" "pop %0, %1") -- cgit v1.1