From a251ffd0ced940b9121ef658981e16640863836d Mon Sep 17 00:00:00 2001 From: Torbjorn Granlund Date: Sat, 12 Feb 1994 01:07:04 +0000 Subject: (ppc_adjust_cost): New function. Adjust for TYPE_JMPREG. From-SVN: r6535 --- gcc/config/rs6000/rs6000.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'gcc') diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 9cf9eb5..2b14e5b 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1999,3 +1999,37 @@ output_function_profiler (file, labelno) for (i = 3, j = 30; i <= last_parm_reg; i++, j--) fprintf (file, "\tai %d,%d,0\n", i, j); } + +/* Adjust the cost of a scheduling dependency. Return the new cost of + a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ + +int +ppc_adjust_cost (insn, link, dep_insn, cost) + rtx insn; + rtx link; + rtx dep_insn; + int cost; +{ + if (! recog_memoized (insn)) + return 0; + + if (REG_NOTE_KIND (link) != 0) + return 0; + + if (REG_NOTE_KIND (link) == 0) + { + /* Data dependency; DEP_INSN writes a register that INSN reads some + cycles later. */ + + /* Tell the first scheduling pass about the latency between a mtctr + and bctr (and mtlr and br/blr). The first scheduling pass will not + know about this latency since the mtctr instruction, which has the + latency associated to it, will be generated by reload. */ + if (get_attr_type (insn) == TYPE_JMPREG) + return TARGET_POWER ? 5 : 4; + + /* Fall out to return default cost. */ + } + + return cost; +} -- cgit v1.1