From 8efea7a67353d067c0d94cf4cf7d7f377a337cc0 Mon Sep 17 00:00:00 2001
From: Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
Date: Mon, 8 Nov 2010 17:44:40 +0000
Subject: re PR target/46280 (Several testcases FAIL with 16byte alignment ABI
 warning on Solaris 8/9 x86)

	gcc:
	* config/i386/i386.c (ix86_function_arg_boundary): Fix warning
	message.

	gcc/testsuite:
	* gcc.dg/pr35442.c: Adapt warning.

	PR target/46280
	* g++.dg/eh/simd-2.C: Add -msse to dg-options, add
	dg-require-effective-target sse_runtime for for i?86-*-*, x86_64-*-*.
	* g++.dg/torture/pr36444.C: Add dg-options -msse for
	i?86-*-* x86_64-*-*.
	* g++.dg/torture/pr36445.C: Likewise.
	* gcc.c-torture/compile/pr34856.c: Likewise.
	* gcc.c-torture/compile/pr39928-1.c: Likewise.
	* gcc.c-torture/compile/vector-1.c: Likewise.
	* gcc.c-torture/compile/vector-2.c: Likewise.
	* gcc.dg/pr32912-1.c: Likewise.
	* gcc.c-torture/execute/va-arg-25.c: Move ...
	* gcc.dg/torture/va-arg-25.c: ... here.
	Add dg-do run.
	Add dg-options -msse, dg-require-effective-target sse_runtime for
	for i?86-*-*, x86_64-*-*.
	* gcc.c-torture/execute/vector-1.c: Likewise.
	* gcc.c-torture/execute/vector-2.c: Likewise.
	* gcc.dg/tree-ssa/forwprop-5.c: Add -msse to dg-options for
	i?86-*-*, x86_64-*-*.
	* gcc.dg/tree-ssa/fre-vce-1.c: Likewise.
	* gcc.dg/tree-ssa/sra-4.c: Likewise.
	* gcc.dg/tree-ssa/vector-1.c: Likewise.
	* gcc.dg/tree-ssa/vector-2.c: Likewise.
	* gcc.target/i386/vect-args.c: Add -Wno-psabi to dg-options.

From-SVN: r166444
---
 gcc/ChangeLog                                   |  4 ++
 gcc/config/i386/i386.c                          |  2 +-
 gcc/testsuite/ChangeLog                         | 30 +++++++++++++++
 gcc/testsuite/g++.dg/eh/simd-2.C                |  3 +-
 gcc/testsuite/g++.dg/torture/pr36444.C          |  1 +
 gcc/testsuite/g++.dg/torture/pr36445.C          |  1 +
 gcc/testsuite/gcc.c-torture/compile/pr34856.c   |  1 +
 gcc/testsuite/gcc.c-torture/compile/pr39928-1.c |  1 +
 gcc/testsuite/gcc.c-torture/compile/vector-1.c  |  1 +
 gcc/testsuite/gcc.c-torture/compile/vector-2.c  |  1 +
 gcc/testsuite/gcc.c-torture/execute/va-arg-25.c | 37 ------------------
 gcc/testsuite/gcc.c-torture/execute/vector-1.c  | 36 ------------------
 gcc/testsuite/gcc.c-torture/execute/vector-2.c  | 46 -----------------------
 gcc/testsuite/gcc.dg/pr32912-1.c                |  2 +
 gcc/testsuite/gcc.dg/pr35442.c                  |  2 +-
 gcc/testsuite/gcc.dg/torture/va-arg-25.c        | 42 +++++++++++++++++++++
 gcc/testsuite/gcc.dg/torture/vector-1.c         | 40 ++++++++++++++++++++
 gcc/testsuite/gcc.dg/torture/vector-2.c         | 50 +++++++++++++++++++++++++
 gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c      |  1 +
 gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c       |  1 +
 gcc/testsuite/gcc.dg/tree-ssa/sra-4.c           |  3 +-
 gcc/testsuite/gcc.dg/tree-ssa/vector-1.c        |  1 +
 gcc/testsuite/gcc.dg/tree-ssa/vector-2.c        |  1 +
 gcc/testsuite/gcc.target/i386/vect-args.c       |  2 +-
 24 files changed, 185 insertions(+), 124 deletions(-)
 delete mode 100644 gcc/testsuite/gcc.c-torture/execute/va-arg-25.c
 delete mode 100644 gcc/testsuite/gcc.c-torture/execute/vector-1.c
 delete mode 100644 gcc/testsuite/gcc.c-torture/execute/vector-2.c
 create mode 100644 gcc/testsuite/gcc.dg/torture/va-arg-25.c
 create mode 100644 gcc/testsuite/gcc.dg/torture/vector-1.c
 create mode 100644 gcc/testsuite/gcc.dg/torture/vector-2.c

(limited to 'gcc')

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 408a054..ae81d67 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2010-11-08  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+	* config/i386/i386.c (ix86_function_arg_boundary): Fix warning
+	message.
 
 2010-11-08  Basile Starynkevitch  <basile@starynkevitch.net>
 
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index b4ba2c1..9efc0df 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -7147,7 +7147,7 @@ ix86_function_arg_boundary (enum machine_mode mode, const_tree type)
 	{
 	  warned = true;
 	  inform (input_location,
-		  "The ABI of passing parameter with %dbyte"
+		  "The ABI for passing parameters with %d-byte"
 		  " alignment has changed in GCC 4.6",
 		  align / BITS_PER_UNIT);
 	}
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 600f768..74d974b 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,33 @@
+2010-11-08  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>
+
+	* gcc.dg/pr35442.c: Adapt warning.
+
+	PR target/46280
+	* g++.dg/eh/simd-2.C: Add -msse to dg-options, add
+	dg-require-effective-target sse_runtime for for i?86-*-*, x86_64-*-*.
+	* g++.dg/torture/pr36444.C: Add dg-options -msse for
+	i?86-*-* x86_64-*-*.
+	* g++.dg/torture/pr36445.C: Likewise.
+	* gcc.c-torture/compile/pr34856.c: Likewise.
+	* gcc.c-torture/compile/pr39928-1.c: Likewise.
+	* gcc.c-torture/compile/vector-1.c: Likewise.
+	* gcc.c-torture/compile/vector-2.c: Likewise.
+	* gcc.dg/pr32912-1.c: Likewise.
+	* gcc.c-torture/execute/va-arg-25.c: Move ...
+	* gcc.dg/torture/va-arg-25.c: ... here.
+	Add dg-do run.
+	Add dg-options -msse, dg-require-effective-target sse_runtime for
+	for i?86-*-*, x86_64-*-*.
+	* gcc.c-torture/execute/vector-1.c: Likewise.
+	* gcc.c-torture/execute/vector-2.c: Likewise.
+	* gcc.dg/tree-ssa/forwprop-5.c: Add -msse to dg-options for
+	i?86-*-*, x86_64-*-*.
+	* gcc.dg/tree-ssa/fre-vce-1.c: Likewise.
+	* gcc.dg/tree-ssa/sra-4.c: Likewise.
+	* gcc.dg/tree-ssa/vector-1.c: Likewise.
+	* gcc.dg/tree-ssa/vector-2.c: Likewise.
+	* gcc.target/i386/vect-args.c: Add -Wno-psabi to dg-options.
+
 2010-11-08  Steve Ellcey  <sje@cup.hp.com>
 
 	* gcc.dg/torture/pr45982.c: Add -std=c99
diff --git a/gcc/testsuite/g++.dg/eh/simd-2.C b/gcc/testsuite/g++.dg/eh/simd-2.C
index da7ef49..2761061 100644
--- a/gcc/testsuite/g++.dg/eh/simd-2.C
+++ b/gcc/testsuite/g++.dg/eh/simd-2.C
@@ -1,10 +1,11 @@
 // Test EH when V4SI SIMD registers are involved.
 // Contributed by Aldy Hernandez (aldy@quesejoda.com).
 // { dg-options "-O -Wno-abi" }
-// { dg-options "-O -w" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
+// { dg-options "-O -w -msse" { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
 // { dg-options "-O -w" { target powerpc*-*-* } }
 // { dg-options "-O -w -maltivec" { target { powerpc*-*-* && vmx_hw } } }
 // { dg-do run }
+// { dg-require-effective-target sse_runtime { target { { i?86-*-* x86_64-*-* } && ilp32 } } }
 
 #include "check-vect.h"
 
diff --git a/gcc/testsuite/g++.dg/torture/pr36444.C b/gcc/testsuite/g++.dg/torture/pr36444.C
index fd20bde..ae639e2 100644
--- a/gcc/testsuite/g++.dg/torture/pr36444.C
+++ b/gcc/testsuite/g++.dg/torture/pr36444.C
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 #define vector __attribute__((vector_size(16) ))
 struct struct1  {
   union {}    vmx;
diff --git a/gcc/testsuite/g++.dg/torture/pr36445.C b/gcc/testsuite/g++.dg/torture/pr36445.C
index 39a7a55..56642e9 100644
--- a/gcc/testsuite/g++.dg/torture/pr36445.C
+++ b/gcc/testsuite/g++.dg/torture/pr36445.C
@@ -1,4 +1,5 @@
 /* { dg-do compile } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 // This used to fail as we would try to expand a VCE where one side had
 // a mode of BLKmode and the other side was a vector mode.
 #define vector __attribute__((vector_size(16) ))
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr34856.c b/gcc/testsuite/gcc.c-torture/compile/pr34856.c
index a2f4369..7b0d596 100644
--- a/gcc/testsuite/gcc.c-torture/compile/pr34856.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr34856.c
@@ -1,3 +1,4 @@
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 #undef __vector
 #define __vector __attribute__((vector_size(16) ))
 typedef __vector signed char qword;
diff --git a/gcc/testsuite/gcc.c-torture/compile/pr39928-1.c b/gcc/testsuite/gcc.c-torture/compile/pr39928-1.c
index 3bee438..1abb5cc 100644
--- a/gcc/testsuite/gcc.c-torture/compile/pr39928-1.c
+++ b/gcc/testsuite/gcc.c-torture/compile/pr39928-1.c
@@ -1,3 +1,4 @@
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 typedef float __m128 __attribute__ ((__vector_size__ (16), __may_alias__));
 extern __m128 _mm_sub_ps (__m128 __A, __m128 __B);
 extern __m128 _mm_mul_ps (__m128 __A, __m128 __B);
diff --git a/gcc/testsuite/gcc.c-torture/compile/vector-1.c b/gcc/testsuite/gcc.c-torture/compile/vector-1.c
index d22afd5..9be0be1 100644
--- a/gcc/testsuite/gcc.c-torture/compile/vector-1.c
+++ b/gcc/testsuite/gcc.c-torture/compile/vector-1.c
@@ -1,3 +1,4 @@
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 #define vector __attribute__((vector_size(16) ))
 struct ss
 {
diff --git a/gcc/testsuite/gcc.c-torture/compile/vector-2.c b/gcc/testsuite/gcc.c-torture/compile/vector-2.c
index 930a9c1..e04d555 100644
--- a/gcc/testsuite/gcc.c-torture/compile/vector-2.c
+++ b/gcc/testsuite/gcc.c-torture/compile/vector-2.c
@@ -1,3 +1,4 @@
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
 #define vector __attribute__((vector_size(16) ))
 struct ss
 {
diff --git a/gcc/testsuite/gcc.c-torture/execute/va-arg-25.c b/gcc/testsuite/gcc.c-torture/execute/va-arg-25.c
deleted file mode 100644
index b9f3a1b..0000000
--- a/gcc/testsuite/gcc.c-torture/execute/va-arg-25.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/* Varargs and vectors!  */
-
-#include <stdarg.h>
-#include <limits.h>
-
-#define vector __attribute__((vector_size(16)))
-
-const vector unsigned int v1 = {10,11,12,13};
-const vector unsigned int v2 = {20,21,22,23};
-
-void foo(int a, ...)
-{
-  va_list args;
-  vector unsigned int v;
-
-  va_start (args, a);
-  v = va_arg (args, vector unsigned int);
-  if (a != 1 || memcmp (&v, &v1, sizeof (v)) != 0)
-    abort ();
-  a = va_arg (args, int);
-  if (a != 2)
-    abort ();
-  v = va_arg (args, vector unsigned int);
-  if (memcmp (&v, &v2, sizeof (v)) != 0)
-    abort ();
-  va_end (args);
-}
-
-int main(void)
-{
-#if INT_MAX == 2147483647
-  foo (1, (vector unsigned int){10,11,12,13}, 2,
-       (vector unsigned int){20,21,22,23});
-#endif
-  return 0;
-}
-
diff --git a/gcc/testsuite/gcc.c-torture/execute/vector-1.c b/gcc/testsuite/gcc.c-torture/execute/vector-1.c
deleted file mode 100644
index ff21d68..0000000
--- a/gcc/testsuite/gcc.c-torture/execute/vector-1.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/* Check that vector extraction works correctly. */
-
-#define vector __attribute__((vector_size(16) ))
-
-int f0(vector int t)
-{
-  return ((int*)&t)[0];
-}
-int f1(vector int t)
-{
-  return ((int*)&t)[1];
-}
-int f2(vector int t)
-{
-  return ((int*)&t)[2];
-}
-int f3(vector int t)
-{
-  return ((int*)&t)[3];
-}
-int main(void)
-{
-  vector int a = {0, 1, 2, 3};
-  /* Make sure that we have the correct size for the vectors. */
-  if (sizeof(int) != 4)
-    __builtin_exit (0);
-  if (f0(a) != 0)
-    __builtin_abort ();
-  if (f1(a) != 1)
-    __builtin_abort ();
-  if (f2(a) != 2)
-    __builtin_abort ();
-  if (f3(a) != 3)
-    __builtin_abort ();
-  return 0;
-}
diff --git a/gcc/testsuite/gcc.c-torture/execute/vector-2.c b/gcc/testsuite/gcc.c-torture/execute/vector-2.c
deleted file mode 100644
index 55330dd..0000000
--- a/gcc/testsuite/gcc.c-torture/execute/vector-2.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/* Check that vector insertion works correctly. */
-
-#define vector __attribute__((vector_size(16) ))
-
-vector int f0(vector int t, int a)
-{
- ((int*)&t)[0] = a;
- return t;
-}
-vector int f1(vector int t, int a)
-{
- ((int*)&t)[1] = a;
- return t;
-}
-vector int f2(vector int t, int a)
-{
- ((int*)&t)[2] = a;
- return t;
-}
-vector int f3(vector int t, int a)
-{
- ((int*)&t)[3] = a;
- return t;
-}
-int main(void)
-{
-  vector int a = {0, 0, 0, 0};
-  vector int b = {1, 0, 0, 0};
-  vector int c = {0, 1, 0, 0};
-  vector int d = {0, 0, 1, 0};
-  vector int e = {0, 0, 0, 1};
-  vector int a0;
-  a0 = f0(a, 1);
-  if (memcmp (&a0, &b, sizeof(a0)))
-    __builtin_abort ();
-  a0 = f1(a, 1);
-  if (memcmp (&a0, &c, sizeof(a0)))
-    __builtin_abort ();
-  a0 = f2(a, 1);
-  if (memcmp (&a0, &d, sizeof(a0)))
-    __builtin_abort ();
-  a0 = f3(a, 1);
-  if (memcmp (&a0, &e, sizeof(a0)))
-    __builtin_abort ();
-  return 0;
-}
diff --git a/gcc/testsuite/gcc.dg/pr32912-1.c b/gcc/testsuite/gcc.dg/pr32912-1.c
index 1ceb77a..4fcc29a 100644
--- a/gcc/testsuite/gcc.dg/pr32912-1.c
+++ b/gcc/testsuite/gcc.dg/pr32912-1.c
@@ -2,6 +2,8 @@
 /* { dg-do run } */
 /* { dg-options "-O2 -w" } */
 /* { dg-options "-O2 -w -fno-common" { target hppa*-*-hpux* } } */
+/* { dg-options "-O2 -w -msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
 
 extern void abort (void);
 
diff --git a/gcc/testsuite/gcc.dg/pr35442.c b/gcc/testsuite/gcc.dg/pr35442.c
index 875cb0b..206853b 100644
--- a/gcc/testsuite/gcc.dg/pr35442.c
+++ b/gcc/testsuite/gcc.dg/pr35442.c
@@ -11,4 +11,4 @@ foo (A a)
 }
 
 /* Ignore a warning that is irrelevant to the purpose of this test.  */
-/* { dg-prune-output "(.*GCC vector passed by reference.*|.*ABI of * passing parameter with.*)" } */
+/* { dg-prune-output "(.*GCC vector passed by reference.*|.*ABI for * passing parameters with.*)" } */
diff --git a/gcc/testsuite/gcc.dg/torture/va-arg-25.c b/gcc/testsuite/gcc.dg/torture/va-arg-25.c
new file mode 100644
index 0000000..8496460
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/va-arg-25.c
@@ -0,0 +1,42 @@
+/* Varargs and vectors!  */
+
+/* { dg-do run } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+
+#include <stdarg.h>
+#include <stdlib.h>
+#include <limits.h>
+
+#define vector __attribute__((vector_size(16)))
+
+const vector unsigned int v1 = {10,11,12,13};
+const vector unsigned int v2 = {20,21,22,23};
+
+void foo(int a, ...)
+{
+  va_list args;
+  vector unsigned int v;
+
+  va_start (args, a);
+  v = va_arg (args, vector unsigned int);
+  if (a != 1 || memcmp (&v, &v1, sizeof (v)) != 0)
+    abort ();
+  a = va_arg (args, int);
+  if (a != 2)
+    abort ();
+  v = va_arg (args, vector unsigned int);
+  if (memcmp (&v, &v2, sizeof (v)) != 0)
+    abort ();
+  va_end (args);
+}
+
+int main(void)
+{
+#if INT_MAX == 2147483647
+  foo (1, (vector unsigned int){10,11,12,13}, 2,
+       (vector unsigned int){20,21,22,23});
+#endif
+  return 0;
+}
+
diff --git a/gcc/testsuite/gcc.dg/torture/vector-1.c b/gcc/testsuite/gcc.dg/torture/vector-1.c
new file mode 100644
index 0000000..9ab78aa
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/vector-1.c
@@ -0,0 +1,40 @@
+/* Check that vector extraction works correctly. */
+
+/* { dg-do run } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+
+#define vector __attribute__((vector_size(16) ))
+
+int f0(vector int t)
+{
+  return ((int*)&t)[0];
+}
+int f1(vector int t)
+{
+  return ((int*)&t)[1];
+}
+int f2(vector int t)
+{
+  return ((int*)&t)[2];
+}
+int f3(vector int t)
+{
+  return ((int*)&t)[3];
+}
+int main(void)
+{
+  vector int a = {0, 1, 2, 3};
+  /* Make sure that we have the correct size for the vectors. */
+  if (sizeof(int) != 4)
+    __builtin_exit (0);
+  if (f0(a) != 0)
+    __builtin_abort ();
+  if (f1(a) != 1)
+    __builtin_abort ();
+  if (f2(a) != 2)
+    __builtin_abort ();
+  if (f3(a) != 3)
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/torture/vector-2.c b/gcc/testsuite/gcc.dg/torture/vector-2.c
new file mode 100644
index 0000000..bff9f82
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/torture/vector-2.c
@@ -0,0 +1,50 @@
+/* Check that vector insertion works correctly. */
+
+/* { dg-do run } */
+/* { dg-options "-msse" { target { i?86-*-* x86_64-*-* } } } */
+/* { dg-require-effective-target sse_runtime { target { i?86-*-* x86_64-*-* } } } */
+
+#define vector __attribute__((vector_size(16) ))
+
+vector int f0(vector int t, int a)
+{
+ ((int*)&t)[0] = a;
+ return t;
+}
+vector int f1(vector int t, int a)
+{
+ ((int*)&t)[1] = a;
+ return t;
+}
+vector int f2(vector int t, int a)
+{
+ ((int*)&t)[2] = a;
+ return t;
+}
+vector int f3(vector int t, int a)
+{
+ ((int*)&t)[3] = a;
+ return t;
+}
+int main(void)
+{
+  vector int a = {0, 0, 0, 0};
+  vector int b = {1, 0, 0, 0};
+  vector int c = {0, 1, 0, 0};
+  vector int d = {0, 0, 1, 0};
+  vector int e = {0, 0, 0, 1};
+  vector int a0;
+  a0 = f0(a, 1);
+  if (memcmp (&a0, &b, sizeof(a0)))
+    __builtin_abort ();
+  a0 = f1(a, 1);
+  if (memcmp (&a0, &c, sizeof(a0)))
+    __builtin_abort ();
+  a0 = f2(a, 1);
+  if (memcmp (&a0, &d, sizeof(a0)))
+    __builtin_abort ();
+  a0 = f3(a, 1);
+  if (memcmp (&a0, &e, sizeof(a0)))
+    __builtin_abort ();
+  return 0;
+}
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
index f2ddab2..033c60d 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/forwprop-5.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized -w" } */
+/* { dg-options "-O1 -fdump-tree-optimized -w -msse" { target { i?86-*-* x86_64-*-* } } } */
 
 #define vector __attribute__((vector_size(16) ))
 struct VecClass
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c b/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
index 2442b93..599d1f1 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/fre-vce-1.c
@@ -1,4 +1,5 @@
 /* { dg-options "-O2 -fdump-tree-fre -w" } */
+/* { dg-options "-O2 -fdump-tree-fre -w -msse" { target { i?86-*-* x86_64-*-* } } } */
 /* { dg-do compile } */
 #define vector __attribute__((vector_size(sizeof(int)*4) ))
 struct s { vector int i; };
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c b/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
index 73a68f9..e6ca756 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/sra-4.c
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-O1 -fdump-tree-optimized -w" } */
-/* Check that SRA replaces strucutres containing vectors. */
+/* { dg-options "-O1 -fdump-tree-optimized -w -msse" { target { i?86-*-* x86_64-*-* } } } */
+/* Check that SRA replaces structures containing vectors. */
 
 #define vector __attribute__((vector_size(16)))
 
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c b/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
index 5b07c67..6fe0e87 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-1.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-w -O1 -fdump-tree-gimple" } */
+/* { dg-options "-w -O1 -fdump-tree-gimple -msse" { target { i?86-*-* x86_64-*-* } } } */
 
 
 /* We should be able to produce a BIT_FIELD_REF for each of these vector access. */
diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c b/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
index cb68093..e34532d 100644
--- a/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
+++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-2.c
@@ -1,5 +1,6 @@
 /* { dg-do compile } */
 /* { dg-options "-w -O1 -fdump-tree-optimized" } */
+/* { dg-options "-w -O1 -fdump-tree-optimized -msse" { target { i?86-*-* x86_64-*-* } } } */
 
 #define vector __attribute__(( vector_size(16) ))
 
diff --git a/gcc/testsuite/gcc.target/i386/vect-args.c b/gcc/testsuite/gcc.target/i386/vect-args.c
index 94b602d..fc45889 100644
--- a/gcc/testsuite/gcc.target/i386/vect-args.c
+++ b/gcc/testsuite/gcc.target/i386/vect-args.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-w" } */
+/* { dg-options "-w -Wno-psabi" } */
 
 /* SSE1 and SSE2 modes.  */
 typedef unsigned char V16QImode __attribute__((vector_size(16)));
-- 
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