From 87ee52efe73734c055ac647aa68e28f7c398c479 Mon Sep 17 00:00:00 2001 From: Kyrylo Tkachov Date: Tue, 10 Jun 2014 09:50:22 +0000 Subject: [ARM][doc] Improve description of AArch32 CRC32 intrinsics. * doc/arm-acle-intrinsics.texi: Specify when CRC32 intrinsics are available. Simplify description of __crc32d and __crc32cd intrinsics. * doc/extend.texi (ARM ACLE Intrinsics): Remove comment about CRC32 availability. From-SVN: r211402 --- gcc/ChangeLog | 8 ++++++++ gcc/doc/arm-acle-intrinsics.texi | 10 ++++++---- gcc/doc/extend.texi | 3 --- 3 files changed, 14 insertions(+), 7 deletions(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5d55985..bf68f34 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2014-06-10 Kyrylo Tkachov + + * doc/arm-acle-intrinsics.texi: Specify when CRC32 intrinsics are + available. + Simplify description of __crc32d and __crc32cd intrinsics. + * doc/extend.texi (ARM ACLE Intrinsics): Remove comment about CRC32 + availability. + 2014-06-10 Thomas Schwinge PR lto/61334 diff --git a/gcc/doc/arm-acle-intrinsics.texi b/gcc/doc/arm-acle-intrinsics.texi index e68f4cd..8c5523e 100644 --- a/gcc/doc/arm-acle-intrinsics.texi +++ b/gcc/doc/arm-acle-intrinsics.texi @@ -4,6 +4,10 @@ @subsubsection CRC32 intrinsics +These intrinsics are available when the CRC32 architecture extension is +specified, e.g. when the @option{-march=armv8-a+crc} switch is used, or when +the target processor specified with @option{-mcpu} supports it. + @itemize @bullet @item uint32_t __crc32b (uint32_t, uint8_t) @*@emph{Form of expected instruction(s):} @code{crc32b @var{r0}, @var{r0}, @var{r0}} @@ -25,8 +29,7 @@ @itemize @bullet @item uint32_t __crc32d (uint32_t, uint64_t) @*@emph{Form of expected instruction(s):} Two @code{crc32w @var{r0}, @var{r0}, @var{r0}} -instructions for AArch32. One @code{crc32w @var{w0}, @var{w0}, @var{x0}} instruction for -AArch64. +instructions. @end itemize @itemize @bullet @@ -50,6 +53,5 @@ AArch64. @itemize @bullet @item uint32_t __crc32cd (uint32_t, uint64_t) @*@emph{Form of expected instruction(s):} Two @code{crc32cw @var{r0}, @var{r0}, @var{r0}} -instructions for AArch32. One @code{crc32cw @var{w0}, @var{w0}, @var{x0}} instruction for -AArch64. +instructions. @end itemize diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 42db985..a79dbbf 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -10516,9 +10516,6 @@ when the @option{-mfpu=neon} switch is used: @node ARM ACLE Intrinsics @subsection ARM ACLE Intrinsics -These built-in intrinsics for the ARMv8-A CRC32 extension are available when -the @option{-march=armv8-a+crc} switch is used: - @include arm-acle-intrinsics.texi @node ARM Floating Point Status and Control Intrinsics -- cgit v1.1