From 7a5add18a367000a3a1056b937eac29de82cd482 Mon Sep 17 00:00:00 2001 From: Peter Bergner Date: Tue, 16 Jul 2013 16:06:02 -0500 Subject: rs6000.h (FIRST_PSEUDO_REGISTERS): Mention HTM registers in the comment. * config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTERS): Mention HTM registers in the comment. (DWARF_FRAME_REGISTERS): Subtract also the 3 HTM registers. (DWARF_REG_TO_UNWIND_COLUMN): Use DWARF_FRAME_REGISTERS rather than FIRST_PSEUDO_REGISTERS. From-SVN: r200988 --- gcc/ChangeLog | 13 +++++++++++-- gcc/config/rs6000/rs6000.h | 8 +++++--- 2 files changed, 16 insertions(+), 5 deletions(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6a8580c..d7a6e4d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,13 @@ -2013-07-16 Peter Bergner +2013-07-16 Jakub Jelinek + Peter Bergner + + * config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTERS): Mention HTM + registers in the comment. + (DWARF_FRAME_REGISTERS): Subtract also the 3 HTM registers. + (DWARF_REG_TO_UNWIND_COLUMN): Use DWARF_FRAME_REGISTERS + rather than FIRST_PSEUDO_REGISTERS. + +2013-07-16 Peter Bergner * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not enable extra ISA flags with TARGET_HTM. @@ -13,7 +22,7 @@ * tree-vect-data-refs.c (dr_group_sort_cmp): Do not use hash function in compare function for sorting. -2013-07-15 Peter Bergner +2013-07-15 Peter Bergner * config.gcc (powerpc*-*-*): Install htmintrin.h and htmxlintrin.h. * config/rs6000/t-rs6000 (MD_INCLUDES): Add htm.md. diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 6e2d916..8e96fbf 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -892,7 +892,9 @@ enum data_align { align_abi, align_opt, align_both }; in inline functions. Another pseudo (not included in DWARF_FRAME_REGISTERS) is soft frame - pointer, which is eventually eliminated in favor of SP or FP. */ + pointer, which is eventually eliminated in favor of SP or FP. + + The 3 HTM registers aren't also included in DWARF_FRAME_REGISTERS. */ #define FIRST_PSEUDO_REGISTER 117 @@ -900,7 +902,7 @@ enum data_align { align_abi, align_opt, align_both }; #define PRE_GCC3_DWARF_FRAME_REGISTERS 77 /* Add 32 dwarf columns for synthetic SPE registers. */ -#define DWARF_FRAME_REGISTERS ((FIRST_PSEUDO_REGISTER - 1) + 32) +#define DWARF_FRAME_REGISTERS ((FIRST_PSEUDO_REGISTER - 4) + 32) /* The SPE has an additional 32 synthetic registers, with DWARF debug info numbering for these registers starting at 1200. While eh_frame @@ -916,7 +918,7 @@ enum data_align { align_abi, align_opt, align_both }; We must map them here to avoid huge unwinder tables mostly consisting of unused space. */ #define DWARF_REG_TO_UNWIND_COLUMN(r) \ - ((r) > 1200 ? ((r) - 1200 + FIRST_PSEUDO_REGISTER - 1) : (r)) + ((r) > 1200 ? ((r) - 1200 + (DWARF_FRAME_REGISTERS - 32)) : (r)) /* Use standard DWARF numbering for DWARF debugging information. */ #define DBX_REGISTER_NUMBER(REGNO) rs6000_dbx_register_number (REGNO) -- cgit v1.1