From 73ce73fcaded5525c070ee4c9ed3ae16c98e86eb Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Wed, 10 Jan 2024 00:18:30 +0000 Subject: Daily bump. --- gcc/ChangeLog | 199 +++++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 201 +++++++++++++++++++++++++++++++++++++++++++++++ gcc/c-family/ChangeLog | 25 ++++++ gcc/c/ChangeLog | 5 ++ gcc/cp/ChangeLog | 189 ++++++++++++++++++++++++++++++++++++++++++++ gcc/m2/ChangeLog | 52 +++++++++++++ gcc/testsuite/ChangeLog | 203 ++++++++++++++++++++++++++++++++++++++++++++++++ 8 files changed, 875 insertions(+), 1 deletion(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 5d5cf71..55754ed 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,202 @@ +2024-01-09 Jeff Law + + * config/epiphany/constraints.md (Car): Allow -1024..1023, no more, + no less. + +2024-01-09 Richard Sandiford + + * config/mn10300/mn10300.md (subdi3_degenerate): Add isa attribute. + +2024-01-09 Tamar Christina + + * tree-vect-loop.cc (vectorizable_live_operation_1): Drop unused + restart_loop. + (vectorizable_live_operation): Likewise. + +2024-01-09 Tamar Christina + + PR tree-optimization/113199 + * tree-vect-loop.cc (vectorizable_live_operation_1): Use + BIT_FIELD_REF. + +2024-01-09 Jakub Jelinek + + PR target/113270 + * config.gcc (aarch64*-*-*): Add aarch64-builtins.h to target_gtfiles. + * config/aarch64/aarch64-builtins.cc (aarch64_simd_types): Add extern + GTY(()) declaration before the definition, drop GTY(()) drom the + definition. + +2024-01-09 Richard Biener + + PR tree-optimization/113026 + * tree-vect-loop-manip.cc (vect_do_peeling): Remove + redundant and wrong niter bound setting. Move niter + bound adjustment down. + +2024-01-09 Tamar Christina + + PR middle-end/113163 + * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): + Reject non-linear inductions that aren't supported. + +2024-01-09 Roger Sayle + + * config/arc/arc.cc (arc_shift_alg): New enumerated type for + left shift implementation strategies. + (arc_shift_info): Type for each entry of the shift strategy table. + (arc_shift_context_idx): Return a integer value for each code + generation context, used as an index + (arc_ashl_alg): Table indexed by context and shifted bit count. + (arc_split_ashl): Use the arc_ashl_alg table to select SImode + left shift implementation. + (arc_rtx_costs) : Use the arc_ashl_alg table to + provide accurate costs, when optimizing for speed or size. + +2024-01-09 Juzhe-Zhong + + * config/riscv/riscv-vector-costs.cc (loop_invariant_op_p): Fix loop invariant check. + +2024-01-09 Julian Brown + + * gimplify.cc (gimplify_expr): Ensure OMP_ARRAY_SECTION has been + processed out before gimplification. + * tree-pretty-print.cc (dump_generic_node): Support OMP_ARRAY_SECTION. + * tree.def (OMP_ARRAY_SECTION): New tree code. + +2024-01-09 Jakub Jelinek + + PR tree-optimization/113210 + * tree-vect-loop.cc (vect_get_loop_niters): If non-INTEGER_CST + value in *number_of_iterationsm1 PLUS_EXPR 1 is folded into + INTEGER_CST, recompute *number_of_iterationsm1 as the INTEGER_CST + minus 1. + +2024-01-09 Eric Botcazou + + PR rtl-optimization/113140 + * reorg.cc (fill_slots_from_thread): If we are to branch after the + last instruction of the function, create an end label. + +2024-01-09 Roger Sayle + Hongtao Liu + + PR target/112992 + * config/i386/i386-expand.cc + (ix86_convert_const_wide_int_to_broadcast): Allow call to + ix86_expand_vector_init_duplicate to fail, and return NULL_RTX. + (ix86_broadcast_from_constant): Revert recent change; Return a + suitable MEMREF independently of mode/target combinations. + (ix86_expand_vector_move): Allow ix86_expand_vector_init_duplicate + to decide whether expansion is possible/preferrable. Only try + forcing DImode constants to memory (and trying again) if calling + ix86_expand_vector_init_duplicate fails with an DImode immediate + constant. + (ix86_expand_vector_init_duplicate) : Try using + V4SImode for suitable immediate constants. + : Try using V8SImode for suitable constants. + : Fail for CONST_INT_P, i.e. use constant pool. + : Likewise. + : For CONST_INT_P try using V4SImode via widen. + : For CONT_INT_P try using V8HImode via widen. +