From 72b2bc46f5bdef6d8517e070f1225fb52e2c1cd0 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 25 Nov 2009 21:20:40 +0100 Subject: re PR target/42165 (-masm=intel doesn't know how to print AVX instructions) PR target/42165 * config/i386/i386.c (print_operand): For 32-byte memory use YMMWORD in -masm=intel mode. Use TBYTE instead of XWORD. * config/i386/i386.md (crc32modesuffix): Expand to nothing in -masm=intel mode. (sse4_2_crc32di): Print just crc32 instead of crc32q in -masm=intel mode. * config/i386/mmx.md (*mmx_pinsrw): Print correct size of memory operand in -masm=intel mode. * config/i386/sse.md (*avx_pinsr, *sse4_1_pinsrb, *sse2_pinsrw): Likewise. (sse_cvtss2siq, sse_cvtss2siq_2, sse_cvttss2siq): Don't print q suffix in -masm=intel mode. From-SVN: r154652 --- gcc/ChangeLog | 14 ++++++++++++++ gcc/config/i386/i386.c | 5 +++-- gcc/config/i386/i386.md | 4 ++-- gcc/config/i386/mmx.md | 5 ++++- gcc/config/i386/sse.md | 21 +++++++++++++++------ 5 files changed, 38 insertions(+), 11 deletions(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f099af8..c594572 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -3,6 +3,20 @@ * print-rtl.c (print_rtx): When printing newline, append print_rtx_head and indentation after the newline. + PR target/42165 + * config/i386/i386.c (print_operand): For 32-byte memory use + YMMWORD in -masm=intel mode. Use TBYTE instead of XWORD. + * config/i386/i386.md (crc32modesuffix): Expand to nothing + in -masm=intel mode. + (sse4_2_crc32di): Print just crc32 instead of crc32q in + -masm=intel mode. + * config/i386/mmx.md (*mmx_pinsrw): Print correct size of + memory operand in -masm=intel mode. + * config/i386/sse.md (*avx_pinsr, *sse4_1_pinsrb, + *sse2_pinsrw): Likewise. + (sse_cvtss2siq, sse_cvtss2siq_2, sse_cvttss2siq): Don't print + q suffix in -masm=intel mode. + 2009-11-25 Eric Botcazou PR target/10127 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 5bce7a4..f1bb9ec 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -11842,13 +11842,14 @@ print_operand (FILE *file, rtx x, int code) case 2: size = "WORD"; break; case 4: size = "DWORD"; break; case 8: size = "QWORD"; break; - case 12: size = "XWORD"; break; + case 12: size = "TBYTE"; break; case 16: if (GET_MODE (x) == XFmode) - size = "XWORD"; + size = "TBYTE"; else size = "XMMWORD"; break; + case 32: size = "YMMWORD"; break; default: gcc_unreachable (); } diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 66d879d..6059dd4 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -21168,7 +21168,7 @@ [(set_attr "type" "multi")]) (define_mode_iterator CRC32MODE [QI HI SI]) -(define_mode_attr crc32modesuffix [(QI "b") (HI "w") (SI "l")]) +(define_mode_attr crc32modesuffix [(QI "{b}") (HI "{w}") (SI "{l}")]) (define_mode_attr crc32modeconstraint [(QI "qm") (HI "rm") (SI "rm")]) (define_insn "sse4_2_crc32" @@ -21199,7 +21199,7 @@ (match_operand:DI 2 "nonimmediate_operand" "rm")] UNSPEC_CRC32))] "TARGET_64BIT && (TARGET_SSE4_2 || TARGET_CRC32)" - "crc32q\t{%2, %0|%0, %2}" + "crc32{q}\t{%2, %0|%0, %2}" [(set_attr "type" "sselog1") (set_attr "prefix_rep" "1") (set_attr "prefix_extra" "1") diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 83c54b2..b07b5e3 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -1250,7 +1250,10 @@ "TARGET_SSE || TARGET_3DNOW_A" { operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3]))); - return "pinsrw\t{%3, %k2, %0|%0, %k2, %3}"; + if (MEM_P (operands[2])) + return "pinsrw\t{%3, %2, %0|%0, %2, %3}"; + else + return "pinsrw\t{%3, %k2, %0|%0, %k2, %3}"; } [(set_attr "type" "mmxcvt") (set_attr "length_immediate" "1") diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 4944fac..8661b4a 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2734,7 +2734,7 @@ (parallel [(const_int 0)]))] UNSPEC_FIX_NOTRUNC))] "TARGET_SSE && TARGET_64BIT" - "%vcvtss2siq\t{%1, %0|%0, %1}" + "%vcvtss2si{q}\t{%1, %0|%0, %1}" [(set_attr "type" "sseicvt") (set_attr "athlon_decode" "double,vector") (set_attr "prefix_rep" "1") @@ -2746,7 +2746,7 @@ (unspec:DI [(match_operand:SF 1 "nonimmediate_operand" "x,m")] UNSPEC_FIX_NOTRUNC))] "TARGET_SSE && TARGET_64BIT" - "%vcvtss2siq\t{%1, %0|%0, %1}" + "%vcvtss2si{q}\t{%1, %0|%0, %1}" [(set_attr "type" "sseicvt") (set_attr "athlon_decode" "double,vector") (set_attr "amdfam10_decode" "double,double") @@ -2776,7 +2776,7 @@ (match_operand:V4SF 1 "nonimmediate_operand" "x,m") (parallel [(const_int 0)]))))] "TARGET_SSE && TARGET_64BIT" - "%vcvttss2siq\t{%1, %0|%0, %1}" + "%vcvttss2si{q}\t{%1, %0|%0, %1}" [(set_attr "type" "sseicvt") (set_attr "athlon_decode" "double,vector") (set_attr "amdfam10_decode" "double,double") @@ -7127,7 +7127,10 @@ "TARGET_AVX" { operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3]))); - return "vpinsr\t{%3, %k2, %1, %0|%0, %1, %k2, %3}"; + if (MEM_P (operands[2])) + return "vpinsr\t{%3, %2, %1, %0|%0, %1, %2, %3}"; + else + return "vpinsr\t{%3, %k2, %1, %0|%0, %1, %k2, %3}"; } [(set_attr "type" "sselog") (set (attr "prefix_extra") @@ -7148,7 +7151,10 @@ "TARGET_SSE4_1" { operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3]))); - return "pinsrb\t{%3, %k2, %0|%0, %k2, %3}"; + if (MEM_P (operands[2])) + return "pinsrb\t{%3, %2, %0|%0, %2, %3}"; + else + return "pinsrb\t{%3, %k2, %0|%0, %k2, %3}"; } [(set_attr "type" "sselog") (set_attr "prefix_extra" "1") @@ -7165,7 +7171,10 @@ "TARGET_SSE2" { operands[3] = GEN_INT (exact_log2 (INTVAL (operands[3]))); - return "pinsrw\t{%3, %k2, %0|%0, %k2, %3}"; + if (MEM_P (operands[2])) + return "pinsrw\t{%3, %2, %0|%0, %2, %3}"; + else + return "pinsrw\t{%3, %k2, %0|%0, %k2, %3}"; } [(set_attr "type" "sselog") (set_attr "prefix_data16" "1") -- cgit v1.1