From 715317331994d3d69395056f77bfe7ac613af009 Mon Sep 17 00:00:00 2001 From: Andrew Stubbs Date: Wed, 7 Aug 2024 15:35:18 +0000 Subject: amdgcn: Fix VGPR max count The metadata for RDNA3 kernels allocates VGPRs in blocks of 12, which means the maximum usable number of registers is 252. This patch prevents the compiler from exceeding this artifical limit. gcc/ChangeLog: * config/gcn/gcn.cc (gcn_conditional_register_usage): Fix registers remaining after maximum allocation using TARGET_VGPR_GRANULARITY. --- gcc/config/gcn/gcn.cc | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'gcc') diff --git a/gcc/config/gcn/gcn.cc b/gcc/config/gcn/gcn.cc index b22132d..0725d15 100644 --- a/gcc/config/gcn/gcn.cc +++ b/gcc/config/gcn/gcn.cc @@ -2493,6 +2493,13 @@ gcn_secondary_reload (bool in_p, rtx x, reg_class_t rclass, static void gcn_conditional_register_usage (void) { + /* Some architectures have a register allocation granularity that does not + permit use of the full register count. */ + for (int i = 256 - (256 % TARGET_VGPR_GRANULARITY); + i < 256; + i++) + fixed_regs[VGPR_REGNO (i)] = call_used_regs[VGPR_REGNO (i)] = 1; + if (!cfun || !cfun->machine) return; -- cgit v1.1