From 0bc0e6173f517bea7b80913199a8a7286d5a5347 Mon Sep 17 00:00:00 2001 From: Martin Liska Date: Fri, 4 Jun 2021 13:12:02 +0200 Subject: genhooks: remove dead code gcc/ChangeLog: * genhooks.c (emit_findices): Remove unused function. (emit_documentation): Do not call emit_findices and do not search for @Fcode directives. --- gcc/genhooks.c | 33 +++------------------------------ 1 file changed, 3 insertions(+), 30 deletions(-) (limited to 'gcc') diff --git a/gcc/genhooks.c b/gcc/genhooks.c index 2e63940..ebe0d09 100644 --- a/gcc/genhooks.c +++ b/gcc/genhooks.c @@ -38,26 +38,6 @@ static struct hook_desc hook_array[] = { #undef DEFHOOK }; -/* For each @Fcode in the first paragraph of the documentation string DOC, - print an @findex directive. HOOK_NAME is the name of the hook this bit of - documentation pertains to. */ -static void -emit_findices (const char *doc, const char *hook_name) -{ - const char *end = strstr (doc, "\n\n"); - const char *fcode; - - while ((fcode = strstr (doc, "@Fcode{")) && (!end || fcode < end)) - { - fcode += strlen ("@Fcode{"); - doc = strchr (fcode, '}'); - if (!doc) - fatal ("Malformed @Fcode for hook %s\n", hook_name); - printf ("@findex %.*s\n", (int) (doc - fcode), fcode); - doc = fcode; - } -} - /* Return an upper-case copy of IN. */ static char * upstrdup (const char *in) @@ -99,8 +79,8 @@ s_hook_eq_p (const void *p1, const void *p2) signature, followed by the string from the doc field. The documentation is bracketed in @deftypefn / @deftypevr and a matching @end. - While emitting the doc field, @Fcode is translated to @code, and an - @findex entry is added to the affected paragraph. + While emitting the doc field, an @findex entry is added + to the affected paragraph. If the doc field starts with '*', the leading '*' is stripped, and the doc field is otherwise emitted unaltered; no function signature/ @deftypefn/deftypevr/@end is emitted. @@ -206,7 +186,7 @@ emit_documentation (const char *in_fname) { const char *q, *e; const char *deftype; - const char *doc, *fcode, *p_end; + const char *doc, *p_end; /* A leading '*' means to output the documentation string without further processing. */ @@ -216,7 +196,6 @@ emit_documentation (const char *in_fname) { if (i != shp->pos) printf ("\n\n"); - emit_findices (hook_array[i].doc, name); /* Print header. Function-valued hooks have a parameter list, unlike POD-valued ones. */ @@ -262,13 +241,7 @@ emit_documentation (const char *in_fname) /* Find paragraph end. */ p_end = strstr (doc, "\n\n"); p_end = (p_end ? p_end + 2 : doc + strlen (doc)); - /* Print paragraph, emitting @Fcode as @code. */ - for (; (fcode = strstr (doc, "@Fcode{")) && fcode < p_end; - doc = fcode + 2) - printf ("%.*s@", (int) (fcode - doc), doc); printf ("%.*s", (int) (p_end - doc), doc); - /* Emit function indices for next paragraph. */ - emit_findices (p_end, name); } printf ("\n@end %s", deftype); } -- cgit v1.1 From fcbbf786aeb7f0d5cf8ab138b61944439dfc046b Mon Sep 17 00:00:00 2001 From: Martin Liska Date: Sun, 6 Jun 2021 17:29:44 +0200 Subject: docs: Add missing @headitem for tables. gcc/ChangeLog: * doc/extend.texi: Add missing @headitem. * doc/invoke.texi: Likewise. * doc/objc.texi: Likewise. --- gcc/doc/extend.texi | 12 ++++++------ gcc/doc/invoke.texi | 2 +- gcc/doc/objc.texi | 6 +++--- 3 files changed, 10 insertions(+), 10 deletions(-) (limited to 'gcc') diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 8711745..22f9e93 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -15419,7 +15419,7 @@ to make this classification clear at a glance, the arguments and return values are given the following pseudo types: @multitable @columnfractions .20 .30 .15 .35 -@item Pseudo type @tab Real C type @tab Constant? @tab Description +@headitem Pseudo type @tab Real C type @tab Constant? @tab Description @item @code{uh} @tab @code{unsigned short} @tab No @tab an unsigned halfword @item @code{uw1} @tab @code{unsigned int} @tab No @tab an unsigned word @item @code{sw1} @tab @code{int} @tab No @tab a signed word @@ -15455,7 +15455,7 @@ for more details. The functions listed below map directly to FR-V I-type instructions. @multitable @columnfractions .45 .32 .23 -@item Function prototype @tab Example usage @tab Assembly output +@headitem Function prototype @tab Example usage @tab Assembly output @item @code{sw1 __ADDSS (sw1, sw1)} @tab @code{@var{c} = __ADDSS (@var{a}, @var{b})} @tab @code{ADDSS @var{a},@var{b},@var{c}} @@ -15494,7 +15494,7 @@ The functions listed below map directly to FR-V I-type instructions. The functions listed below map directly to FR-V M-type instructions. @multitable @columnfractions .45 .32 .23 -@item Function prototype @tab Example usage @tab Assembly output +@headitem Function prototype @tab Example usage @tab Assembly output @item @code{uw1 __MABSHS (sw1)} @tab @code{@var{b} = __MABSHS (@var{a})} @tab @code{MABSHS @var{a},@var{b}} @@ -15886,7 +15886,7 @@ hardware support exists. @code{a} and @code{b} are @code{v4i8} values, and @code{c} and @code{d} are @code{v2q15} values. @multitable @columnfractions .50 .50 -@item C code @tab MIPS instruction +@headitem C code @tab MIPS instruction @item @code{a + b} @tab @code{addu.qb} @item @code{c + d} @tab @code{addq.ph} @item @code{a - b} @tab @code{subu.qb} @@ -15898,7 +15898,7 @@ hardware support exists for the DSP ASE REV 2. @code{e} and @code{f} are @code{v2i16} values. @multitable @columnfractions .50 .50 -@item C code @tab MIPS instruction +@headitem C code @tab MIPS instruction @item @code{e * f} @tab @code{mul.ph} @end multitable @@ -16284,7 +16284,7 @@ support exists. @code{a}, @code{b} and @code{c} are @code{v2sf} values and @code{x} is an integral value. @multitable @columnfractions .50 .50 -@item C code @tab MIPS instruction +@headitem C code @tab MIPS instruction @item @code{a + b} @tab @code{add.ps} @item @code{a - b} @tab @code{sub.ps} @item @code{-a} @tab @code{neg.ps} diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 7102999..04048cd 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -23602,7 +23602,7 @@ and @samp{cpu32}. The ColdFire @var{cpu}s are given by the table below, which also classifies the CPUs into families: @multitable @columnfractions 0.20 0.80 -@item @strong{Family} @tab @strong{@samp{-mcpu} arguments} +@headitem @strong{Family} @tab @strong{@samp{-mcpu} arguments} @item @samp{51} @tab @samp{51} @samp{51ac} @samp{51ag} @samp{51cn} @samp{51em} @samp{51je} @samp{51jf} @samp{51jg} @samp{51jm} @samp{51mm} @samp{51qe} @samp{51qm} @item @samp{5206} @tab @samp{5202} @samp{5204} @samp{5206} @item @samp{5206e} @tab @samp{5206e} diff --git a/gcc/doc/objc.texi b/gcc/doc/objc.texi index a8c5942..cfd2470 100644 --- a/gcc/doc/objc.texi +++ b/gcc/doc/objc.texi @@ -382,7 +382,7 @@ compiler on an i386 machine: @sp 1 @multitable @columnfractions .60 .40 -@item Objective-C type +@headitem Objective-C type @tab Compiler encoding @item @smallexample @@ -416,7 +416,7 @@ Objective-C type specifiers: @sp 1 @multitable @columnfractions .25 .75 -@item Specifier +@headitem Specifier @tab Encoding @item @code{const} @tab @code{r} @@ -445,7 +445,7 @@ Note how @code{const} interacts with pointers: @sp 1 @multitable @columnfractions .25 .75 -@item Objective-C type +@headitem Objective-C type @tab Compiler encoding @item @smallexample -- cgit v1.1 From 7fa4db39b6bcd207bd2bffff52023ff6b155bd15 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Sun, 6 Jun 2021 19:37:06 +0200 Subject: openmp: Call c_omp_adjust_map_clauses even for combined target [PR100902] When looking at in_reduction support for target, I've noticed that c_omp_adjust_map_clauses is not called for the combined target case. The following patch fixes it. Unfortunately, there are other issues. One is (also mentioned in the PR) that currently the pointer attachment stuff seems to be clause ordering dependent (the standard says that clause ordering on the same construct does not matter), the baz and qux cases in the PR are rejected while when swapped it is accepted. Note, the order of clauses in GCC really is treated as insignificant initially and only later on the compiler can adjust the ordering (e.g. when we sort map clauses based on what they refer to etc.) and in particular, clauses from parsing is reverse of the order in user code, while c_omp_split_clauses performed for combined/composite constructs typically reverses that ordering, i.e. makes it follow the user code ordering. And another one is I'm slightly afraid c_omp_adjust_map_clauses might misbehave in templates, though haven't tried to verify it with testcases. When processing_template_decl, the non-dependent clauses will be handled usually the same as when not in a template, but dependent clauses aren't processed or only limited processing is done there, and rest is deferred till later. From quick skimming of c_omp_adjust_map_clauses, it seems it might not be very happy about non-processed map clauses that might still have the TREE_LIST representation of array sections, or might not have finalized decls or base decls etc. So, for this I wonder if cp_parser_omp_target (and other cp/parser.c callers of c_omp_adjust_map_clauses) shouldn't call it only if (!processing_template_decl) - perhaps you could add cp_omp_adjust_map_clauses wrapper that would be if (!processing_template_decl) c_omp_adjust_map_clauses (...); - and call c_omp_adjust_map_clauses from within pt.c after the clauses are tsubsted and finish_omp_clauses is called again. 2021-06-06 Jakub Jelinek PR c/100902 * c-parser.c (c_parser_omp_target): Call c_omp_adjust_map_clauses even when target is combined with other constructs. * parser.c (cp_parser_omp_target): Call c_omp_adjust_map_clauses even when target is combined with other constructs. * c-c++-common/gomp/pr100902-1.c: New test. --- gcc/c/c-parser.c | 1 + gcc/cp/parser.c | 1 + gcc/testsuite/c-c++-common/gomp/pr100902-1.c | 17 +++++++++++++++++ 3 files changed, 19 insertions(+) create mode 100644 gcc/testsuite/c-c++-common/gomp/pr100902-1.c (limited to 'gcc') diff --git a/gcc/c/c-parser.c b/gcc/c/c-parser.c index c491b12..add3353 100644 --- a/gcc/c/c-parser.c +++ b/gcc/c/c-parser.c @@ -20133,6 +20133,7 @@ c_parser_omp_target (c_parser *parser, enum pragma_context context, bool *if_p) tree stmt = make_node (OMP_TARGET); TREE_TYPE (stmt) = void_type_node; OMP_TARGET_CLAUSES (stmt) = cclauses[C_OMP_CLAUSE_SPLIT_TARGET]; + c_omp_adjust_map_clauses (OMP_TARGET_CLAUSES (stmt), true); OMP_TARGET_BODY (stmt) = block; OMP_TARGET_COMBINED (stmt) = 1; SET_EXPR_LOCATION (stmt, loc); diff --git a/gcc/cp/parser.c b/gcc/cp/parser.c index 4a46828..0649bf9 100644 --- a/gcc/cp/parser.c +++ b/gcc/cp/parser.c @@ -42233,6 +42233,7 @@ cp_parser_omp_target (cp_parser *parser, cp_token *pragma_tok, tree stmt = make_node (OMP_TARGET); TREE_TYPE (stmt) = void_type_node; OMP_TARGET_CLAUSES (stmt) = cclauses[C_OMP_CLAUSE_SPLIT_TARGET]; + c_omp_adjust_map_clauses (OMP_TARGET_CLAUSES (stmt), true); OMP_TARGET_BODY (stmt) = body; OMP_TARGET_COMBINED (stmt) = 1; SET_EXPR_LOCATION (stmt, pragma_tok->location); diff --git a/gcc/testsuite/c-c++-common/gomp/pr100902-1.c b/gcc/testsuite/c-c++-common/gomp/pr100902-1.c new file mode 100644 index 0000000..babd01a --- /dev/null +++ b/gcc/testsuite/c-c++-common/gomp/pr100902-1.c @@ -0,0 +1,17 @@ +/* PR c/100902 */ + +void +foo (int *ptr) +{ + #pragma omp target map (ptr, ptr[:4]) + #pragma omp parallel master + ptr[0] = 1; +} + +void +bar (int *ptr) +{ + #pragma omp target parallel map (ptr[:4], ptr) + #pragma omp master + ptr[0] = 1; +} -- cgit v1.1 From cb4b99be48af1c0911ce2a957af20d9cd946f364 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Sun, 6 Jun 2021 19:38:41 +0200 Subject: openmp: Add testcase for scan directive with nested functions > In convert_nonlocal_omp_clauses, the following clauses are > missing: OMP_CLAUSE_AFFINITY, OMP_CLAUSE_DEVICE_TYPE, > OMP_CLAUSE_EXCLUSIVE, OMP_CLAUSE_INCLUSIVE. OMP_CLAUSE_{EXCLUSIVE,INCLUSIVE} isn't needed, because we don't walk the clauses at all for GIMPLE_OMP_SCAN. It would be a bug if we used the exclusive/inclusive operands after gimplification, but we apparently don't do that, all we check is whether the OMP_CLAUSE_KIND of the first clause (all should be the same) is OMP_CLAUSE_EXCLUSIVE or OMP_CLAUSE_INCLUSIVE, nothing else. That said, I think we should have a testcase. 2021-06-06 Jakub Jelinek * gcc.dg/gomp/scan-1.c: New test. --- gcc/testsuite/gcc.dg/gomp/scan-1.c | 51 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/gomp/scan-1.c (limited to 'gcc') diff --git a/gcc/testsuite/gcc.dg/gomp/scan-1.c b/gcc/testsuite/gcc.dg/gomp/scan-1.c new file mode 100644 index 0000000..807071d --- /dev/null +++ b/gcc/testsuite/gcc.dg/gomp/scan-1.c @@ -0,0 +1,51 @@ +int baz (void); +void qux (int); +int r; + +int +foo (void) +{ + int r = 0, i; + void bar (void) { r++; } + #pragma omp parallel for reduction(inscan, +:r) + for (i = 0; i < 64; i++) + { + r += baz (); + #pragma omp scan inclusive(r) + qux (r); + } + #pragma omp parallel for reduction(inscan, +:r) + for (i = 0; i < 64; i++) + { + qux (r); + #pragma omp scan exclusive(r) + r += baz (); + } + bar (); + return r; +} + +int +corge (void) +{ + int r = 0, i; + void bar (void) + { + #pragma omp parallel for reduction(inscan, +:r) + for (i = 0; i < 64; i++) + { + r += baz (); + #pragma omp scan inclusive(r) + qux (r); + } + #pragma omp parallel for reduction(inscan, +:r) + for (i = 0; i < 64; i++) + { + qux (r); + #pragma omp scan exclusive(r) + r += baz (); + } + } + bar (); + return r; +} -- cgit v1.1 From 09bf5279e87a15f658e37c7f873ccc40e5ef2576 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Sun, 6 Jun 2021 22:07:05 +0200 Subject: i386: Clean up constraints.md MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No functional changes. 2021-06-06 Uroš Bizjak gcc/ * config/i386/constraints.md (Bs): Remove boolean operators from match_test RTX. (Bw): Ditto. (L): Ditto. (M): Use "mode" variable instead of GET_MODE (op) in match_test RTX. (Wz): Ditto. --- gcc/config/i386/constraints.md | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'gcc') diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md index eaa582d..485e3f5 100644 --- a/gcc/config/i386/constraints.md +++ b/gcc/config/i386/constraints.md @@ -198,7 +198,8 @@ (ior (and (not (match_test "TARGET_INDIRECT_BRANCH_REGISTER")) (not (match_test "TARGET_X32")) (match_operand 0 "sibcall_memory_operand")) - (and (match_test "TARGET_X32 && Pmode == DImode") + (and (match_test "TARGET_X32") + (match_test "Pmode == DImode") (match_operand 0 "GOT_memory_operand")))) (define_constraint "Bw" @@ -206,7 +207,8 @@ (ior (and (not (match_test "TARGET_INDIRECT_BRANCH_REGISTER")) (not (match_test "TARGET_X32")) (match_operand 0 "memory_operand")) - (and (match_test "TARGET_X32 && Pmode == DImode") + (and (match_test "TARGET_X32") + (match_test "Pmode == DImode") (match_operand 0 "GOT_memory_operand")))) (define_constraint "Bz" @@ -239,8 +241,9 @@ "@code{0xFF}, @code{0xFFFF} or @code{0xFFFFFFFF} for AND as a zero-extending move." (and (match_code "const_int") - (match_test "ival == 0xff || ival == 0xffff - || ival == (HOST_WIDE_INT) 0xffffffff"))) + (ior (match_test "ival == 0xff") + (match_test "ival == 0xffff") + (match_test "ival == (HOST_WIDE_INT) 0xffffffff")))) (define_constraint "M" "0, 1, 2, or 3 (shifts for the @code{lea} instruction)." @@ -289,14 +292,14 @@ to fit that range (for sign-extending conversion operations that require non-VOIDmode immediate operands)." (and (match_operand 0 "x86_64_immediate_operand") - (match_test "GET_MODE (op) != VOIDmode"))) + (match_test "mode != VOIDmode"))) (define_constraint "Wz" "32-bit unsigned integer constant, or a symbolic reference known to fit that range (for zero-extending conversion operations that require non-VOIDmode immediate operands)." (and (match_operand 0 "x86_64_zext_immediate_operand") - (match_test "GET_MODE (op) != VOIDmode"))) + (match_test "mode != VOIDmode"))) (define_constraint "Wd" "128-bit integer constant where both the high and low 64-bit word -- cgit v1.1 From 03d921abe60fe9ff54a3c449eff1531e73a19215 Mon Sep 17 00:00:00 2001 From: David Edelsohn Date: Wed, 2 Jun 2021 13:32:45 -0400 Subject: aix: Use assemble_name to output BSS section name. The code to emit BSS CSECT needs to support user assembler name. * config/rs6000/rs6000.c (rs6000_xcoff_asm_output_aligned_decl_common): Use assemble_name to output BSS section name. --- gcc/config/rs6000/rs6000.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'gcc') diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 835af77..b01bb5c 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -21654,10 +21654,16 @@ rs6000_xcoff_asm_output_aligned_decl_common (FILE *stream, /* Globalize TLS BSS. */ if (TREE_PUBLIC (decl) && DECL_THREAD_LOCAL_P (decl)) - fprintf (stream, "\t.globl %s\n", name); + { + fputs (GLOBAL_ASM_OP, stream); + assemble_name (stream, name); + fputc ('\n', stream); + } /* Switch to section and skip space. */ - fprintf (stream, "\t.csect %s,%u\n", name, align2); + fputs ("\t.csect ", stream); + assemble_name (stream, name); + fprintf (stream, ",%u\n", align2); ASM_DECLARE_OBJECT_NAME (stream, name, decl); ASM_OUTPUT_SKIP (stream, size ? size : 1); return; -- cgit v1.1 From fed94fc9e704b0de228499495b7ca4d4c79ef76b Mon Sep 17 00:00:00 2001 From: Eric Botcazou Date: Sun, 6 Jun 2021 23:54:24 +0200 Subject: Reimplement LEAF_REG_REMAP macro for the SPARC The current implementation as an array of chars is indeed a bit awkward so this reimplements it as a function taking and returning an int. gcc/ * config/sparc/sparc-protos.h (order_regs_for_local_alloc): Rename to... (sparc_order_regs_for_local_alloc): ...this. (sparc_leaf_reg_remap): Declare. * config/sparc/sparc.h (ADJUST_REG_ALLOC_ORDER): Adjust. (LEAF_REG_REMAP): Reimplement as call to sparc_leaf_reg_remap. * config/sparc/sparc.c (leaf_reg_remap): Delete. (order_regs_for_local_alloc): Rename to... (sparc_order_regs_for_local_alloc): ...this. (sparc_leaf_reg_remap): New function. (sparc_conditional_register_usage): Do not modify leaf_reg_remap. --- gcc/config/sparc/sparc-protos.h | 3 +- gcc/config/sparc/sparc.c | 67 ++++++++++++++++++++--------------------- gcc/config/sparc/sparc.h | 5 ++- 3 files changed, 37 insertions(+), 38 deletions(-) (limited to 'gcc') diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h index ad875cc..8879ac3 100644 --- a/gcc/config/sparc/sparc-protos.h +++ b/gcc/config/sparc/sparc-protos.h @@ -30,7 +30,8 @@ extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); extern unsigned long sparc_type_code (tree); #endif /* TREE_CODE */ -extern void order_regs_for_local_alloc (void); +extern void sparc_order_regs_for_local_alloc (void); +extern int sparc_leaf_reg_remap (int); extern int sparc_initial_elimination_offset (int); extern void sparc_expand_prologue (void); extern void sparc_flat_expand_prologue (void); diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index b6e66dc..04fc80f 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -507,25 +507,6 @@ static const struct processor_costs *sparc_costs = &cypress_costs; ((TARGET_ARCH64 && !TARGET_CM_MEDLOW) || flag_pic) #endif -/* Vector to say how input registers are mapped to output registers. - HARD_FRAME_POINTER_REGNUM cannot be remapped by this function to - eliminate it. You must use -fomit-frame-pointer to get that. */ -char leaf_reg_remap[] = -{ 0, 1, 2, 3, 4, 5, 6, 7, - -1, -1, -1, -1, -1, -1, 14, -1, - -1, -1, -1, -1, -1, -1, -1, -1, - 8, 9, 10, 11, 12, 13, -1, 15, - - 32, 33, 34, 35, 36, 37, 38, 39, - 40, 41, 42, 43, 44, 45, 46, 47, - 48, 49, 50, 51, 52, 53, 54, 55, - 56, 57, 58, 59, 60, 61, 62, 63, - 64, 65, 66, 67, 68, 69, 70, 71, - 72, 73, 74, 75, 76, 77, 78, 79, - 80, 81, 82, 83, 84, 85, 86, 87, - 88, 89, 90, 91, 92, 93, 94, 95, - 96, 97, 98, 99, 100, 101, 102}; - /* Vector, indexed by hard register number, which contains 1 for a register that is allowable in a candidate for leaf function treatment. */ @@ -8863,18 +8844,18 @@ epilogue_renumber (rtx *where, int test) /* Leaf functions and non-leaf functions have different needs. */ -static const int -reg_leaf_alloc_order[] = REG_LEAF_ALLOC_ORDER; +static const int reg_leaf_alloc_order[] = REG_LEAF_ALLOC_ORDER; -static const int -reg_nonleaf_alloc_order[] = REG_ALLOC_ORDER; +static const int reg_nonleaf_alloc_order[] = REG_ALLOC_ORDER; -static const int *const reg_alloc_orders[] = { +static const int *const reg_alloc_orders[] = +{ reg_leaf_alloc_order, - reg_nonleaf_alloc_order}; + reg_nonleaf_alloc_order +}; void -order_regs_for_local_alloc (void) +sparc_order_regs_for_local_alloc (void) { static int last_order_nonleaf = 1; @@ -8886,7 +8867,28 @@ order_regs_for_local_alloc (void) FIRST_PSEUDO_REGISTER * sizeof (int)); } } - + +int +sparc_leaf_reg_remap (int regno) +{ + gcc_checking_assert (regno >= 0); + + /* Do not remap in flat mode. */ + if (TARGET_FLAT) + return regno; + + /* Do not remap global, stack pointer or floating-point registers. */ + if (regno < 8 || regno == STACK_POINTER_REGNUM || regno > SPARC_LAST_INT_REG) + return regno; + + /* Neither out nor local nor frame pointer registers must appear. */ + if ((regno >= 8 && regno <= 23) || regno == HARD_FRAME_POINTER_REGNUM) + return -1; + + /* Remap in to out registers. */ + return regno - 16; +} + /* Return 1 if REG and MEM are legitimate enough to allow the various MEM<-->REG splits to be run. */ @@ -12983,14 +12985,11 @@ sparc_conditional_register_usage (void) fixed_regs[4] = 1; else if (fixed_regs[4] == 2) fixed_regs[4] = 0; + + /* Disable leaf function optimization in flat mode. */ if (TARGET_FLAT) - { - int regno; - /* Disable leaf functions. */ - memset (sparc_leaf_regs, 0, FIRST_PSEUDO_REGISTER); - for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) - leaf_reg_remap [regno] = regno; - } + memset (sparc_leaf_regs, 0, FIRST_PSEUDO_REGISTER); + if (TARGET_VIS) global_regs[SPARC_GSR_REG] = 1; } diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 4834575..4da5a06 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -965,13 +965,12 @@ extern enum reg_class sparc_regno_reg_class[FIRST_PSEUDO_REGISTER]; 96, 97, 98, 99, /* %fcc0-3 */ \ 100, 0, 14, 30, 31, 101, 102 } /* %icc, %g0, %o6, %i6, %i7, %sfp, %gsr */ -#define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc () +#define ADJUST_REG_ALLOC_ORDER sparc_order_regs_for_local_alloc () extern char sparc_leaf_regs[]; #define LEAF_REGISTERS sparc_leaf_regs -extern char leaf_reg_remap[]; -#define LEAF_REG_REMAP(REGNO) (leaf_reg_remap[REGNO]) +#define LEAF_REG_REMAP(REGNO) sparc_leaf_reg_remap (REGNO) /* The class value for index registers, and the one for base regs. */ #define INDEX_REG_CLASS GENERAL_REGS -- cgit v1.1 From 7d6987e90d1181de8dc51f9ba2313052faea080e Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Mon, 7 Jun 2021 00:16:23 +0000 Subject: Daily bump. --- gcc/ChangeLog | 44 ++++++++++++++++++++++++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/c/ChangeLog | 14 ++++++++++++++ gcc/cp/ChangeLog | 6 ++++++ gcc/testsuite/ChangeLog | 13 +++++++++++++ 5 files changed, 78 insertions(+), 1 deletion(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d78b97c..1c7dc42 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,47 @@ +2021-06-06 Eric Botcazou + + * config/sparc/sparc-protos.h (order_regs_for_local_alloc): Rename + to... + (sparc_order_regs_for_local_alloc): ...this. + (sparc_leaf_reg_remap): Declare. + * config/sparc/sparc.h (ADJUST_REG_ALLOC_ORDER): Adjust. + (LEAF_REG_REMAP): Reimplement as call to sparc_leaf_reg_remap. + * config/sparc/sparc.c (leaf_reg_remap): Delete. + (order_regs_for_local_alloc): Rename to... + (sparc_order_regs_for_local_alloc): ...this. + (sparc_leaf_reg_remap): New function. + (sparc_conditional_register_usage): Do not modify leaf_reg_remap. + +2021-06-06 David Edelsohn + + * config/rs6000/rs6000.c (rs6000_xcoff_asm_output_aligned_decl_common): + Use assemble_name to output BSS section name. + +2021-06-06 Uroš Bizjak + + * config/i386/constraints.md (Bs): + Remove boolean operators from match_test RTX. + (Bw): Ditto. + (L): Ditto. + (M): Use "mode" variable instead of GET_MODE (op) in match_test RTX. + (Wz): Ditto. + +2021-06-06 Martin Liska + + * doc/extend.texi: Add missing @headitem. + * doc/invoke.texi: Likewise. + * doc/objc.texi: Likewise. + +2021-06-06 Martin Liska + + * genhooks.c (emit_findices): Remove unused function. + (emit_documentation): Do not call emit_findices + and do not search for @Fcode directives. + +2021-06-06 Martin Liska + + * doc/invoke.texi: Remove extra character. + 2021-06-05 Kewen Lin * config/sh/sh.md (doloop_end_split): Fix empty split condition. diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP index 09dbf4d..0c8a502 100644 --- a/gcc/DATESTAMP +++ b/gcc/DATESTAMP @@ -1 +1 @@ -20210606 +20210607 diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog index 747f53f..ff665e3 100644 --- a/gcc/c/ChangeLog +++ b/gcc/c/ChangeLog @@ -1,3 +1,17 @@ +2021-06-06 Jakub Jelinek + + PR c/100902 + * c-parser.c (c_parser_omp_target): Call c_omp_adjust_map_clauses + even when target is combined with other constructs. + +2021-06-06 Eric Botcazou + + PR c/100920 + * c-decl.c (finish_struct): Fix thinko in previous change. + * c-typeck.c (convert_for_assignment): Do not warn on pointer + assignment and initialization for storage order purposes if the + RHS is a call to a DECL_IS_MALLOC function. + 2021-06-04 Martin Sebor PR c/100783 diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog index f1537e5..7542375 100644 --- a/gcc/cp/ChangeLog +++ b/gcc/cp/ChangeLog @@ -1,3 +1,9 @@ +2021-06-06 Jakub Jelinek + + PR c/100902 + * parser.c (cp_parser_omp_target): Call c_omp_adjust_map_clauses + even when target is combined with other constructs. + 2021-06-04 Patrick Palka PR c++/100893 diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 5e19bb9..d4f10b1 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,16 @@ +2021-06-06 Jakub Jelinek + + * gcc.dg/gomp/scan-1.c: New test. + +2021-06-06 Jakub Jelinek + + PR c/100902 + * c-c++-common/gomp/pr100902-1.c: New test. + +2021-06-06 Eric Botcazou + + * gcc.dg/sso-14.c: New test. + 2021-06-05 José Rui Faustino de Sousa PR fortran/100120 -- cgit v1.1 From 16465ceb06cc1f65cfca3c0eb2c1ee27ab03bdfd Mon Sep 17 00:00:00 2001 From: liuhongt Date: Tue, 1 Jun 2021 09:00:57 +0800 Subject: CALL_INSN may not be a real function call. Use "used" flag for CALL_INSN to indicate it's a fake call. If it's a fake call, it won't have its own function stack. gcc/ChangeLog PR target/82735 * df-scan.c (df_get_call_refs): When call_insn is a fake call, it won't use stack pointer reg. * final.c (leaf_function_p): When call_insn is a fake call, it won't affect caller as a leaf function. * reg-stack.c (callee_clobbers_any_stack_reg): New. (subst_stack_regs): When call_insn doesn't clobber any stack reg, don't clear the arguments. * rtl.c (shallow_copy_rtx): Don't clear flag used when orig is a insn. * shrink-wrap.c (requires_stack_frame_p): No need for stack frame for a fake call. * rtl.h (FAKE_CALL_P): New macro. --- gcc/df-scan.c | 3 ++- gcc/final.c | 3 ++- gcc/reg-stack.c | 18 +++++++++++++++++- gcc/rtl.c | 6 ++++-- gcc/rtl.h | 5 +++++ gcc/shrink-wrap.c | 2 +- 6 files changed, 31 insertions(+), 6 deletions(-) (limited to 'gcc') diff --git a/gcc/df-scan.c b/gcc/df-scan.c index 6691c3e..1268536 100644 --- a/gcc/df-scan.c +++ b/gcc/df-scan.c @@ -3090,7 +3090,8 @@ df_get_call_refs (class df_collection_rec *collection_rec, for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) { - if (i == STACK_POINTER_REGNUM) + if (i == STACK_POINTER_REGNUM + && !FAKE_CALL_P (insn_info->insn)) /* The stack ptr is used (honorarily) by a CALL insn. */ df_ref_record (DF_REF_BASE, collection_rec, regno_reg_rtx[i], NULL, bb, insn_info, DF_REF_REG_USE, diff --git a/gcc/final.c b/gcc/final.c index 38c3d70..dba0b0a 100644 --- a/gcc/final.c +++ b/gcc/final.c @@ -4106,7 +4106,8 @@ leaf_function_p (void) for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) { if (CALL_P (insn) - && ! SIBLING_CALL_P (insn)) + && ! SIBLING_CALL_P (insn) + && ! FAKE_CALL_P (insn)) return 0; if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE diff --git a/gcc/reg-stack.c b/gcc/reg-stack.c index 25210f0c..1d9ea03 100644 --- a/gcc/reg-stack.c +++ b/gcc/reg-stack.c @@ -174,6 +174,7 @@ #include "reload.h" #include "tree-pass.h" #include "rtl-iter.h" +#include "function-abi.h" #ifdef STACK_REGS @@ -2368,6 +2369,18 @@ subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack) } } } + +/* Return true if a function call is allowed to alter some or all bits + of any stack reg. */ +static bool +callee_clobbers_any_stack_reg (const function_abi & callee_abi) +{ + for (unsigned regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++) + if (callee_abi.clobbers_at_least_part_of_reg_p (regno)) + return true; + return false; +} + /* Substitute stack hard reg numbers for stack virtual registers in INSN. Non-stack register numbers are not changed. REGSTACK is the @@ -2382,7 +2395,10 @@ subst_stack_regs (rtx_insn *insn, stack_ptr regstack) bool control_flow_insn_deleted = false; int i; - if (CALL_P (insn)) + /* If the target of the call doesn't clobber any stack registers, + Don't clear the arguments. */ + if (CALL_P (insn) + && callee_clobbers_any_stack_reg (insn_callee_abi (insn))) { int top = regstack->top; diff --git a/gcc/rtl.c b/gcc/rtl.c index b0ba1ff..aaee882 100644 --- a/gcc/rtl.c +++ b/gcc/rtl.c @@ -395,8 +395,10 @@ shallow_copy_rtx (const_rtx orig MEM_STAT_DECL) case SCRATCH: break; default: - /* For all other RTXes clear the used flag on the copy. */ - RTX_FLAG (copy, used) = 0; + /* For all other RTXes clear the used flag on the copy. + CALL_INSN use "used" flag to indicate it's a fake call. */ + if (!INSN_P (orig)) + RTX_FLAG (copy, used) = 0; break; } return copy; diff --git a/gcc/rtl.h b/gcc/rtl.h index 35178b5..5ed0d6d 100644 --- a/gcc/rtl.h +++ b/gcc/rtl.h @@ -839,6 +839,11 @@ struct GTY(()) rtvec_def { /* Predicate yielding nonzero iff X is a call insn. */ #define CALL_P(X) (GET_CODE (X) == CALL_INSN) +/* 1 if RTX is a call_insn for a fake call. + CALL_INSN use "used" flag to indicate it's a fake call. */ +#define FAKE_CALL_P(RTX) \ + (RTL_FLAG_CHECK1 ("FAKE_CALL_P", (RTX), CALL_INSN)->used) + /* Predicate yielding nonzero iff X is an insn that cannot jump. */ #define NONJUMP_INSN_P(X) (GET_CODE (X) == INSN) diff --git a/gcc/shrink-wrap.c b/gcc/shrink-wrap.c index ba7b5cd..5e60f34 100644 --- a/gcc/shrink-wrap.c +++ b/gcc/shrink-wrap.c @@ -57,7 +57,7 @@ requires_stack_frame_p (rtx_insn *insn, HARD_REG_SET prologue_used, HARD_REG_SET hardregs; unsigned regno; - if (CALL_P (insn)) + if (CALL_P (insn) && !FAKE_CALL_P (insn)) return !SIBLING_CALL_P (insn); /* We need a frame to get the unique CFA expected by the unwinder. */ -- cgit v1.1 From 9a90b311f22956addaf4f5f9bdb3592afd45083f Mon Sep 17 00:00:00 2001 From: liuhongt Date: Tue, 1 Jun 2021 09:09:44 +0800 Subject: Fix _mm256_zeroupper by representing the instructions as call_insns in which the call has a special vzeroupper ABI. When __builtin_ia32_vzeroupper is called explicitly, the corresponding vzeroupper pattern does not carry any CLOBBERS or SETs before LRA, which leads to incorrect optimization in pass_reload. In order to solve this problem, this patch refine instructions as call_insns in which the call has a special vzeroupper ABI. gcc/ChangeLog: PR target/82735 * config/i386/i386-expand.c (ix86_expand_builtin): Remove assignment of cfun->machine->has_explicit_vzeroupper. * config/i386/i386-features.c (ix86_add_reg_usage_to_vzerouppers): Delete. (ix86_add_reg_usage_to_vzeroupper): Ditto. (rest_of_handle_insert_vzeroupper): Remove ix86_add_reg_usage_to_vzerouppers, add df_analyze at the end of the function. (gate): Remove cfun->machine->has_explicit_vzeroupper. * config/i386/i386-protos.h (ix86_expand_avx_vzeroupper): Declared. * config/i386/i386.c (ix86_insn_callee_abi): New function. (ix86_initialize_callee_abi): Ditto. (ix86_expand_avx_vzeroupper): Ditto. (ix86_hard_regno_call_part_clobbered): Adjust for vzeroupper ABI. (TARGET_INSN_CALLEE_ABI): Define as ix86_insn_callee_abi. (ix86_emit_mode_set): Call ix86_expand_avx_vzeroupper directly. * config/i386/i386.h (struct GTY(()) machine_function): Delete has_explicit_vzeroupper. * config/i386/i386.md (enum unspec): New member UNSPEC_CALLEE_ABI. (ABI_DEFAULT,ABI_VZEROUPPER,ABI_UNKNOWN): New define_constants for insn callee abi index. * config/i386/predicates.md (vzeroupper_pattern): Adjust. * config/i386/sse.md (UNSPECV_VZEROUPPER): Deleted. (avx_vzeroupper): Call ix86_expand_avx_vzeroupper. (*avx_vzeroupper): Rename to .. (avx_vzeroupper_callee_abi): .. this, and adjust pattern as call_insn which has a special vzeroupper ABI. (*avx_vzeroupper_1): Deleted. gcc/testsuite/ChangeLog: PR target/82735 * gcc.target/i386/pr82735-1.c: New test. * gcc.target/i386/pr82735-2.c: New test. * gcc.target/i386/pr82735-3.c: New test. * gcc.target/i386/pr82735-4.c: New test. * gcc.target/i386/pr82735-5.c: New test. --- gcc/config/i386/i386-expand.c | 4 -- gcc/config/i386/i386-features.c | 99 ++++--------------------------- gcc/config/i386/i386-protos.h | 1 + gcc/config/i386/i386.c | 55 ++++++++++++++++- gcc/config/i386/i386.h | 4 -- gcc/config/i386/i386.md | 10 ++++ gcc/config/i386/predicates.md | 5 +- gcc/config/i386/sse.md | 59 +++++------------- gcc/testsuite/gcc.target/i386/pr82735-1.c | 29 +++++++++ gcc/testsuite/gcc.target/i386/pr82735-2.c | 22 +++++++ gcc/testsuite/gcc.target/i386/pr82735-3.c | 5 ++ gcc/testsuite/gcc.target/i386/pr82735-4.c | 48 +++++++++++++++ gcc/testsuite/gcc.target/i386/pr82735-5.c | 54 +++++++++++++++++ 13 files changed, 252 insertions(+), 143 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr82735-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82735-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82735-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82735-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr82735-5.c (limited to 'gcc') diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c index 804cb59..fb0676f 100644 --- a/gcc/config/i386/i386-expand.c +++ b/gcc/config/i386/i386-expand.c @@ -13310,10 +13310,6 @@ rdseed_step: return 0; - case IX86_BUILTIN_VZEROUPPER: - cfun->machine->has_explicit_vzeroupper = true; - break; - default: break; } diff --git a/gcc/config/i386/i386-features.c b/gcc/config/i386/i386-features.c index 77783a1..a25769a 100644 --- a/gcc/config/i386/i386-features.c +++ b/gcc/config/i386/i386-features.c @@ -1768,92 +1768,22 @@ convert_scalars_to_vector (bool timode_p) return 0; } -/* Modify the vzeroupper pattern in INSN so that it describes the effect - that the instruction has on the SSE registers. LIVE_REGS are the set - of registers that are live across the instruction. - - For a live register R we use: - - (set (reg:V2DF R) (reg:V2DF R)) - - which preserves the low 128 bits but clobbers the upper bits. */ - -static void -ix86_add_reg_usage_to_vzeroupper (rtx_insn *insn, bitmap live_regs) -{ - rtx pattern = PATTERN (insn); - unsigned int nregs = TARGET_64BIT ? 16 : 8; - unsigned int npats = nregs; - for (unsigned int i = 0; i < nregs; ++i) - { - unsigned int regno = GET_SSE_REGNO (i); - if (!bitmap_bit_p (live_regs, regno)) - npats--; - } - if (npats == 0) - return; - rtvec vec = rtvec_alloc (npats + 1); - RTVEC_ELT (vec, 0) = XVECEXP (pattern, 0, 0); - for (unsigned int i = 0, j = 0; i < nregs; ++i) - { - unsigned int regno = GET_SSE_REGNO (i); - if (!bitmap_bit_p (live_regs, regno)) - continue; - rtx reg = gen_rtx_REG (V2DImode, regno); - ++j; - RTVEC_ELT (vec, j) = gen_rtx_SET (reg, reg); - } - XVEC (pattern, 0) = vec; - INSN_CODE (insn) = -1; - df_insn_rescan (insn); -} - -/* Walk the vzeroupper instructions in the function and annotate them - with the effect that they have on the SSE registers. */ - -static void -ix86_add_reg_usage_to_vzerouppers (void) -{ - basic_block bb; - rtx_insn *insn; - auto_bitmap live_regs; - - df_analyze (); - FOR_EACH_BB_FN (bb, cfun) - { - bitmap_copy (live_regs, df_get_live_out (bb)); - df_simulate_initialize_backwards (bb, live_regs); - FOR_BB_INSNS_REVERSE (bb, insn) - { - if (!NONDEBUG_INSN_P (insn)) - continue; - if (vzeroupper_pattern (PATTERN (insn), VOIDmode)) - ix86_add_reg_usage_to_vzeroupper (insn, live_regs); - df_simulate_one_insn_backwards (bb, insn, live_regs); - } - } -} - static unsigned int rest_of_handle_insert_vzeroupper (void) { - if (TARGET_VZEROUPPER - && flag_expensive_optimizations - && !optimize_size) - { - /* vzeroupper instructions are inserted immediately after reload to - account for possible spills from 256bit or 512bit registers. The pass - reuses mode switching infrastructure by re-running mode insertion - pass, so disable entities that have already been processed. */ - for (int i = 0; i < MAX_386_ENTITIES; i++) - ix86_optimize_mode_switching[i] = 0; + /* vzeroupper instructions are inserted immediately after reload to + account for possible spills from 256bit or 512bit registers. The pass + reuses mode switching infrastructure by re-running mode insertion + pass, so disable entities that have already been processed. */ + for (int i = 0; i < MAX_386_ENTITIES; i++) + ix86_optimize_mode_switching[i] = 0; - ix86_optimize_mode_switching[AVX_U128] = 1; + ix86_optimize_mode_switching[AVX_U128] = 1; - /* Call optimize_mode_switching. */ - g->get_passes ()->execute_pass_mode_switching (); - } - ix86_add_reg_usage_to_vzerouppers (); + /* Call optimize_mode_switching. */ + g->get_passes ()->execute_pass_mode_switching (); + + df_analyze (); return 0; } @@ -1882,11 +1812,8 @@ public: /* opt_pass methods: */ virtual bool gate (function *) { - return TARGET_AVX - && ((TARGET_VZEROUPPER - && flag_expensive_optimizations - && !optimize_size) - || cfun->machine->has_explicit_vzeroupper); + return TARGET_AVX && TARGET_VZEROUPPER + && flag_expensive_optimizations && !optimize_size; } virtual unsigned int execute (function *) diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index 7782cf11..e6ac939 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -216,6 +216,7 @@ extern rtx ix86_split_stack_guard (void); extern void ix86_move_vector_high_sse_to_mmx (rtx); extern void ix86_split_mmx_pack (rtx[], enum rtx_code); extern void ix86_split_mmx_punpck (rtx[], bool); +extern void ix86_expand_avx_vzeroupper (void); #ifdef TREE_CODE extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 04649b4..b0d19a6 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -14426,7 +14426,7 @@ ix86_emit_mode_set (int entity, int mode, int prev_mode ATTRIBUTE_UNUSED, break; case AVX_U128: if (mode == AVX_U128_CLEAN) - emit_insn (gen_avx_vzeroupper ()); + ix86_expand_avx_vzeroupper (); break; case I387_ROUNDEVEN: case I387_TRUNC: @@ -19497,15 +19497,63 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode) return false; } +/* Implement TARGET_INSN_CALLEE_ABI. */ + +const predefined_function_abi & +ix86_insn_callee_abi (const rtx_insn *insn) +{ + unsigned int abi_id = 0; + rtx pat = PATTERN (insn); + if (vzeroupper_pattern (pat, VOIDmode)) + abi_id = ABI_VZEROUPPER; + + return function_abis[abi_id]; +} + +/* Initialize function_abis with corresponding abi_id, + currently only handle vzeroupper. */ +void +ix86_initialize_callee_abi (unsigned int abi_id) +{ + gcc_assert (abi_id == ABI_VZEROUPPER); + predefined_function_abi &vzeroupper_abi = function_abis[abi_id]; + if (!vzeroupper_abi.initialized_p ()) + { + HARD_REG_SET full_reg_clobbers; + CLEAR_HARD_REG_SET (full_reg_clobbers); + vzeroupper_abi.initialize (ABI_VZEROUPPER, full_reg_clobbers); + } +} + +void +ix86_expand_avx_vzeroupper (void) +{ + /* Initialize vzeroupper_abi here. */ + ix86_initialize_callee_abi (ABI_VZEROUPPER); + rtx_insn *insn = emit_call_insn (gen_avx_vzeroupper_callee_abi ()); + /* Return false for non-local goto in can_nonlocal_goto. */ + make_reg_eh_region_note (insn, 0, INT_MIN); + /* Flag used for call_insn indicates it's a fake call. */ + RTX_FLAG (insn, used) = 1; +} + + /* Implement TARGET_HARD_REGNO_CALL_PART_CLOBBERED. The only ABI that saves SSE registers across calls is Win64 (thus no need to check the current ABI here), and with AVX enabled Win64 only guarantees that the low 16 bytes are saved. */ static bool -ix86_hard_regno_call_part_clobbered (unsigned int, unsigned int regno, +ix86_hard_regno_call_part_clobbered (unsigned int abi_id, unsigned int regno, machine_mode mode) { + /* Special ABI for vzeroupper which only clobber higher part of sse regs. */ + if (abi_id == ABI_VZEROUPPER) + return (GET_MODE_SIZE (mode) > 16 + && ((TARGET_64BIT + && (IN_RANGE (regno, FIRST_REX_SSE_REG, LAST_REX_SSE_REG))) + || (IN_RANGE (regno, FIRST_SSE_REG, LAST_SSE_REG)))); + return SSE_REGNO_P (regno) && GET_MODE_SIZE (mode) > 16; } @@ -23926,6 +23974,9 @@ ix86_run_selftests (void) #define TARGET_HARD_REGNO_CALL_PART_CLOBBERED \ ix86_hard_regno_call_part_clobbered +#undef TARGET_INSN_CALLEE_ABI +#define TARGET_INSN_CALLEE_ABI ix86_insn_callee_abi + #undef TARGET_CAN_CHANGE_MODE_CLASS #define TARGET_CAN_CHANGE_MODE_CLASS ix86_can_change_mode_class diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 53d503f..919d0b2 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2659,10 +2659,6 @@ struct GTY(()) machine_function { /* True if the function needs a stack frame. */ BOOL_BITFIELD stack_frame_required : 1; - /* True if __builtin_ia32_vzeroupper () has been expanded in current - function. */ - BOOL_BITFIELD has_explicit_vzeroupper : 1; - /* True if we should act silently, rather than raise an error for invalid calls. */ BOOL_BITFIELD silent_p : 1; diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index f0bb798..5ff49ec 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -191,6 +191,10 @@ ;; For MOVDIRI and MOVDIR64B support UNSPEC_MOVDIRI UNSPEC_MOVDIR64B + + ;; For insn_callee_abi: + UNSPEC_CALLEE_ABI + ]) (define_c_enum "unspecv" [ @@ -447,6 +451,12 @@ (FIRST_PSEUDO_REG 76) ]) +;; Insn callee abi index. +(define_constants + [(ABI_DEFAULT 0) + (ABI_VZEROUPPER 1) + (ABI_UNKNOWN 2)]) + ;; Insns whose names begin with "x86_" are emitted by gen_FOO calls ;; from i386.c. diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index d2f5f15..3dd134e 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -1596,8 +1596,9 @@ ;; return true if OP is a vzeroupper pattern. (define_predicate "vzeroupper_pattern" (and (match_code "parallel") - (match_code "unspec_volatile" "a") - (match_test "XINT (XVECEXP (op, 0, 0), 1) == UNSPECV_VZEROUPPER"))) + (match_code "unspec" "b") + (match_test "XINT (XVECEXP (op, 0, 1), 1) == UNSPEC_CALLEE_ABI") + (match_test "INTVAL (XVECEXP (XVECEXP (op, 0, 1), 0, 0)) == ABI_VZEROUPPER"))) ;; Return true if OP is an addsub vec_merge operation (define_predicate "addsub_vm_operator" diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index e4248e5..9fc1176 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -205,7 +205,6 @@ UNSPECV_MONITOR UNSPECV_MWAIT UNSPECV_VZEROALL - UNSPECV_VZEROUPPER ;; For KEYLOCKER UNSPECV_LOADIWKEY @@ -20872,14 +20871,22 @@ ;; if the upper 128bits are unused. Initially we expand the instructions ;; as though they had no effect on the SSE registers, but later add SETs and ;; CLOBBERs to the PARALLEL to model the real effect. + (define_expand "avx_vzeroupper" - [(parallel [(unspec_volatile [(const_int 0)] UNSPECV_VZEROUPPER)])] - "TARGET_AVX") + [(parallel [(call (mem:QI (const_int 0)) + (const_int 0)) + (unspec [(const_int ABI_VZEROUPPER)] UNSPEC_CALLEE_ABI)])] + "TARGET_AVX" +{ + ix86_expand_avx_vzeroupper (); + DONE; +}) -(define_insn "*avx_vzeroupper" - [(match_parallel 0 "vzeroupper_pattern" - [(unspec_volatile [(const_int 0)] UNSPECV_VZEROUPPER)])] - "TARGET_AVX && XVECLEN (operands[0], 0) == (TARGET_64BIT ? 16 : 8) + 1" +(define_insn "avx_vzeroupper_callee_abi" + [(call (mem:QI (const_int 0)) + (const_int 0)) + (unspec [(const_int ABI_VZEROUPPER)] UNSPEC_CALLEE_ABI)] + "TARGET_AVX" "vzeroupper" [(set_attr "type" "sse") (set_attr "modrm" "0") @@ -20888,44 +20895,6 @@ (set_attr "btver2_decode" "vector") (set_attr "mode" "OI")]) -(define_insn_and_split "*avx_vzeroupper_1" - [(match_parallel 0 "vzeroupper_pattern" - [(unspec_volatile [(const_int 0)] UNSPECV_VZEROUPPER)])] - "TARGET_AVX && XVECLEN (operands[0], 0) != (TARGET_64BIT ? 16 : 8) + 1" - "#" - "&& epilogue_completed" - [(match_dup 0)] -{ - /* For IPA-RA purposes, make it clear the instruction clobbers - even XMM registers not mentioned explicitly in the pattern. */ - unsigned int nregs = TARGET_64BIT ? 16 : 8; - unsigned int npats = XVECLEN (operands[0], 0); - rtvec vec = rtvec_alloc (nregs + 1); - RTVEC_ELT (vec, 0) = XVECEXP (operands[0], 0, 0); - for (unsigned int i = 0, j = 1; i < nregs; ++i) - { - unsigned int regno = GET_SSE_REGNO (i); - if (j < npats - && REGNO (SET_DEST (XVECEXP (operands[0], 0, j))) == regno) - { - RTVEC_ELT (vec, i + 1) = XVECEXP (operands[0], 0, j); - j++; - } - else - { - rtx reg = gen_rtx_REG (V2DImode, regno); - RTVEC_ELT (vec, i + 1) = gen_rtx_CLOBBER (VOIDmode, reg); - } - } - operands[0] = gen_rtx_PARALLEL (VOIDmode, vec); -} - [(set_attr "type" "sse") - (set_attr "modrm" "0") - (set_attr "memory" "none") - (set_attr "prefix" "vex") - (set_attr "btver2_decode" "vector") - (set_attr "mode" "OI")]) - (define_mode_attr pbroadcast_evex_isa [(V64QI "avx512bw") (V32QI "avx512bw") (V16QI "avx512bw") (V32HI "avx512bw") (V16HI "avx512bw") (V8HI "avx512bw") diff --git a/gcc/testsuite/gcc.target/i386/pr82735-1.c b/gcc/testsuite/gcc.target/i386/pr82735-1.c new file mode 100644 index 0000000..1a63b9a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr82735-1.c @@ -0,0 +1,29 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx" } */ +/* { dg-require-effective-target avx } */ + +#include "avx-check.h" + +void +__attribute__ ((noipa)) +mtest(char *dest) +{ + __m256i ymm1 = _mm256_set1_epi8((char)0x1); + _mm256_storeu_si256((__m256i *)(dest + 32), ymm1); + _mm256_zeroupper(); + __m256i ymm2 = _mm256_set1_epi8((char)0x1); + _mm256_storeu_si256((__m256i *)dest, ymm2); +} + +void +avx_test () +{ + char buf[64]; + for (int i = 0; i != 64; i++) + buf[i] = 2; + mtest (buf); + + for (int i = 0; i < 32; ++i) + if (buf[i] != 1) + __builtin_abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/pr82735-2.c b/gcc/testsuite/gcc.target/i386/pr82735-2.c new file mode 100644 index 0000000..ac9d006 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr82735-2.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx -O2" } */ + +#include + +void test(char *dest) +{ + /* xmm1 can be propagated to xmm2 by CSE. */ + __m128i xmm1 = _mm_set_epi8(0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, + 0x9, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16); + _mm_storeu_si128((__m128i *)(dest + 32), xmm1); + _mm256_zeroupper(); + _mm256_zeroupper(); + _mm256_zeroupper(); + _mm256_zeroupper(); + _mm256_zeroupper(); + __m128i xmm2 = xmm1; + _mm_storeu_si128((__m128i *)dest, xmm2); +} + +/* Darwin local constant symbol is "lC0", ELF targets ".LC0" */ +/* { dg-final { scan-assembler-times {(?n)vmovdqa\t\.?[Ll]C0[^,]*, %xmm[0-9]} 1 } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr82735-3.c b/gcc/testsuite/gcc.target/i386/pr82735-3.c new file mode 100644 index 0000000..e3f801e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr82735-3.c @@ -0,0 +1,5 @@ +/* { dg-do compile } */ +/* { dg-options "-mavx -O2 -mabi=ms" } */ +/* { dg-final { scan-assembler-not {(?n)xmm([6-9]|1[0-5])} } } */ + +#include "pr82735-2.c" diff --git a/gcc/testsuite/gcc.target/i386/pr82735-4.c b/gcc/testsuite/gcc.target/i386/pr82735-4.c new file mode 100644 index 0000000..78c0a6c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr82735-4.c @@ -0,0 +1,48 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mavx -O2 -mabi=ms -mno-avx512f -masm=att" } */ +/* { dg-final { scan-assembler-times {(?n)(?:vmovdqa[1-9]*|vmovap[sd])[\t ]*%xmm[0-9]+, [0-9]*\(%rsp\)} 10 } } */ +/* { dg-final { scan-assembler-times {(?n)(?:vmovdqa[1-9]*|vmovap[sd])[\t ]*[0-9]*\(%rsp\), %xmm[0-9]+} 10 } } */ + +#include + +void test(char *dest) +{ + __m256i ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7, ymm8, ymm9, ymm10, ymm11, ymm12, ymm13, ymm14, ymm15; + asm volatile ("vmovdqa\t%%ymm0, %0\n\t" + "vmovdqa\t%%ymm0, %1\n\t" + "vmovdqa\t%%ymm0, %2\n\t" + "vmovdqa\t%%ymm0, %3\n\t" + "vmovdqa\t%%ymm0, %4\n\t" + "vmovdqa\t%%ymm0, %5\n\t" + "vmovdqa\t%%ymm0, %6\n\t" + "vmovdqa\t%%ymm0, %7\n\t" + "vmovdqa\t%%ymm0, %8\n\t" + "vmovdqa\t%%ymm0, %9\n\t" + "vmovdqa\t%%ymm0, %10\n\t" + "vmovdqa\t%%ymm0, %11\n\t" + "vmovdqa\t%%ymm0, %12\n\t" + "vmovdqa\t%%ymm0, %13\n\t" + "vmovdqa\t%%ymm0, %14\n\t" + "vmovdqa\t%%ymm0, %15\n\t" + : "=v" (ymm1), "=v" (ymm2), "=v"(ymm3), "=v" (ymm4), "=v" (ymm5), + "=v" (ymm6), "=v" (ymm7), "=v"(ymm8), "=v" (ymm9), "=v" (ymm10), + "=v" (ymm11), "=v" (ymm12), "=v"(ymm13), "=v" (ymm14), "=v" (ymm15), + "=v"(ymm0) + ::); + _mm256_zeroupper(); + _mm256_storeu_si256((__m256i *)dest, ymm1); + _mm256_storeu_si256((__m256i *)(dest + 32), ymm2); + _mm256_storeu_si256((__m256i *)(dest + 32 * 2), ymm3); + _mm256_storeu_si256((__m256i *)(dest + 32 * 3), ymm4); + _mm256_storeu_si256((__m256i *)(dest + 32 * 4), ymm5); + _mm256_storeu_si256((__m256i *)(dest + 32 * 5), ymm6); + _mm256_storeu_si256((__m256i *)(dest + 32 * 6), ymm7); + _mm256_storeu_si256((__m256i *)(dest + 32 * 7), ymm8); + _mm256_storeu_si256((__m256i *)(dest + 32 * 8), ymm9); + _mm256_storeu_si256((__m256i *)(dest + 32 * 9), ymm10); + _mm256_storeu_si256((__m256i *)(dest + 32 * 10), ymm11); + _mm256_storeu_si256((__m256i *)(dest + 32 * 11), ymm12); + _mm256_storeu_si256((__m256i *)(dest + 32 * 12), ymm13); + _mm256_storeu_si256((__m256i *)(dest + 32 * 13), ymm14); + _mm256_storeu_si256((__m256i *)(dest + 32 * 14), ymm15); +} diff --git a/gcc/testsuite/gcc.target/i386/pr82735-5.c b/gcc/testsuite/gcc.target/i386/pr82735-5.c new file mode 100644 index 0000000..2a58cbe --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr82735-5.c @@ -0,0 +1,54 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mavx -O2 -mabi=ms -mno-avx512f -masm=att" } */ +/* { dg-final { scan-assembler-times {(?n)(?:vmovdqa[1-9]*|vmovap[sd])[\t ]*%xmm[0-9]+, [0-9]*\(%rsp\)} 10 } } */ +/* { dg-final { scan-assembler-times {(?n)(?:vmovdqa[1-9]*|vmovap[sd])[\t ]*[0-9]*\(%rsp\), %xmm[0-9]+} 10 } } */ + +#include + +void test(char *dest) +{ + __m256i ymm0, ymm1, ymm2, ymm3, ymm4, ymm5, ymm6, ymm7, ymm8, ymm9, ymm10, ymm11, ymm12, ymm13, ymm14, ymm15; + asm volatile ("vmovdqa\t%%ymm0, %0\n\t" + "vmovdqa\t%%ymm0, %1\n\t" + "vmovdqa\t%%ymm0, %2\n\t" + "vmovdqa\t%%ymm0, %3\n\t" + "vmovdqa\t%%ymm0, %4\n\t" + "vmovdqa\t%%ymm0, %5\n\t" + "vmovdqa\t%%ymm0, %6\n\t" + "vmovdqa\t%%ymm0, %7\n\t" + "vmovdqa\t%%ymm0, %8\n\t" + "vmovdqa\t%%ymm0, %9\n\t" + "vmovdqa\t%%ymm0, %10\n\t" + "vmovdqa\t%%ymm0, %11\n\t" + "vmovdqa\t%%ymm0, %12\n\t" + "vmovdqa\t%%ymm0, %13\n\t" + "vmovdqa\t%%ymm0, %14\n\t" + "vmovdqa\t%%ymm0, %15\n\t" + : "=v" (ymm1), "=v" (ymm2), "=v"(ymm3), "=v" (ymm4), "=v" (ymm5), + "=v" (ymm6), "=v" (ymm7), "=v"(ymm8), "=v" (ymm9), "=v" (ymm10), + "=v" (ymm11), "=v" (ymm12), "=v"(ymm13), "=v" (ymm14), "=v" (ymm15), + "=v"(ymm0) + ::); + _mm256_zeroupper(); + _mm256_zeroupper(); + _mm256_zeroupper(); + _mm256_zeroupper(); + _mm256_zeroupper(); + _mm256_zeroupper(); + _mm256_zeroupper(); + _mm256_storeu_si256((__m256i *)dest, ymm1); + _mm256_storeu_si256((__m256i *)(dest + 32), ymm2); + _mm256_storeu_si256((__m256i *)(dest + 32 * 2), ymm3); + _mm256_storeu_si256((__m256i *)(dest + 32 * 3), ymm4); + _mm256_storeu_si256((__m256i *)(dest + 32 * 4), ymm5); + _mm256_storeu_si256((__m256i *)(dest + 32 * 5), ymm6); + _mm256_storeu_si256((__m256i *)(dest + 32 * 6), ymm7); + _mm256_storeu_si256((__m256i *)(dest + 32 * 7), ymm8); + _mm256_storeu_si256((__m256i *)(dest + 32 * 8), ymm9); + _mm256_storeu_si256((__m256i *)(dest + 32 * 9), ymm10); + _mm256_storeu_si256((__m256i *)(dest + 32 * 10), ymm11); + _mm256_storeu_si256((__m256i *)(dest + 32 * 11), ymm12); + _mm256_storeu_si256((__m256i *)(dest + 32 * 12), ymm13); + _mm256_storeu_si256((__m256i *)(dest + 32 * 13), ymm14); + _mm256_storeu_si256((__m256i *)(dest + 32 * 14), ymm15); +} -- cgit v1.1 From be5efe9c12cb852c788f74f8555e6ab8d755479b Mon Sep 17 00:00:00 2001 From: liuhongt Date: Thu, 3 Jun 2021 16:38:32 +0800 Subject: Fix ICE of insn does not satisfy its constraints. evex encoding vpmovzxbx needs both AVX512BW and AVX512VL which means constraint "Yw" should be used instead of constraint "v". gcc/ChangeLog: PR target/100885 * config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): Refine constraints. (v4siv4di2): Delete constraints for define_expand. gcc/testsuite/ChangeLog: PR target/100885 * g++.target/i386/pr100885.C: New test. --- gcc/config/i386/sse.md | 8 +- gcc/testsuite/g++.target/i386/pr100885.C | 144 +++++++++++++++++++++++++++++++ 2 files changed, 148 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/g++.target/i386/pr100885.C (limited to 'gcc') diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 9fc1176..2a34756 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -18115,10 +18115,10 @@ "operands[1] = adjust_address_nv (operands[1], V8QImode, 0);") (define_insn_and_split "*sse4_1_zero_extendv8qiv8hi2_3" - [(set (match_operand:V16QI 0 "register_operand" "=Yr,*x,v") + [(set (match_operand:V16QI 0 "register_operand" "=Yr,*x,Yw") (vec_select:V16QI (vec_concat:V32QI - (match_operand:V16QI 1 "vector_operand" "YrBm,*xBm,vm") + (match_operand:V16QI 1 "vector_operand" "YrBm,*xBm,Ywm") (match_operand:V16QI 2 "const0_operand" "C,C,C")) (match_parallel 3 "pmovzx_parallel" [(match_operand 4 "const_int_operand" "n,n,n")])))] @@ -18803,9 +18803,9 @@ }) (define_expand "v4siv4di2" - [(set (match_operand:V4DI 0 "register_operand" "=v") + [(set (match_operand:V4DI 0 "register_operand") (any_extend:V4DI - (match_operand:V4SI 1 "nonimmediate_operand" "vm")))] + (match_operand:V4SI 1 "nonimmediate_operand")))] "TARGET_AVX2") (define_insn "sse4_1_v2siv2di2" diff --git a/gcc/testsuite/g++.target/i386/pr100885.C b/gcc/testsuite/g++.target/i386/pr100885.C new file mode 100644 index 0000000..08a5bdd --- /dev/null +++ b/gcc/testsuite/g++.target/i386/pr100885.C @@ -0,0 +1,144 @@ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-mavx512vl -mno-avx512bw -O2 -Wno-int-to-pointer-cast -std=c++14" } */ + +#include +typedef unsigned char byte; +enum ZoomLevel { ZOOM_LVL_COUNT }; +struct Colour { + unsigned data; + Colour(int data) : data(data) {} +}; +struct Palette { + Colour palette[6]; +}; +enum BlitterMode { BM_COLOUR_REMAP }; +class Blitter { +public: + struct BlitterParams { + int width; + int height; + int left; + int top; + void *dst; + }; + virtual void Draw(); +}; +class Blitter_32bppAnim : public Blitter { +protected: + unsigned short anim_buf; + Palette palette; + int LookupColourInPalette_index; + Colour LookupColourInPalette() { + return palette.palette[LookupColourInPalette_index]; + } +}; +__m128i _mm_set_epi64(__m64 __q0) { + __m128i __trans_tmp_5{(long)__q0}; + return __trans_tmp_5; +} +long _mm_storel_epi64___P, Draw_dsts; +__m128i _mm_packus_epi16___B, _mm_subs_epu16___B, _mm_hadd_epi16___Y, + Draw_srcABCD, Draw___trans_tmp_10, Draw___trans_tmp_29, Draw___trans_tmp_7, + AlphaBlendTwoPixels___trans_tmp_12, AlphaBlendTwoPixels___trans_tmp_11, + AdjustBrightnessOfTwoPixels_from; +int _mm_srli_epi16___B; +class Blitter_32bppSSE_Base { +public: + enum ReadMode { RM_WITH_MARGIN }; + enum BlockType { BT_NONE }; + struct SpriteData { + int infos[ZOOM_LVL_COUNT]; + byte data; + }; +}; +byte *Draw_remap; +short Draw_si_0; +class Blitter_32bppSSE4_Anim : Blitter_32bppAnim, Blitter_32bppSSE_Base { + template + void Draw(const BlitterParams *, ZoomLevel); + void Draw(); +}; +__m128i AdjustBrightnessOfTwoPixels() { + __m128i __trans_tmp_28, __trans_tmp_27, __trans_tmp_26, __trans_tmp_24, + __trans_tmp_23, __trans_tmp_22, __trans_tmp_21, __trans_tmp_20, + __trans_tmp_19, __trans_tmp_18, __trans_tmp_17, __trans_tmp_16, + __trans_tmp_14 = _mm_srli_epi16(AdjustBrightnessOfTwoPixels_from, + _mm_srli_epi16___B), + __trans_tmp_7; + char __trans_tmp_8; + __trans_tmp_7 = __m128i{__trans_tmp_8}; + { + __m128i __trans_tmp_7; + char __trans_tmp_8; + __trans_tmp_7 = __m128i{__trans_tmp_8}; + __trans_tmp_26 = __trans_tmp_7; + } + __trans_tmp_16 = (__v8hi)__trans_tmp_14 > (__v8hi)__trans_tmp_26; + __trans_tmp_17 = _mm_hadd_epi16(__trans_tmp_16, _mm_hadd_epi16___Y); + __trans_tmp_18 = _mm_hadd_epi16(__trans_tmp_17, _mm_hadd_epi16___Y); + __trans_tmp_19 = _mm_srli_epi16(__trans_tmp_18, _mm_srli_epi16___B); + { + __m128i __trans_tmp_7; + char __trans_tmp_8; + __trans_tmp_7 = __m128i{__trans_tmp_8}; + __trans_tmp_27 = __trans_tmp_7; + } + __trans_tmp_20 = _mm_shuffle_epi8(__trans_tmp_19, + __trans_tmp_27); + { + __m128i __trans_tmp_7; + char __trans_tmp_8; + __trans_tmp_7 = __m128i{__trans_tmp_8}; + __trans_tmp_28 = __trans_tmp_7; + } + __trans_tmp_21 = _mm_subs_epu16(__trans_tmp_28, _mm_subs_epu16___B); + __trans_tmp_22 = __m128i((__v8hu)__trans_tmp_21 * (__v8hu)__trans_tmp_20); + __trans_tmp_23 = __m128i((__v8hu)__trans_tmp_22 + (__v8hu)__trans_tmp_7); + __trans_tmp_24 = _mm_packus_epi16(__trans_tmp_23, _mm_packus_epi16___B); + return __trans_tmp_24; +} +template +void Blitter_32bppSSE4_Anim::Draw(const BlitterParams *bp, ZoomLevel zoom) { + __m128i __trans_tmp_30; + Colour *dst_line = (Colour *)bp->dst + bp->left; + unsigned short *anim_line = &anim_buf + bp->top; + int effective_width; + SpriteData *sd = (SpriteData *)bp; + Colour *src_rgba_line = (Colour *)sd->data; + Draw___trans_tmp_29 = Draw___trans_tmp_7; + for (int y = bp->height; y; y--) { + Colour *dst = dst_line; + unsigned short *anim = anim_line; + anim += src_rgba_line[0].data; + dst += src_rgba_line[0].data; + int width_diff = Draw_si_0 - bp->width; + effective_width = width_diff ?: effective_width; + for (int x = effective_width; x; x--) { + int mvX2 = *(unsigned *)sd->infos[zoom], m = byte(mvX2); + __trans_tmp_30 = _mm_set_epi64(*(__m64_u *)dst); + Colour c0 = Draw_dsts, srcm(0), cmap = LookupColourInPalette().data & 40; + c0 = Draw_remap[m] ?: cmap; + c0 = m ? c0 : srcm; + Draw___trans_tmp_10 = __v2di{c0.data}; + if (mvX2) + Draw_srcABCD = AdjustBrightnessOfTwoPixels(); + if (src_rgba_line) + anim[1] = 0; + __m128i tmp; + __m128i dstAB = _mm_unpacklo_epi8(__trans_tmp_30, tmp); + AlphaBlendTwoPixels___trans_tmp_12 = + __m128i((__v8hu)Draw_srcABCD + (__v8hu)dstAB); + AlphaBlendTwoPixels___trans_tmp_11 = _mm_shuffle_epi8 (AlphaBlendTwoPixels___trans_tmp_12, + Draw___trans_tmp_7); + *(__m64_u *)_mm_storel_epi64___P = + (__m64)AlphaBlendTwoPixels___trans_tmp_11[0]; + } + } +} +Blitter::BlitterParams Draw_bp; +ZoomLevel Draw_zoom; +void Blitter_32bppSSE4_Anim::Draw() { + Draw(&Draw_bp, + Draw_zoom); +} -- cgit v1.1 From d66a703c8ba86f3ca04cc10c3071696e6d014de6 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Mon, 7 Jun 2021 09:25:37 +0200 Subject: tree-inline: Fix up __builtin_va_arg_pack handling [PR100898] The following testcase ICEs, because gimple_call_arg_ptr (..., 0) asserts that there is at least one argument, while we were using it even if we didn't copy anything just to get a pointer from/to which the zero arguments should be copied. Fixed by guarding the memcpy calls. Also, the code was calling gimple_call_num_args too many times - 5 times instead of 2, so the patch adds two temporaries for those. 2021-06-07 Jakub Jelinek PR middle-end/100898 * tree-inline.c (copy_bb): Only use gimple_call_arg_ptr if memcpy should copy any arguments. Don't call gimple_call_num_args on id->call_stmt or call_stmt more than once. * g++.dg/ext/va-arg-pack-3.C: New test. --- gcc/testsuite/g++.dg/ext/va-arg-pack-3.C | 18 ++++++++++++++++++ gcc/tree-inline.c | 22 ++++++++++++---------- 2 files changed, 30 insertions(+), 10 deletions(-) create mode 100644 gcc/testsuite/g++.dg/ext/va-arg-pack-3.C (limited to 'gcc') diff --git a/gcc/testsuite/g++.dg/ext/va-arg-pack-3.C b/gcc/testsuite/g++.dg/ext/va-arg-pack-3.C new file mode 100644 index 0000000..0e8203c --- /dev/null +++ b/gcc/testsuite/g++.dg/ext/va-arg-pack-3.C @@ -0,0 +1,18 @@ +// PR middle-end/100898 + +int a; +int bar (int, ...); + +static inline __attribute__((always_inline)) int +foo (...) +{ + while (a) + return bar (0, __builtin_va_arg_pack ()); + return 0; +} + +void +baz (void) +{ + foo (); +} diff --git a/gcc/tree-inline.c b/gcc/tree-inline.c index 05d1a25..4250fd8 100644 --- a/gcc/tree-inline.c +++ b/gcc/tree-inline.c @@ -2090,27 +2090,29 @@ copy_bb (copy_body_data *id, basic_block bb, tree p; gcall *new_call; vec argarray; - size_t nargs = gimple_call_num_args (id->call_stmt); - size_t n; + size_t nargs_caller = gimple_call_num_args (id->call_stmt); + size_t nargs = nargs_caller; for (p = DECL_ARGUMENTS (id->src_fn); p; p = DECL_CHAIN (p)) nargs--; /* Create the new array of arguments. */ - n = nargs + gimple_call_num_args (call_stmt); + size_t nargs_callee = gimple_call_num_args (call_stmt); + size_t n = nargs + nargs_callee; argarray.create (n); argarray.safe_grow_cleared (n, true); /* Copy all the arguments before '...' */ - memcpy (argarray.address (), - gimple_call_arg_ptr (call_stmt, 0), - gimple_call_num_args (call_stmt) * sizeof (tree)); + if (nargs_callee) + memcpy (argarray.address (), + gimple_call_arg_ptr (call_stmt, 0), + nargs_callee * sizeof (tree)); /* Append the arguments passed in '...' */ - memcpy (argarray.address () + gimple_call_num_args (call_stmt), - gimple_call_arg_ptr (id->call_stmt, 0) - + (gimple_call_num_args (id->call_stmt) - nargs), - nargs * sizeof (tree)); + if (nargs) + memcpy (argarray.address () + nargs_callee, + gimple_call_arg_ptr (id->call_stmt, 0) + + (nargs_caller - nargs), nargs * sizeof (tree)); new_call = gimple_build_call_vec (gimple_call_fn (call_stmt), argarray); -- cgit v1.1 From e1521b170b44be5cd5d36a98b6b760457b68f566 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Mon, 7 Jun 2021 09:28:31 +0200 Subject: fold-const: Fix up fold_read_from_vector [PR100887] The callers of fold_read_from_vector expect that the index they pass is an index of an element in the vector and the function does that most of the time. But we allow CONSTRUCTORs with VECTOR_TYPE to have VECTOR_TYPE elements and in that case every CONSTRUCTOR element represents not just one index (with the exception of V1 vectors), but multiple. So returning zero vector if i >= CONSTRUCTOR_NELTS or returning some CONSTRUCTOR_ELT's value might not be what the callers expect. Fixed by punting if the first element has vector type. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? In theory we could instead recurse (and assert that for CONSTRUCTORs of vector elements we have always all elements specified like tree-cfg.c verifies?) after adjusting the index appropriately. 2021-06-07 Jakub Jelinek PR target/100887 * fold-const.c (fold_read_from_vector): Return NULL if trying to read from a CONSTRUCTOR with vector type elements. * gcc.dg/pr100887.c: New test. --- gcc/fold-const.c | 3 +++ gcc/testsuite/gcc.dg/pr100887.c | 14 ++++++++++++++ 2 files changed, 17 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/pr100887.c (limited to 'gcc') diff --git a/gcc/fold-const.c b/gcc/fold-const.c index 33d64bf..6e5835a 100644 --- a/gcc/fold-const.c +++ b/gcc/fold-const.c @@ -15471,6 +15471,9 @@ fold_read_from_vector (tree arg, poly_uint64 idx) return VECTOR_CST_ELT (arg, i); else if (TREE_CODE (arg) == CONSTRUCTOR) { + if (CONSTRUCTOR_NELTS (arg) + && VECTOR_TYPE_P (TREE_TYPE (CONSTRUCTOR_ELT (arg, 0)->value))) + return NULL_TREE; if (i >= CONSTRUCTOR_NELTS (arg)) return build_zero_cst (TREE_TYPE (TREE_TYPE (arg))); return CONSTRUCTOR_ELT (arg, i)->value; diff --git a/gcc/testsuite/gcc.dg/pr100887.c b/gcc/testsuite/gcc.dg/pr100887.c new file mode 100644 index 0000000..de6b3ef --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr100887.c @@ -0,0 +1,14 @@ +/* PR target/100887 */ +/* { dg-do compile } */ +/* { dg-options "" } */ +/* { dg-additional-options "-mavx512f" { target { i?86-*-* x86_64-*-* } } } */ + +typedef unsigned long long __attribute__((__vector_size__ (2 * sizeof (long long)))) U; +typedef unsigned long long __attribute__((__vector_size__ (4 * sizeof (long long)))) V; +typedef unsigned long long __attribute__((__vector_size__ (8 * sizeof (long long)))) W; + +U +foo (V v) +{ + return __builtin_shufflevector ((W){}, v, 0, 8); +} -- cgit v1.1 From 3e00f8ddb729913831e494f87207b658292e6c2b Mon Sep 17 00:00:00 2001 From: Bernd Edlinger Date: Fri, 28 May 2021 06:54:13 +0200 Subject: For obj-c stage-final re-use the checksum from the previous stage This silences the stage compare. gcc/objc: 2021-06-07 Bernd Edlinger * Make-lang.in (cc1obj-checksum.c): For stage-final re-use the checksum from the previous stage. gcc/objcp: 2021-06-07 Bernd Edlinger * Make-lang.in (cc1objplus-checksum.c): For stage-final re-use the checksum from the previous stage. --- gcc/objc/Make-lang.in | 14 +++++++++++--- gcc/objcp/Make-lang.in | 15 +++++++++++---- 2 files changed, 22 insertions(+), 7 deletions(-) (limited to 'gcc') diff --git a/gcc/objc/Make-lang.in b/gcc/objc/Make-lang.in index c91148a..9011140 100644 --- a/gcc/objc/Make-lang.in +++ b/gcc/objc/Make-lang.in @@ -57,11 +57,19 @@ OBJC_OBJS = objc/objc-lang.o objc/objc-act.o hash-table.o \ objc_OBJS = $(OBJC_OBJS) cc1obj-checksum.o +# compute checksum over all object files and the options +# re-use the checksum from the prev-final stage so it passes +# the bootstrap comparison and allows comparing of the cc1 binary cc1obj-checksum.c : build/genchecksum$(build_exeext) checksum-options \ $(OBJC_OBJS) $(C_AND_OBJC_OBJS) $(BACKEND) $(LIBDEPS) - build/genchecksum$(build_exeext) $(OBJC_OBJS) $(C_AND_OBJC_OBJS) \ - $(BACKEND) $(LIBDEPS) checksum-options > cc1obj-checksum.c.tmp && \ - $(srcdir)/../move-if-change cc1obj-checksum.c.tmp cc1obj-checksum.c + if [ -f ../stage_final ] \ + && cmp -s ../stage_current ../stage_final; then \ + cp ../prev-gcc/$@ $@; \ + else \ + build/genchecksum$(build_exeext) $(OBJC_OBJS) $(C_AND_OBJC_OBJS) \ + $(BACKEND) $(LIBDEPS) checksum-options > $@.tmp && \ + $(srcdir)/../move-if-change $@.tmp $@; \ + fi cc1obj$(exeext): $(OBJC_OBJS) $(C_AND_OBJC_OBJS) cc1obj-checksum.o $(BACKEND) \ $(LIBDEPS) $(objc.prev) diff --git a/gcc/objcp/Make-lang.in b/gcc/objcp/Make-lang.in index dfa4d23..3ecc50b 100644 --- a/gcc/objcp/Make-lang.in +++ b/gcc/objcp/Make-lang.in @@ -60,12 +60,19 @@ OBJCXX_OBJS = objcp/objcp-act.o objcp/objcp-lang.o objcp/objcp-decl.o \ obj-c++_OBJS = $(OBJCXX_OBJS) cc1objplus-checksum.o +# compute checksum over all object files and the options +# re-use the checksum from the prev-final stage so it passes +# the bootstrap comparison and allows comparing of the cc1 binary cc1objplus-checksum.c : build/genchecksum$(build_exeext) checksum-options \ $(OBJCXX_OBJS) $(BACKEND) $(CODYLIB) $(LIBDEPS) - build/genchecksum$(build_exeext) $(OBJCXX_OBJS) $(BACKEND) $(CODYLIB) \ - $(LIBDEPS) checksum-options > cc1objplus-checksum.c.tmp && \ - $(srcdir)/../move-if-change cc1objplus-checksum.c.tmp \ - cc1objplus-checksum.c + if [ -f ../stage_final ] \ + && cmp -s ../stage_current ../stage_final; then \ + cp ../prev-gcc/$@ $@; \ + else \ + build/genchecksum$(build_exeext) $(OBJCXX_OBJS) $(BACKEND) \ + $(CODYLIB) $(LIBDEPS) checksum-options > $@.tmp && \ + $(srcdir)/../move-if-change $@.tmp $@; \ + fi cc1objplus$(exeext): $(OBJCXX_OBJS) cc1objplus-checksum.o $(BACKEND) \ $(CODYLIB) $(LIBDEPS) $(obj-c++.prev) -- cgit v1.1 From 4d3907c222646174ec7e405491435aefc50bf1bb Mon Sep 17 00:00:00 2001 From: Martin Liska Date: Fri, 4 Jun 2021 14:28:11 +0200 Subject: Reformat target.def for better parsing. gcc/c-family/ChangeLog: * c-target.def: Split long lines and replace them with '\n\'. gcc/ChangeLog: * common/common-target.def: Split long lines and replace them with '\n\'. * target.def: Likewise. * doc/tm.texi: Re-generated. --- gcc/c-family/c-target.def | 70 +++---- gcc/common/common-target.def | 32 +-- gcc/doc/tm.texi | 364 ++++++++++++++++++++++++++------ gcc/target.def | 485 +++++++++++++++++++++++-------------------- 4 files changed, 612 insertions(+), 339 deletions(-) (limited to 'gcc') diff --git a/gcc/c-family/c-target.def b/gcc/c-family/c-target.def index f2a1b7e..164f1b3 100644 --- a/gcc/c-family/c-target.def +++ b/gcc/c-family/c-target.def @@ -43,73 +43,73 @@ DEFHOOK DEFHOOK (objc_construct_string_object, - "Targets may provide a string object type that can be used within\ - and between C, C++ and their respective Objective-C dialects.\ - A string object might, for example, embed encoding and length information.\ - These objects are considered opaque to the compiler and handled as references.\ - An ideal implementation makes the composition of the string object\ - match that of the Objective-C @code{NSString} (@code{NXString} for GNUStep),\ - allowing efficient interworking between C-only and Objective-C code.\ - If a target implements string objects then this hook should return a\ - reference to such an object constructed from the normal `C' string\ - representation provided in @var{string}.\ - At present, the hook is used by Objective-C only, to obtain a\ + "Targets may provide a string object type that can be used within\n\ +and between C, C++ and their respective Objective-C dialects.\n\ +A string object might, for example, embed encoding and length information.\n\ +These objects are considered opaque to the compiler and handled as references.\n\ +An ideal implementation makes the composition of the string object\n\ +match that of the Objective-C @code{NSString} (@code{NXString} for GNUStep),\n\ +allowing efficient interworking between C-only and Objective-C code.\n\ +If a target implements string objects then this hook should return a\n\ +reference to such an object constructed from the normal `C' string\n\ +representation provided in @var{string}.\n\ +At present, the hook is used by Objective-C only, to obtain a\n\ common-format string object when the target provides one.", tree, (tree string), NULL) DEFHOOK (objc_declare_unresolved_class_reference, - "Declare that Objective C class @var{classname} is referenced\ - by the current TU.", + "Declare that Objective C class @var{classname} is referenced\n\ +by the current TU.", void, (const char *classname), NULL) DEFHOOK (objc_declare_class_definition, - "Declare that Objective C class @var{classname} is defined\ - by the current TU.", + "Declare that Objective C class @var{classname} is defined\n\ +by the current TU.", void, (const char *classname), NULL) DEFHOOK (string_object_ref_type_p, - "If a target implements string objects then this hook should return\ - @code{true} if @var{stringref} is a valid reference to such an object.", + "If a target implements string objects then this hook should return\n\ +@code{true} if @var{stringref} is a valid reference to such an object.", bool, (const_tree stringref), hook_bool_const_tree_false) DEFHOOK (check_string_object_format_arg, - "If a target implements string objects then this hook should should\ - provide a facility to check the function arguments in @var{args_list}\ - against the format specifiers in @var{format_arg} where the type of\ - @var{format_arg} is one recognized as a valid string reference type.", + "If a target implements string objects then this hook should should\n\ +provide a facility to check the function arguments in @var{args_list}\n\ +against the format specifiers in @var{format_arg} where the type of\n\ +@var{format_arg} is one recognized as a valid string reference type.", void, (tree format_arg, tree args_list), NULL) DEFHOOK (c_preinclude, - "Define this hook to return the name of a header file to be included at\ - the start of all compilations, as if it had been included with\ - @code{#include <@var{file}>}. If this hook returns @code{NULL}, or is\ - not defined, or the header is not found, or if the user specifies\ - @option{-ffreestanding} or @option{-nostdinc}, no header is included.\n\ + "Define this hook to return the name of a header file to be included at\n\ +the start of all compilations, as if it had been included with\n\ +@code{#include <@var{file}>}. If this hook returns @code{NULL}, or is\n\ +not defined, or the header is not found, or if the user specifies\n\ +@option{-ffreestanding} or @option{-nostdinc}, no header is included.\n\ \n\ - This hook can be used together with a header provided by the system C\ - library to implement ISO C requirements for certain macros to be\ - predefined that describe properties of the whole implementation rather\ - than just the compiler.", +This hook can be used together with a header provided by the system C\n\ +library to implement ISO C requirements for certain macros to be\n\ +predefined that describe properties of the whole implementation rather\n\ +than just the compiler.", const char *, (void), hook_constcharptr_void_null) DEFHOOK (cxx_implicit_extern_c, - "Define this hook to add target-specific C++ implicit extern C functions.\ - If this function returns true for the name of a file-scope function, that\ - function implicitly gets extern \"C\" linkage rather than whatever language\ - linkage the declaration would normally have. An example of such function\ - is WinMain on Win32 targets.", + "Define this hook to add target-specific C++ implicit extern C functions.\n\ +If this function returns true for the name of a file-scope function, that\n\ +function implicitly gets extern \"C\" linkage rather than whatever language\n\ +linkage the declaration would normally have. An example of such function\n\ +is WinMain on Win32 targets.", bool, (const char*), NULL) diff --git a/gcc/common/common-target.def b/gcc/common/common-target.def index 1e10d4f..f54590a 100644 --- a/gcc/common/common-target.def +++ b/gcc/common/common-target.def @@ -64,23 +64,23 @@ DEFHOOK DEFHOOK (supports_split_stack, - "Whether this target supports splitting the stack when the options\ - described in @var{opts} have been passed. This is called\ - after options have been parsed, so the target may reject splitting\ - the stack in some configurations. The default version of this hook\ - returns false. If @var{report} is true, this function may issue a warning\ - or error; if @var{report} is false, it must simply return a value", + "Whether this target supports splitting the stack when the options\n\ +described in @var{opts} have been passed. This is called\n\ +after options have been parsed, so the target may reject splitting\n\ +the stack in some configurations. The default version of this hook\n\ +returns false. If @var{report} is true, this function may issue a warning\n\ +or error; if @var{report} is false, it must simply return a value", bool, (bool report, struct gcc_options *opts), hook_bool_bool_gcc_optionsp_false) DEFHOOK (get_valid_option_values, -"The hook is used for options that have a non-trivial list of\ - possible option values. OPTION_CODE is option code of opt_code\ - enum type. PREFIX is used for bash completion and allows an implementation\ - to return more specific completion based on the prefix. All string values\ - should be allocated from heap memory and consumers should release them. \ - The result will be pruned to cases with PREFIX if not NULL.", +"The hook is used for options that have a non-trivial list of\n\ +possible option values. OPTION_CODE is option code of opt_code\n\ +enum type. PREFIX is used for bash completion and allows an implementation\n\ +to return more specific completion based on the prefix. All string values\n\ +should be allocated from heap memory and consumers should release them.\n\ +The result will be pruned to cases with PREFIX if not NULL.", vec, (int option_code, const char *prefix), default_get_valid_option_values) @@ -100,10 +100,10 @@ DEFHOOKPOD DEFHOOKPOD (always_strip_dotdot, - "True if @file{..} components should always be removed from directory names\ - computed relative to GCC's internal directories, false (default) if such\ - components should be preserved and directory names containing them passed\ - to other tools such as the linker.", + "True if @file{..} components should always be removed from directory names\n\ +computed relative to GCC's internal directories, false (default) if such\n\ +components should be preserved and directory names containing them passed\n\ +to other tools such as the linker.", bool, false) HOOK_VECTOR_END (C90_EMPTY_HACK) diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index e3a080e..0a6ae0b 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -400,7 +400,10 @@ the effect you need. Overriding this macro may be avoidable by overriding @end defmac @deftypevr {Common Target Hook} bool TARGET_ALWAYS_STRIP_DOTDOT -True if @file{..} components should always be removed from directory names computed relative to GCC's internal directories, false (default) if such components should be preserved and directory names containing them passed to other tools such as the linker. +True if @file{..} components should always be removed from directory names +computed relative to GCC's internal directories, false (default) if such +components should be preserved and directory names containing them passed +to other tools such as the linker. @end deftypevr @defmac MULTILIB_DEFAULTS @@ -703,23 +706,40 @@ should use @code{TARGET_HANDLE_C_OPTION} instead. @end deftypefn @deftypefn {C Target Hook} tree TARGET_OBJC_CONSTRUCT_STRING_OBJECT (tree @var{string}) -Targets may provide a string object type that can be used within and between C, C++ and their respective Objective-C dialects. A string object might, for example, embed encoding and length information. These objects are considered opaque to the compiler and handled as references. An ideal implementation makes the composition of the string object match that of the Objective-C @code{NSString} (@code{NXString} for GNUStep), allowing efficient interworking between C-only and Objective-C code. If a target implements string objects then this hook should return a reference to such an object constructed from the normal `C' string representation provided in @var{string}. At present, the hook is used by Objective-C only, to obtain a common-format string object when the target provides one. +Targets may provide a string object type that can be used within +and between C, C++ and their respective Objective-C dialects. +A string object might, for example, embed encoding and length information. +These objects are considered opaque to the compiler and handled as references. +An ideal implementation makes the composition of the string object +match that of the Objective-C @code{NSString} (@code{NXString} for GNUStep), +allowing efficient interworking between C-only and Objective-C code. +If a target implements string objects then this hook should return a +reference to such an object constructed from the normal `C' string +representation provided in @var{string}. +At present, the hook is used by Objective-C only, to obtain a + common-format string object when the target provides one. @end deftypefn @deftypefn {C Target Hook} void TARGET_OBJC_DECLARE_UNRESOLVED_CLASS_REFERENCE (const char *@var{classname}) -Declare that Objective C class @var{classname} is referenced by the current TU. +Declare that Objective C class @var{classname} is referenced +by the current TU. @end deftypefn @deftypefn {C Target Hook} void TARGET_OBJC_DECLARE_CLASS_DEFINITION (const char *@var{classname}) -Declare that Objective C class @var{classname} is defined by the current TU. +Declare that Objective C class @var{classname} is defined +by the current TU. @end deftypefn @deftypefn {C Target Hook} bool TARGET_STRING_OBJECT_REF_TYPE_P (const_tree @var{stringref}) -If a target implements string objects then this hook should return @code{true} if @var{stringref} is a valid reference to such an object. +If a target implements string objects then this hook should return +@code{true} if @var{stringref} is a valid reference to such an object. @end deftypefn @deftypefn {C Target Hook} void TARGET_CHECK_STRING_OBJECT_FORMAT_ARG (tree @var{format_arg}, tree @var{args_list}) -If a target implements string objects then this hook should should provide a facility to check the function arguments in @var{args_list} against the format specifiers in @var{format_arg} where the type of @var{format_arg} is one recognized as a valid string reference type. +If a target implements string objects then this hook should should +provide a facility to check the function arguments in @var{args_list} +against the format specifiers in @var{format_arg} where the type of +@var{format_arg} is one recognized as a valid string reference type. @end deftypefn @deftypefn {Target Hook} void TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE (void) @@ -778,7 +798,13 @@ is 0. @end defmac @deftypefn {Target Hook} bool TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P (void) -Returns true if the target supports IEEE 754 floating-point exceptions and rounding modes, false otherwise. This is intended to relate to the @code{float} and @code{double} types, but not necessarily @code{long double}. By default, returns true if the @code{adddf3} instruction pattern is available and false otherwise, on the assumption that hardware floating point supports exceptions and rounding modes but software floating point does not. +Returns true if the target supports IEEE 754 floating-point exceptions +and rounding modes, false otherwise. This is intended to relate to the +@code{float} and @code{double} types, but not necessarily @code{long double}. +By default, returns true if the @code{adddf3} instruction pattern is +available and false otherwise, on the assumption that hardware floating +point supports exceptions and rounding modes but software floating point +does not. @end deftypefn @node Per-Function Data @@ -953,7 +979,22 @@ Do not define this macro if it would never modify @var{m}. @end defmac @deftypefn {Target Hook} {enum flt_eval_method} TARGET_C_EXCESS_PRECISION (enum excess_precision_type @var{type}) -Return a value, with the same meaning as the C99 macro @code{FLT_EVAL_METHOD} that describes which excess precision should be applied. @var{type} is either @code{EXCESS_PRECISION_TYPE_IMPLICIT}, @code{EXCESS_PRECISION_TYPE_FAST}, or @code{EXCESS_PRECISION_TYPE_STANDARD}. For @code{EXCESS_PRECISION_TYPE_IMPLICIT}, the target should return which precision and range operations will be implictly evaluated in regardless of the excess precision explicitly added. For @code{EXCESS_PRECISION_TYPE_STANDARD} and @code{EXCESS_PRECISION_TYPE_FAST}, the target should return the explicit excess precision that should be added depending on the value set for @option{-fexcess-precision=@r{[}standard@r{|}fast@r{]}}. Note that unpredictable explicit excess precision does not make sense, so a target should never return @code{FLT_EVAL_METHOD_UNPREDICTABLE} when @var{type} is @code{EXCESS_PRECISION_TYPE_STANDARD} or @code{EXCESS_PRECISION_TYPE_FAST}. +Return a value, with the same meaning as the C99 macro +@code{FLT_EVAL_METHOD} that describes which excess precision should be +applied. @var{type} is either @code{EXCESS_PRECISION_TYPE_IMPLICIT}, +@code{EXCESS_PRECISION_TYPE_FAST}, or +@code{EXCESS_PRECISION_TYPE_STANDARD}. For +@code{EXCESS_PRECISION_TYPE_IMPLICIT}, the target should return which +precision and range operations will be implictly evaluated in regardless +of the excess precision explicitly added. For +@code{EXCESS_PRECISION_TYPE_STANDARD} and +@code{EXCESS_PRECISION_TYPE_FAST}, the target should return the +explicit excess precision that should be added depending on the +value set for @option{-fexcess-precision=@r{[}standard@r{|}fast@r{]}}. +Note that unpredictable explicit excess precision does not make sense, +so a target should never return @code{FLT_EVAL_METHOD_UNPREDICTABLE} +when @var{type} is @code{EXCESS_PRECISION_TYPE_STANDARD} or +@code{EXCESS_PRECISION_TYPE_FAST}. @end deftypefn @deftypefn {Target Hook} machine_mode TARGET_PROMOTE_FUNCTION_MODE (const_tree @var{type}, machine_mode @var{mode}, int *@var{punsignedp}, const_tree @var{funtype}, int @var{for_return}) @@ -2538,7 +2579,16 @@ only if neither labeling works. @end defmac @deftypefn {Target Hook} reg_class_t TARGET_PREFERRED_RENAME_CLASS (reg_class_t @var{rclass}) -A target hook that places additional preference on the register class to use when it is necessary to rename a register in class @var{rclass} to another class, or perhaps @var{NO_REGS}, if no preferred register class is found or hook @code{preferred_rename_class} is not implemented. Sometimes returning a more restrictive class makes better code. For example, on ARM, thumb-2 instructions using @code{LO_REGS} may be smaller than instructions using @code{GENERIC_REGS}. By returning @code{LO_REGS} from @code{preferred_rename_class}, code size can be reduced. +A target hook that places additional preference on the register +class to use when it is necessary to rename a register in class +@var{rclass} to another class, or perhaps @var{NO_REGS}, if no +preferred register class is found or hook @code{preferred_rename_class} +is not implemented. +Sometimes returning a more restrictive class makes better code. For +example, on ARM, thumb-2 instructions using @code{LO_REGS} may be +smaller than instructions using @code{GENERIC_REGS}. By returning +@code{LO_REGS} from @code{preferred_rename_class}, code size can +be reduced. @end deftypefn @deftypefn {Target Hook} reg_class_t TARGET_PREFERRED_RELOAD_CLASS (rtx @var{x}, reg_class_t @var{rclass}) @@ -2922,19 +2972,44 @@ A target hook which can change allocno class for given pseudo from @end deftypefn @deftypefn {Target Hook} bool TARGET_LRA_P (void) -A target hook which returns true if we use LRA instead of reload pass. The default version of this target hook returns true. New ports should use LRA, and existing ports are encouraged to convert. +A target hook which returns true if we use LRA instead of reload pass. + +The default version of this target hook returns true. New ports +should use LRA, and existing ports are encouraged to convert. @end deftypefn @deftypefn {Target Hook} int TARGET_REGISTER_PRIORITY (int) -A target hook which returns the register priority number to which the register @var{hard_regno} belongs to. The bigger the number, the more preferable the hard register usage (when all other conditions are the same). This hook can be used to prefer some hard register over others in LRA. For example, some x86-64 register usage needs additional prefix which makes instructions longer. The hook can return lower priority number for such registers make them less favorable and as result making the generated code smaller. The default version of this target hook returns always zero. +A target hook which returns the register priority number to which the +register @var{hard_regno} belongs to. The bigger the number, the +more preferable the hard register usage (when all other conditions are +the same). This hook can be used to prefer some hard register over +others in LRA. For example, some x86-64 register usage needs +additional prefix which makes instructions longer. The hook can +return lower priority number for such registers make them less favorable +and as result making the generated code smaller. + +The default version of this target hook returns always zero. @end deftypefn @deftypefn {Target Hook} bool TARGET_REGISTER_USAGE_LEVELING_P (void) -A target hook which returns true if we need register usage leveling. That means if a few hard registers are equally good for the assignment, we choose the least used hard register. The register usage leveling may be profitable for some targets. Don't use the usage leveling for targets with conditional execution or targets with big register files as it hurts if-conversion and cross-jumping optimizations. The default version of this target hook returns always false. +A target hook which returns true if we need register usage leveling. +That means if a few hard registers are equally good for the +assignment, we choose the least used hard register. The register +usage leveling may be profitable for some targets. Don't use the +usage leveling for targets with conditional execution or targets +with big register files as it hurts if-conversion and cross-jumping +optimizations. + +The default version of this target hook returns always false. @end deftypefn @deftypefn {Target Hook} bool TARGET_DIFFERENT_ADDR_DISPLACEMENT_P (void) -A target hook which returns true if an address with the same structure can have different maximal legitimate displacement. For example, the displacement can depend on memory mode or on operand combinations in the insn. The default version of this target hook returns always false. +A target hook which returns true if an address with the same structure +can have different maximal legitimate displacement. For example, the +displacement can depend on memory mode or on operand combinations in +the insn. + +The default version of this target hook returns always false. @end deftypefn @deftypefn {Target Hook} bool TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P (rtx @var{subst}) @@ -2960,19 +3035,34 @@ from the anchor in @var{offset2}. The default implementation returns false. @end deftypefn @deftypefn {Target Hook} reg_class_t TARGET_SPILL_CLASS (reg_class_t, @var{machine_mode}) -This hook defines a class of registers which could be used for spilling pseudos of the given mode and class, or @code{NO_REGS} if only memory should be used. Not defining this hook is equivalent to returning @code{NO_REGS} for all inputs. +This hook defines a class of registers which could be used for spilling +pseudos of the given mode and class, or @code{NO_REGS} if only memory +should be used. Not defining this hook is equivalent to returning +@code{NO_REGS} for all inputs. @end deftypefn @deftypefn {Target Hook} bool TARGET_ADDITIONAL_ALLOCNO_CLASS_P (reg_class_t) -This hook should return @code{true} if given class of registers should be an allocno class in any way. Usually RA uses only one register class from all classes containing the same register set. In some complicated cases, you need to have two or more such classes as allocno ones for RA correct work. Not defining this hook is equivalent to returning @code{false} for all inputs. +This hook should return @code{true} if given class of registers should +be an allocno class in any way. Usually RA uses only one register +class from all classes containing the same register set. In some +complicated cases, you need to have two or more such classes as +allocno ones for RA correct work. Not defining this hook is +equivalent to returning @code{false} for all inputs. @end deftypefn @deftypefn {Target Hook} scalar_int_mode TARGET_CSTORE_MODE (enum insn_code @var{icode}) -This hook defines the machine mode to use for the boolean result of conditional store patterns. The ICODE argument is the instruction code for the cstore being performed. Not definiting this hook is the same as accepting the mode encoded into operand 0 of the cstore expander patterns. +This hook defines the machine mode to use for the boolean result of +conditional store patterns. The ICODE argument is the instruction code +for the cstore being performed. Not definiting this hook is the same +as accepting the mode encoded into operand 0 of the cstore expander +patterns. @end deftypefn @deftypefn {Target Hook} int TARGET_COMPUTE_PRESSURE_CLASSES (enum reg_class *@var{pressure_classes}) -A target hook which lets a backend compute the set of pressure classes to be used by those optimization passes which take register pressure into account, as opposed to letting IRA compute them. It returns the number of register classes stored in the array @var{pressure_classes}. +A target hook which lets a backend compute the set of pressure classes to +be used by those optimization passes which take register pressure into +account, as opposed to letting IRA compute them. It returns the number of +register classes stored in the array @var{pressure_classes}. @end deftypefn @node Stack and Calling @@ -3505,9 +3595,12 @@ normally not need to override that default. @deftypefn {Target Hook} HOST_WIDE_INT TARGET_STACK_CLASH_PROTECTION_ALLOCA_PROBE_RANGE (void) Some targets have an ABI defined interval for which no probing needs to be done. -When a probe does need to be done this same interval is used as the probe distance up when doing stack clash protection for alloca. +When a probe does need to be done this same interval is used as the probe distance +up when doing stack clash protection for alloca. On such targets this value can be set to override the default probing up interval. -Define this variable to return nonzero if such a probe range is required or zero otherwise. Defining this hook also requires your functions which make use of alloca to have at least 8 byesof outgoing arguments. If this is not the case the stack will be corrupted. +Define this variable to return nonzero if such a probe range is required or zero otherwise. +Defining this hook also requires your functions which make use of alloca to have at least 8 byes +of outgoing arguments. If this is not the case the stack will be corrupted. You need not define this macro if it would always have the value zero. @end deftypefn @@ -4300,7 +4393,11 @@ hook returns true for both @code{ptr_mode} and @code{Pmode}. @end deftypefn @deftypefn {Target Hook} bool TARGET_REF_MAY_ALIAS_ERRNO (ao_ref *@var{ref}) -Define this to return nonzero if the memory reference @var{ref} may alias with the system C library errno location. The default version of this hook assumes the system C library errno location is either a declaration of type int or accessed by dereferencing a pointer to int. +Define this to return nonzero if the memory reference @var{ref} +may alias with the system C library errno location. The default +version of this hook assumes the system C library errno location +is either a declaration of type int or accessed by dereferencing +a pointer to int. @end deftypefn @deftypefn {Target Hook} machine_mode TARGET_TRANSLATE_MODE_ATTRIBUTE (machine_mode @var{mode}) @@ -4686,11 +4783,15 @@ nothing when you use @option{-freg-struct-return} mode. @end defmac @deftypefn {Target Hook} fixed_size_mode TARGET_GET_RAW_RESULT_MODE (int @var{regno}) -This target hook returns the mode to be used when accessing raw return registers in @code{__builtin_return}. Define this macro if the value in @var{reg_raw_mode} is not correct. +This target hook returns the mode to be used when accessing raw return +registers in @code{__builtin_return}. Define this macro if the value +in @var{reg_raw_mode} is not correct. @end deftypefn @deftypefn {Target Hook} fixed_size_mode TARGET_GET_RAW_ARG_MODE (int @var{regno}) -This target hook returns the mode to be used when accessing raw argument registers in @code{__builtin_apply_args}. Define this macro if the value in @var{reg_raw_mode} is not correct. +This target hook returns the mode to be used when accessing raw argument +registers in @code{__builtin_apply_args}. Define this macro if the value +in @var{reg_raw_mode} is not correct. @end deftypefn @deftypefn {Target Hook} bool TARGET_EMPTY_RECORD_P (const_tree @var{type}) @@ -4994,7 +5095,11 @@ the function prologue. Normally, the profiling code comes after. @end defmac @deftypefn {Target Hook} bool TARGET_KEEP_LEAF_WHEN_PROFILED (void) -This target hook returns true if the target wants the leaf flag for the current function to stay true even if it calls mcount. This might make sense for targets using the leaf flag only to determine whether a stack frame needs to be generated or not and for which the call to mcount is generated before the function prologue. +This target hook returns true if the target wants the leaf flag for +the current function to stay true even if it calls mcount. This might +make sense for targets using the leaf flag only to determine whether a +stack frame needs to be generated or not and for which the call to +mcount is generated before the function prologue. @end deftypefn @node Tail Calls @@ -5024,11 +5129,14 @@ FRAME_POINTER_REGNUM, ARG_POINTER_REGNUM, and the PIC_OFFSET_TABLE_REGNUM. @end deftypefn @deftypefn {Target Hook} void TARGET_SET_UP_BY_PROLOGUE (struct hard_reg_set_container *@var{}) -This hook should add additional registers that are computed by the prologue to the hard regset for shrink-wrapping optimization purposes. +This hook should add additional registers that are computed by the prologue +to the hard regset for shrink-wrapping optimization purposes. @end deftypefn @deftypefn {Target Hook} bool TARGET_WARN_FUNC_RETURN (tree) -True if a function's return statements should be checked for matching the function's return type. This includes checking for falling off the end of a non-void function. Return false if no such check should be made. +True if a function's return statements should be checked for matching +the function's return type. This includes checking for falling off the end +of a non-void function. Return false if no such check should be made. @end deftypefn @node Shrink-wrapping separate components @@ -5119,15 +5227,26 @@ normally defined in @file{libgcc2.c}. @end deftypefn @deftypefn {Target Hook} bool TARGET_STACK_PROTECT_RUNTIME_ENABLED_P (void) -Returns true if the target wants GCC's default stack protect runtime support, otherwise return false. The default implementation always returns true. +Returns true if the target wants GCC's default stack protect runtime support, +otherwise return false. The default implementation always returns true. @end deftypefn @deftypefn {Common Target Hook} bool TARGET_SUPPORTS_SPLIT_STACK (bool @var{report}, struct gcc_options *@var{opts}) -Whether this target supports splitting the stack when the options described in @var{opts} have been passed. This is called after options have been parsed, so the target may reject splitting the stack in some configurations. The default version of this hook returns false. If @var{report} is true, this function may issue a warning or error; if @var{report} is false, it must simply return a value +Whether this target supports splitting the stack when the options +described in @var{opts} have been passed. This is called +after options have been parsed, so the target may reject splitting +the stack in some configurations. The default version of this hook +returns false. If @var{report} is true, this function may issue a warning +or error; if @var{report} is false, it must simply return a value @end deftypefn @deftypefn {Common Target Hook} {vec} TARGET_GET_VALID_OPTION_VALUES (int @var{option_code}, const char *@var{prefix}) -The hook is used for options that have a non-trivial list of possible option values. OPTION_CODE is option code of opt_code enum type. PREFIX is used for bash completion and allows an implementation to return more specific completion based on the prefix. All string values should be allocated from heap memory and consumers should release them. The result will be pruned to cases with PREFIX if not NULL. +The hook is used for options that have a non-trivial list of +possible option values. OPTION_CODE is option code of opt_code +enum type. PREFIX is used for bash completion and allows an implementation +to return more specific completion based on the prefix. All string values +should be allocated from heap memory and consumers should release them. +The result will be pruned to cases with PREFIX if not NULL. @end deftypefn @node Miscellaneous Register Hooks @@ -5987,7 +6106,9 @@ correct for most targets. @end deftypefn @deftypefn {Target Hook} bool TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE (const_tree @var{type}, bool @var{is_packed}) -Return true if vector alignment is reachable (by peeling N iterations) for the given scalar type @var{type}. @var{is_packed} is false if the scalar access using @var{type} is known to be naturally aligned. +Return true if vector alignment is reachable (by peeling N iterations) +for the given scalar type @var{type}. @var{is_packed} is false if the scalar +access using @var{type} is known to be naturally aligned. @end deftypefn @deftypefn {Target Hook} bool TARGET_VECTORIZE_VEC_PERM_CONST (machine_mode @var{mode}, rtx @var{output}, rtx @var{in0}, rtx @var{in1}, const vec_perm_indices @var{&sel}) @@ -6121,19 +6242,37 @@ all zeros. GCC can then try to branch around the instruction instead. @end deftypefn @deftypefn {Target Hook} {void *} TARGET_VECTORIZE_INIT_COST (class loop *@var{loop_info}, bool @var{costing_for_scalar}) -This hook should initialize target-specific data structures in preparation for modeling the costs of vectorizing a loop or basic block. The default allocates three unsigned integers for accumulating costs for the prologue, body, and epilogue of the loop or basic block. If @var{loop_info} is non-NULL, it identifies the loop being vectorized; otherwise a single block is being vectorized. If @var{costing_for_scalar} is true, it indicates the current cost model is for the scalar version of a loop or block; otherwise it is for the vector version. +This hook should initialize target-specific data structures in preparation +for modeling the costs of vectorizing a loop or basic block. The default +allocates three unsigned integers for accumulating costs for the prologue, +body, and epilogue of the loop or basic block. If @var{loop_info} is +non-NULL, it identifies the loop being vectorized; otherwise a single block +is being vectorized. If @var{costing_for_scalar} is true, it indicates the +current cost model is for the scalar version of a loop or block; otherwise +it is for the vector version. @end deftypefn @deftypefn {Target Hook} unsigned TARGET_VECTORIZE_ADD_STMT_COST (class vec_info *@var{}, void *@var{data}, int @var{count}, enum vect_cost_for_stmt @var{kind}, class _stmt_vec_info *@var{stmt_info}, tree @var{vectype}, int @var{misalign}, enum vect_cost_model_location @var{where}) -This hook should update the target-specific @var{data} in response to adding @var{count} copies of the given @var{kind} of statement to a loop or basic block. The default adds the builtin vectorizer cost for the copies of the statement to the accumulator specified by @var{where}, (the prologue, body, or epilogue) and returns the amount added. The return value should be viewed as a tentative cost that may later be revised. +This hook should update the target-specific @var{data} in response to +adding @var{count} copies of the given @var{kind} of statement to a +loop or basic block. The default adds the builtin vectorizer cost for +the copies of the statement to the accumulator specified by @var{where}, +(the prologue, body, or epilogue) and returns the amount added. The +return value should be viewed as a tentative cost that may later be +revised. @end deftypefn @deftypefn {Target Hook} void TARGET_VECTORIZE_FINISH_COST (void *@var{data}, unsigned *@var{prologue_cost}, unsigned *@var{body_cost}, unsigned *@var{epilogue_cost}) -This hook should complete calculations of the cost of vectorizing a loop or basic block based on @var{data}, and return the prologue, body, and epilogue costs as unsigned integers. The default returns the value of the three accumulators. +This hook should complete calculations of the cost of vectorizing a loop +or basic block based on @var{data}, and return the prologue, body, and +epilogue costs as unsigned integers. The default returns the value of +the three accumulators. @end deftypefn @deftypefn {Target Hook} void TARGET_VECTORIZE_DESTROY_COST_DATA (void *@var{data}) -This hook should release @var{data} and any related data structures allocated by TARGET_VECTORIZE_INIT_COST. The default releases the accumulator. +This hook should release @var{data} and any related data structures +allocated by TARGET_VECTORIZE_INIT_COST. The default releases the +accumulator. @end deftypefn @deftypefn {Target Hook} tree TARGET_VECTORIZE_BUILTIN_GATHER (const_tree @var{mem_vectype}, const_tree @var{index_type}, int @var{scale}) @@ -7711,7 +7850,8 @@ the string if a different section name should be used. @end deftypevr @deftypefn {Target Hook} {section *} TARGET_ASM_TM_CLONE_TABLE_SECTION (void) -Return the section that should be used for transactional memory clone tables. +Return the section that should be used for transactional memory clone +tables. @end deftypefn @deftypefn {Target Hook} {section *} TARGET_ASM_SELECT_RTX_SECTION (machine_mode @var{mode}, rtx @var{x}, unsigned HOST_WIDE_INT @var{align}) @@ -7985,13 +8125,18 @@ for the file format in use is appropriate. @end defmac @deftypefn {Target Hook} void TARGET_ASM_OUTPUT_SOURCE_FILENAME (FILE *@var{file}, const char *@var{name}) -Output DWARF debugging information which indicates that filename @var{name} is the current source file to the stdio stream @var{file}. - - This target hook need not be defined if the standard form of output for the file format in use is appropriate. +Output DWARF debugging information which indicates that filename +@var{name} is the current source file to the stdio stream @var{file}. + +This target hook need not be defined if the standard form of output +for the file format in use is appropriate. @end deftypefn @deftypefn {Target Hook} void TARGET_ASM_OUTPUT_IDENT (const char *@var{name}) -Output a string based on @var{name}, suitable for the @samp{#ident} directive, or the equivalent directive or pragma in non-C-family languages. If this hook is not defined, nothing is output for the @samp{#ident} directive. +Output a string based on @var{name}, suitable for the @samp{#ident} +directive, or the equivalent directive or pragma in non-C-family languages. +If this hook is not defined, nothing is output for the @samp{#ident} +directive. @end deftypefn @defmac OUTPUT_QUOTED_STRING (@var{stream}, @var{string}) @@ -8033,7 +8178,11 @@ Return NULL if function should go to default text section. @end deftypefn @deftypefn {Target Hook} void TARGET_ASM_FUNCTION_SWITCHED_TEXT_SECTIONS (FILE *@var{file}, tree @var{decl}, bool @var{new_is_cold}) -Used by the target to emit any assembler directives or additional labels needed when a function is partitioned between different sections. Output should be written to @var{file}. The function decl is available as @var{decl} and the new section is `cold' if @var{new_is_cold} is @code{true}. +Used by the target to emit any assembler directives or additional +labels needed when a function is partitioned between different +sections. Output should be written to @var{file}. The function +decl is available as @var{decl} and the new section is `cold' if +@var{new_is_cold} is @code{true}. @end deftypefn @deftypevr {Common Target Hook} bool TARGET_HAVE_NAMED_SECTIONS @@ -8735,7 +8884,11 @@ systems. This macro is used in @code{assemble_name}. @end defmac @deftypefn {Target Hook} tree TARGET_MANGLE_ASSEMBLER_NAME (const char *@var{name}) -Given a symbol @var{name}, perform same mangling as @code{varasm.c}'s @code{assemble_name}, but in memory rather than to a file stream, returning result as an @code{IDENTIFIER_NODE}. Required for correct LTO symtabs. The default implementation calls the @code{TARGET_STRIP_NAME_ENCODING} hook and then prepends the @code{USER_LABEL_PREFIX}, if any. +Given a symbol @var{name}, perform same mangling as @code{varasm.c}'s +@code{assemble_name}, but in memory rather than to a file stream, returning +result as an @code{IDENTIFIER_NODE}. Required for correct LTO symtabs. The +default implementation calls the @code{TARGET_STRIP_NAME_ENCODING} hook and +then prepends the @code{USER_LABEL_PREFIX}, if any. @end deftypefn @defmac ASM_OUTPUT_SYMBOL_REF (@var{stream}, @var{sym}) @@ -9501,7 +9654,9 @@ The default is that no label is emitted. @end deftypefn @deftypefn {Target Hook} void TARGET_ASM_EMIT_EXCEPT_PERSONALITY (rtx @var{personality}) -If the target implements @code{TARGET_ASM_UNWIND_EMIT}, this hook may be used to emit a directive to install a personality hook into the unwind info. This hook should not be used if dwarf2 unwind info is used. +If the target implements @code{TARGET_ASM_UNWIND_EMIT}, this hook may be +used to emit a directive to install a personality hook into the unwind +info. This hook should not be used if dwarf2 unwind info is used. @end deftypefn @deftypefn {Target Hook} void TARGET_ASM_UNWIND_EMIT (FILE *@var{stream}, rtx_insn *@var{insn}) @@ -9511,15 +9666,25 @@ returns @code{UI_TARGET}. @end deftypefn @deftypefn {Target Hook} rtx TARGET_ASM_MAKE_EH_SYMBOL_INDIRECT (rtx @var{origsymbol}, bool @var{pubvis}) -If necessary, modify personality and LSDA references to handle indirection. The original symbol is in @code{origsymbol} and if @code{pubvis} is true the symbol is visible outside the TU. +If necessary, modify personality and LSDA references to handle indirection. +The original symbol is in @code{origsymbol} and if @code{pubvis} is true +the symbol is visible outside the TU. @end deftypefn @deftypevr {Target Hook} bool TARGET_ASM_UNWIND_EMIT_BEFORE_INSN -True if the @code{TARGET_ASM_UNWIND_EMIT} hook should be called before the assembly for @var{insn} has been emitted, false if the hook should be called afterward. +True if the @code{TARGET_ASM_UNWIND_EMIT} hook should be called before +the assembly for @var{insn} has been emitted, false if the hook should +be called afterward. @end deftypevr @deftypefn {Target Hook} bool TARGET_ASM_SHOULD_RESTORE_CFA_STATE (void) -For DWARF-based unwind frames, two CFI instructions provide for save and restore of register state. GCC maintains the current frame address (CFA) separately from the register bank but the unwinder in libgcc preserves this state along with the registers (and this is expected by the code that writes the unwind frames). This hook allows the target to specify that the CFA data is not saved/restored along with the registers by the target unwinder so that suitable additional instructions should be emitted to restore it. +For DWARF-based unwind frames, two CFI instructions provide for save and +restore of register state. GCC maintains the current frame address (CFA) +separately from the register bank but the unwinder in libgcc preserves this +state along with the registers (and this is expected by the code that writes +the unwind frames). This hook allows the target to specify that the CFA data +is not saved/restored along with the registers by the target unwinder so that +suitable additional instructions should be emitted to restore it. @end deftypefn @node Exception Region Output @@ -10124,7 +10289,9 @@ If insn length is to be regarded as reliable, set the hook to @end deftypefn @deftypevr {Target Hook} bool TARGET_WANT_DEBUG_PUB_SECTIONS -True if the @code{.debug_pubtypes} and @code{.debug_pubnames} sections should be emitted. These sections are not used on most platforms, and in particular GDB does not use them. +True if the @code{.debug_pubtypes} and @code{.debug_pubnames} sections +should be emitted. These sections are not used on most platforms, and +in particular GDB does not use them. @end deftypevr @deftypevr {Target Hook} bool TARGET_DELAY_SCHED2 @@ -10307,27 +10474,52 @@ switch is needed / supplied. @end defmac @deftypefn {Target Hook} void TARGET_MODE_EMIT (int @var{entity}, int @var{mode}, int @var{prev_mode}, HARD_REG_SET @var{regs_live}) -Generate one or more insns to set @var{entity} to @var{mode}. @var{hard_reg_live} is the set of hard registers live at the point where the insn(s) are to be inserted. @var{prev_moxde} indicates the mode to switch from. Sets of a lower numbered entity will be emitted before sets of a higher numbered entity to a mode of the same or lower priority. +Generate one or more insns to set @var{entity} to @var{mode}. +@var{hard_reg_live} is the set of hard registers live at the point where +the insn(s) are to be inserted. @var{prev_moxde} indicates the mode +to switch from. Sets of a lower numbered entity will be emitted before +sets of a higher numbered entity to a mode of the same or lower priority. @end deftypefn @deftypefn {Target Hook} int TARGET_MODE_NEEDED (int @var{entity}, rtx_insn *@var{insn}) -@var{entity} is an integer specifying a mode-switched entity. If @code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro to return an integer value not larger than the corresponding element in @code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity} must be switched into prior to the execution of @var{insn}. +@var{entity} is an integer specifying a mode-switched entity. +If @code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro +to return an integer value not larger than the corresponding element +in @code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity} +must be switched into prior to the execution of @var{insn}. @end deftypefn @deftypefn {Target Hook} int TARGET_MODE_AFTER (int @var{entity}, int @var{mode}, rtx_insn *@var{insn}) -@var{entity} is an integer specifying a mode-switched entity. If this macro is defined, it is evaluated for every @var{insn} during mode switching. It determines the mode that an insn results in (if different from the incoming mode). +@var{entity} is an integer specifying a mode-switched entity. +If this macro is defined, it is evaluated for every @var{insn} during mode +switching. It determines the mode that an insn results +in (if different from the incoming mode). @end deftypefn @deftypefn {Target Hook} int TARGET_MODE_ENTRY (int @var{entity}) -If this macro is defined, it is evaluated for every @var{entity} that needs mode switching. It should evaluate to an integer, which is a mode that @var{entity} is assumed to be switched to at function entry. If @code{TARGET_MODE_ENTRY} is defined then @code{TARGET_MODE_EXIT} must be defined. +If this macro is defined, it is evaluated for every @var{entity} that +needs mode switching. It should evaluate to an integer, which is a mode +that @var{entity} is assumed to be switched to at function entry. +If @code{TARGET_MODE_ENTRY} is defined then @code{TARGET_MODE_EXIT} +must be defined. @end deftypefn @deftypefn {Target Hook} int TARGET_MODE_EXIT (int @var{entity}) -If this macro is defined, it is evaluated for every @var{entity} that needs mode switching. It should evaluate to an integer, which is a mode that @var{entity} is assumed to be switched to at function exit. If @code{TARGET_MODE_EXIT} is defined then @code{TARGET_MODE_ENTRY} must be defined. +If this macro is defined, it is evaluated for every @var{entity} that +needs mode switching. It should evaluate to an integer, which is a mode +that @var{entity} is assumed to be switched to at function exit. +If @code{TARGET_MODE_EXIT} is defined then @code{TARGET_MODE_ENTRY} +must be defined. @end deftypefn @deftypefn {Target Hook} int TARGET_MODE_PRIORITY (int @var{entity}, int @var{n}) -This macro specifies the order in which modes for @var{entity} are processed. 0 is the highest priority, @code{NUM_MODES_FOR_MODE_SWITCHING[@var{entity}] - 1} the lowest. The value of the macro should be an integer designating a mode for @var{entity}. For any fixed @var{entity}, @code{mode_priority} (@var{entity}, @var{n}) shall be a bijection in 0 @dots{} @code{num_modes_for_mode_switching[@var{entity}] - 1}. +This macro specifies the order in which modes for @var{entity} +are processed. 0 is the highest priority, +@code{NUM_MODES_FOR_MODE_SWITCHING[@var{entity}] - 1} the lowest. +The value of the macro should be an integer designating a mode +for @var{entity}. For any fixed @var{entity}, @code{mode_priority} +(@var{entity}, @var{n}) shall be a bijection in 0 @dots{} +@code{num_modes_for_mode_switching[@var{entity}] - 1}. @end deftypefn @node Target Attributes @@ -10401,7 +10593,9 @@ to perform initial processing of the @samp{dllimport} and @end deftypefn @deftypefn {Target Hook} bool TARGET_VALID_DLLIMPORT_ATTRIBUTE_P (const_tree @var{decl}) -@var{decl} is a variable or function with @code{__attribute__((dllimport))} specified. Use this hook if the target needs to add extra validation checks to @code{handle_dll_attribute}. +@var{decl} is a variable or function with @code{__attribute__((dllimport))} +specified. Use this hook if the target needs to add extra validation +checks to @code{handle_dll_attribute}. @end deftypefn @defmac TARGET_DECLSPEC @@ -10516,7 +10710,9 @@ specific target options and the caller does not use the same options. @end deftypefn @deftypefn {Target Hook} void TARGET_RELAYOUT_FUNCTION (tree @var{fndecl}) -This target hook fixes function @var{fndecl} after attributes are processed. Default does nothing. On ARM, the default function's alignment is updated with the attribute target. +This target hook fixes function @var{fndecl} after attributes are processed. +Default does nothing. On ARM, the default function's alignment is updated +with the attribute target. @end deftypefn @node Emulated TLS @@ -10720,7 +10916,12 @@ method. The default is to return @code{true}. @end deftypefn @deftypefn {Target Hook} void TARGET_CXX_DETERMINE_CLASS_DATA_VISIBILITY (tree @var{decl}) -@var{decl} is a virtual table, virtual table table, typeinfo object, or other similar implicit class data object that will be emitted with external linkage in this translation unit. No ELF visibility has been explicitly specified. If the target needs to specify a visibility other than that of the containing class, use this hook to set @code{DECL_VISIBILITY} and @code{DECL_VISIBILITY_SPECIFIED}. +@var{decl} is a virtual table, virtual table table, typeinfo object, +or other similar implicit class data object that will be emitted with +external linkage in this translation unit. No ELF visibility has been +explicitly specified. If the target needs to specify a visibility +other than that of the containing class, use this hook to set +@code{DECL_VISIBILITY} and @code{DECL_VISIBILITY_SPECIFIED}. @end deftypefn @deftypefn {Target Hook} bool TARGET_CXX_CLASS_DATA_ALWAYS_COMDAT (void) @@ -10752,7 +10953,9 @@ unloaded. The default is to return false. @end deftypefn @deftypefn {Target Hook} void TARGET_CXX_ADJUST_CLASS_AT_DEFINITION (tree @var{type}) -@var{type} is a C++ class (i.e., RECORD_TYPE or UNION_TYPE) that has just been defined. Use this hook to make adjustments to the class (eg, tweak visibility or perform any other required target modifications). +@var{type} is a C++ class (i.e., RECORD_TYPE or UNION_TYPE) that has just +been defined. Use this hook to make adjustments to the class (eg, tweak +visibility or perform any other required target modifications). @end deftypefn @deftypefn {Target Hook} tree TARGET_CXX_DECL_MANGLING_CONTEXT (const_tree @var{decl}) @@ -11359,13 +11562,24 @@ files @code{__STDC__} will always expand to 1. @end defmac @deftypefn {C Target Hook} {const char *} TARGET_C_PREINCLUDE (void) -Define this hook to return the name of a header file to be included at the start of all compilations, as if it had been included with @code{#include <@var{file}>}. If this hook returns @code{NULL}, or is not defined, or the header is not found, or if the user specifies @option{-ffreestanding} or @option{-nostdinc}, no header is included. +Define this hook to return the name of a header file to be included at +the start of all compilations, as if it had been included with +@code{#include <@var{file}>}. If this hook returns @code{NULL}, or is +not defined, or the header is not found, or if the user specifies +@option{-ffreestanding} or @option{-nostdinc}, no header is included. - This hook can be used together with a header provided by the system C library to implement ISO C requirements for certain macros to be predefined that describe properties of the whole implementation rather than just the compiler. +This hook can be used together with a header provided by the system C +library to implement ISO C requirements for certain macros to be +predefined that describe properties of the whole implementation rather +than just the compiler. @end deftypefn @deftypefn {C Target Hook} bool TARGET_CXX_IMPLICIT_EXTERN_C (const char*@var{}) -Define this hook to add target-specific C++ implicit extern C functions. If this function returns true for the name of a file-scope function, that function implicitly gets extern "C" linkage rather than whatever language linkage the declaration would normally have. An example of such function is WinMain on Win32 targets. +Define this hook to add target-specific C++ implicit extern C functions. +If this function returns true for the name of a file-scope function, that +function implicitly gets extern "C" linkage rather than whatever language +linkage the declaration would normally have. An example of such function +is WinMain on Win32 targets. @end deftypefn @defmac SYSTEM_IMPLICIT_EXTERN_C @@ -11763,11 +11977,17 @@ loops containing function calls or branch on table instructions. @end deftypefn @deftypefn {Target Hook} bool TARGET_LEGITIMATE_COMBINED_INSN (rtx_insn *@var{insn}) -Take an instruction in @var{insn} and return @code{false} if the instruction is not appropriate as a combination of two or more instructions. The default is to accept all instructions. +Take an instruction in @var{insn} and return @code{false} if the instruction +is not appropriate as a combination of two or more instructions. The +default is to accept all instructions. @end deftypefn @deftypefn {Target Hook} bool TARGET_CAN_FOLLOW_JUMP (const rtx_insn *@var{follower}, const rtx_insn *@var{followee}) -FOLLOWER and FOLLOWEE are JUMP_INSN instructions; return true if FOLLOWER may be modified to follow FOLLOWEE; false, if it can't. For example, on some targets, certain kinds of branches can't be made to follow through a hot/cold partitioning. +FOLLOWER and FOLLOWEE are JUMP_INSN instructions; +return true if FOLLOWER may be modified to follow FOLLOWEE; +false, if it can't. +For example, on some targets, certain kinds of branches can't be made to +follow through a hot/cold partitioning. @end deftypefn @deftypefn {Target Hook} bool TARGET_COMMUTATIVE_P (const_rtx @var{x}, int @var{outer_code}) @@ -12107,7 +12327,9 @@ memory model bits are allowed. @end deftypefn @deftypevr {Target Hook} {unsigned char} TARGET_ATOMIC_TEST_AND_SET_TRUEVAL -This value should be set if the result written by @code{atomic_test_and_set} is not exactly 1, i.e.@: the @code{bool} @code{true}. +This value should be set if the result written by +@code{atomic_test_and_set} is not exactly 1, i.e.@: the +@code{bool} @code{true}. @end deftypevr @deftypefn {Target Hook} bool TARGET_HAS_IFUNC_P (void) @@ -12117,11 +12339,27 @@ The default value of this hook is based on target's libc. @end deftypefn @deftypefn {Target Hook} {unsigned int} TARGET_ATOMIC_ALIGN_FOR_MODE (machine_mode @var{mode}) -If defined, this function returns an appropriate alignment in bits for an atomic object of machine_mode @var{mode}. If 0 is returned then the default alignment for the specified mode is used. +If defined, this function returns an appropriate alignment in bits for an +atomic object of machine_mode @var{mode}. If 0 is returned then the +default alignment for the specified mode is used. @end deftypefn @deftypefn {Target Hook} void TARGET_ATOMIC_ASSIGN_EXPAND_FENV (tree *@var{hold}, tree *@var{clear}, tree *@var{update}) -ISO C11 requires atomic compound assignments that may raise floating-point exceptions to raise exceptions corresponding to the arithmetic operation whose result was successfully stored in a compare-and-exchange sequence. This requires code equivalent to calls to @code{feholdexcept}, @code{feclearexcept} and @code{feupdateenv} to be generated at appropriate points in the compare-and-exchange sequence. This hook should set @code{*@var{hold}} to an expression equivalent to the call to @code{feholdexcept}, @code{*@var{clear}} to an expression equivalent to the call to @code{feclearexcept} and @code{*@var{update}} to an expression equivalent to the call to @code{feupdateenv}. The three expressions are @code{NULL_TREE} on entry to the hook and may be left as @code{NULL_TREE} if no code is required in a particular place. The default implementation leaves all three expressions as @code{NULL_TREE}. The @code{__atomic_feraiseexcept} function from @code{libatomic} may be of use as part of the code generated in @code{*@var{update}}. +ISO C11 requires atomic compound assignments that may raise floating-point +exceptions to raise exceptions corresponding to the arithmetic operation +whose result was successfully stored in a compare-and-exchange sequence. +This requires code equivalent to calls to @code{feholdexcept}, +@code{feclearexcept} and @code{feupdateenv} to be generated at +appropriate points in the compare-and-exchange sequence. This hook should +set @code{*@var{hold}} to an expression equivalent to the call to +@code{feholdexcept}, @code{*@var{clear}} to an expression equivalent to +the call to @code{feclearexcept} and @code{*@var{update}} to an expression +equivalent to the call to @code{feupdateenv}. The three expressions are +@code{NULL_TREE} on entry to the hook and may be left as @code{NULL_TREE} +if no code is required in a particular place. The default implementation +leaves all three expressions as @code{NULL_TREE}. The +@code{__atomic_feraiseexcept} function from @code{libatomic} may be of use +as part of the code generated in @code{*@var{update}}. @end deftypefn @deftypefn {Target Hook} void TARGET_RECORD_OFFLOAD_SYMBOL (tree) diff --git a/gcc/target.def b/gcc/target.def index 1dffedc..ebe5803 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -179,9 +179,9 @@ The default is that no label is emitted.", /* Emit a directive for setting the personality for the function. */ DEFHOOK (emit_except_personality, - "If the target implements @code{TARGET_ASM_UNWIND_EMIT}, this hook may be\ - used to emit a directive to install a personality hook into the unwind\ - info. This hook should not be used if dwarf2 unwind info is used.", + "If the target implements @code{TARGET_ASM_UNWIND_EMIT}, this hook may be\n\ +used to emit a directive to install a personality hook into the unwind\n\ +info. This hook should not be used if dwarf2 unwind info is used.", void, (rtx personality), NULL) @@ -189,9 +189,9 @@ DEFHOOK indirection. This is used when the assembler supports CFI directives. */ DEFHOOK (make_eh_symbol_indirect, - "If necessary, modify personality and LSDA references to handle indirection.\ - The original symbol is in @code{origsymbol} and if @code{pubvis} is true\ - the symbol is visible outside the TU.", + "If necessary, modify personality and LSDA references to handle indirection.\n\ +The original symbol is in @code{origsymbol} and if @code{pubvis} is true\n\ +the symbol is visible outside the TU.", rtx, (rtx origsymbol, bool pubvis), NULL) @@ -206,22 +206,22 @@ returns @code{UI_TARGET}.", DEFHOOKPOD (unwind_emit_before_insn, - "True if the @code{TARGET_ASM_UNWIND_EMIT} hook should be called before\ - the assembly for @var{insn} has been emitted, false if the hook should\ - be called afterward.", + "True if the @code{TARGET_ASM_UNWIND_EMIT} hook should be called before\n\ +the assembly for @var{insn} has been emitted, false if the hook should\n\ +be called afterward.", bool, true) /* Return true if the target needs extra instructions to restore the current frame address after a DW_CFA_restore_state opcode. */ DEFHOOK (should_restore_cfa_state, - "For DWARF-based unwind frames, two CFI instructions provide for save and\ - restore of register state. GCC maintains the current frame address (CFA)\ - separately from the register bank but the unwinder in libgcc preserves this\ - state along with the registers (and this is expected by the code that writes\ - the unwind frames). This hook allows the target to specify that the CFA data\ - is not saved/restored along with the registers by the target unwinder so that\ - suitable additional instructions should be emitted to restore it.", + "For DWARF-based unwind frames, two CFI instructions provide for save and\n\ +restore of register state. GCC maintains the current frame address (CFA)\n\ +separately from the register bank but the unwinder in libgcc preserves this\n\ +state along with the registers (and this is expected by the code that writes\n\ +the unwind frames). This hook allows the target to specify that the CFA data\n\ +is not saved/restored along with the registers by the target unwinder so that\n\ +suitable additional instructions should be emitted to restore it.", bool, (void), hook_bool_void_false) @@ -483,11 +483,11 @@ Return NULL if function should go to default text section.", /* Output the assembler code for function exit. */ DEFHOOK (function_switched_text_sections, - "Used by the target to emit any assembler directives or additional\ - labels needed when a function is partitioned between different\ - sections. Output should be written to @var{file}. The function\ - decl is available as @var{decl} and the new section is `cold' if\ - @var{new_is_cold} is @code{true}.", + "Used by the target to emit any assembler directives or additional\n\ +labels needed when a function is partitioned between different\n\ +sections. Output should be written to @var{file}. The function\n\ +decl is available as @var{decl} and the new section is `cold' if\n\ +@var{new_is_cold} is @code{true}.", void, (FILE *file, tree decl, bool new_is_cold), default_function_switched_text_sections) @@ -599,8 +599,8 @@ the string if a different section name should be used.", /* Return the section to be used for transactional memory clone tables. */ DEFHOOK (tm_clone_table_section, - "Return the section that should be used for transactional memory clone\ - tables.", + "Return the section that should be used for transactional memory clone\n\ +tables.", section *, (void), default_clone_table_section) /* Output a constructor for a symbol with a given priority. */ @@ -810,10 +810,10 @@ is @code{NULL}, which disables the use of section anchors altogether.", DEFHOOK (output_ident, - "Output a string based on @var{name}, suitable for the @samp{#ident} \ - directive, or the equivalent directive or pragma in non-C-family languages. \ - If this hook is not defined, nothing is output for the @samp{#ident} \ - directive.", + "Output a string based on @var{name}, suitable for the @samp{#ident}\n\ +directive, or the equivalent directive or pragma in non-C-family languages.\n\ +If this hook is not defined, nothing is output for the @samp{#ident}\n\ +directive.", void, (const char *name), hook_void_constcharptr) @@ -858,11 +858,11 @@ to generate it on the spot.", DEFHOOK (output_source_filename, - "Output DWARF debugging information which indicates that filename\ - @var{name} is the current source file to the stdio stream @var{file}.\n\ - \n\ - This target hook need not be defined if the standard form of output\ - for the file format in use is appropriate.", + "Output DWARF debugging information which indicates that filename\n\ +@var{name} is the current source file to the stdio stream @var{file}.\n\ +\n\ +This target hook need not be defined if the standard form of output\n\ +for the file format in use is appropriate.", void ,(FILE *file, const char *name), default_asm_output_source_filename) @@ -918,11 +918,11 @@ DEFHOOK_UNDOC ASM_OUTPUT_LABELREF, returning result as an IDENTIFIER_NODE. */ DEFHOOK (mangle_assembler_name, - "Given a symbol @var{name}, perform same mangling as @code{varasm.c}'s\ - @code{assemble_name}, but in memory rather than to a file stream, returning\ - result as an @code{IDENTIFIER_NODE}. Required for correct LTO symtabs. The\ - default implementation calls the @code{TARGET_STRIP_NAME_ENCODING} hook and\ - then prepends the @code{USER_LABEL_PREFIX}, if any.", + "Given a symbol @var{name}, perform same mangling as @code{varasm.c}'s\n\ +@code{assemble_name}, but in memory rather than to a file stream, returning\n\ +result as an @code{IDENTIFIER_NODE}. Required for correct LTO symtabs. The\n\ +default implementation calls the @code{TARGET_STRIP_NAME_ENCODING} hook and\n\ +then prepends the @code{USER_LABEL_PREFIX}, if any.", tree, (const char *name), default_mangle_assembler_name) @@ -1848,7 +1848,9 @@ correct for most targets.", iterations) for the given scalar type. */ DEFHOOK (vector_alignment_reachable, - "Return true if vector alignment is reachable (by peeling N iterations) for the given scalar type @var{type}. @var{is_packed} is false if the scalar access using @var{type} is known to be naturally aligned.", + "Return true if vector alignment is reachable (by peeling N iterations)\n\ +for the given scalar type @var{type}. @var{is_packed} is false if the scalar\n\ +access using @var{type} is known to be naturally aligned.", bool, (const_tree type, bool is_packed), default_builtin_vector_alignment_reachable) @@ -2029,14 +2031,14 @@ stores.", /* Target function to initialize the cost model for a loop or block. */ DEFHOOK (init_cost, - "This hook should initialize target-specific data structures in preparation " - "for modeling the costs of vectorizing a loop or basic block. The default " - "allocates three unsigned integers for accumulating costs for the prologue, " - "body, and epilogue of the loop or basic block. If @var{loop_info} is " - "non-NULL, it identifies the loop being vectorized; otherwise a single block " - "is being vectorized. If @var{costing_for_scalar} is true, it indicates the " - "current cost model is for the scalar version of a loop or block; otherwise " - "it is for the vector version.", + "This hook should initialize target-specific data structures in preparation\n\ +for modeling the costs of vectorizing a loop or basic block. The default\n\ +allocates three unsigned integers for accumulating costs for the prologue,\n\ +body, and epilogue of the loop or basic block. If @var{loop_info} is\n\ +non-NULL, it identifies the loop being vectorized; otherwise a single block\n\ +is being vectorized. If @var{costing_for_scalar} is true, it indicates the\n\ +current cost model is for the scalar version of a loop or block; otherwise\n\ +it is for the vector version.", void *, (class loop *loop_info, bool costing_for_scalar), default_init_cost) @@ -2046,13 +2048,13 @@ DEFHOOK block. */ DEFHOOK (add_stmt_cost, - "This hook should update the target-specific @var{data} in response to " - "adding @var{count} copies of the given @var{kind} of statement to a " - "loop or basic block. The default adds the builtin vectorizer cost for " - "the copies of the statement to the accumulator specified by @var{where}, " - "(the prologue, body, or epilogue) and returns the amount added. The " - "return value should be viewed as a tentative cost that may later be " - "revised.", + "This hook should update the target-specific @var{data} in response to\n\ +adding @var{count} copies of the given @var{kind} of statement to a\n\ +loop or basic block. The default adds the builtin vectorizer cost for\n\ +the copies of the statement to the accumulator specified by @var{where},\n\ +(the prologue, body, or epilogue) and returns the amount added. The\n\ +return value should be viewed as a tentative cost that may later be\n\ +revised.", unsigned, (class vec_info *, void *data, int count, enum vect_cost_for_stmt kind, class _stmt_vec_info *stmt_info, tree vectype, int misalign, @@ -2063,10 +2065,10 @@ DEFHOOK loop or block. */ DEFHOOK (finish_cost, - "This hook should complete calculations of the cost of vectorizing a loop " - "or basic block based on @var{data}, and return the prologue, body, and " - "epilogue costs as unsigned integers. The default returns the value of " - "the three accumulators.", + "This hook should complete calculations of the cost of vectorizing a loop\n\ +or basic block based on @var{data}, and return the prologue, body, and\n\ +epilogue costs as unsigned integers. The default returns the value of\n\ +the three accumulators.", void, (void *data, unsigned *prologue_cost, unsigned *body_cost, unsigned *epilogue_cost), @@ -2075,9 +2077,9 @@ DEFHOOK /* Function to delete target-specific cost modeling data. */ DEFHOOK (destroy_cost_data, - "This hook should release @var{data} and any related data structures " - "allocated by TARGET_VECTORIZE_INIT_COST. The default releases the " - "accumulator.", + "This hook should release @var{data} and any related data structures\n\ +allocated by TARGET_VECTORIZE_INIT_COST. The default releases the\n\ +accumulator.", void, (void *data), default_destroy_cost_data) @@ -2349,13 +2351,13 @@ DEFHOOK_UNDOC DEFHOOK (float_exceptions_rounding_supported_p, - "Returns true if the target supports IEEE 754 floating-point exceptions\ - and rounding modes, false otherwise. This is intended to relate to the\ - @code{float} and @code{double} types, but not necessarily @code{long double}.\ - By default, returns true if the @code{adddf3} instruction pattern is\ - available and false otherwise, on the assumption that hardware floating\ - point supports exceptions and rounding modes but software floating point\ - does not.", + "Returns true if the target supports IEEE 754 floating-point exceptions\n\ +and rounding modes, false otherwise. This is intended to relate to the\n\ +@code{float} and @code{double} types, but not necessarily @code{long double}.\n\ +By default, returns true if the @code{adddf3} instruction pattern is\n\ +available and false otherwise, on the assumption that hardware floating\n\ +point supports exceptions and rounding modes but software floating point\n\ +does not.", bool, (void), default_float_exceptions_rounding_supported_p) @@ -2678,11 +2680,11 @@ cannot_modify_jumps_past_reload_p ()\n\ /* True if FOLLOWER may be modified to follow FOLLOWEE. */ DEFHOOK (can_follow_jump, - "FOLLOWER and FOLLOWEE are JUMP_INSN instructions;\ - return true if FOLLOWER may be modified to follow FOLLOWEE;\ - false, if it can't.\ - For example, on some targets, certain kinds of branches can't be made to\ - follow through a hot/cold partitioning.", + "FOLLOWER and FOLLOWEE are JUMP_INSN instructions;\n\ +return true if FOLLOWER may be modified to follow FOLLOWEE;\n\ +false, if it can't.\n\ +For example, on some targets, certain kinds of branches can't be made to\n\ +follow through a hot/cold partitioning.", bool, (const rtx_insn *follower, const rtx_insn *followee), hook_bool_const_rtx_insn_const_rtx_insn_true) @@ -3064,11 +3066,11 @@ The default version of this hook use the target macro\n\ enabled. */ DEFHOOK (keep_leaf_when_profiled, - "This target hook returns true if the target wants the leaf flag for\ - the current function to stay true even if it calls mcount. This might\ - make sense for targets using the leaf flag only to determine whether a\ - stack frame needs to be generated or not and for which the call to\ - mcount is generated before the function prologue.", + "This target hook returns true if the target wants the leaf flag for\n\ +the current function to stay true even if it calls mcount. This might\n\ +make sense for targets using the leaf flag only to determine whether a\n\ +stack frame needs to be generated or not and for which the call to\n\ +mcount is generated before the function prologue.", bool, (void), default_keep_leaf_when_profiled) @@ -3232,7 +3234,7 @@ In order to enforce the representation of @code{mode},\n\ int, (scalar_int_mode mode, scalar_int_mode rep_mode), default_mode_rep_extended) - DEFHOOK +DEFHOOK (setjmp_preserves_nonvolatile_regs_p, "On some targets, it is assumed that the compiler will spill all pseudos\n\ that are live across a call to @code{setjmp}, while other targets treat\n\ @@ -3259,11 +3261,11 @@ hook returns true for both @code{ptr_mode} and @code{Pmode}.", /* Disambiguate with errno. */ DEFHOOK (ref_may_alias_errno, - "Define this to return nonzero if the memory reference @var{ref}\ - may alias with the system C library errno location. The default\ - version of this hook assumes the system C library errno location\ - is either a declaration of type int or accessed by dereferencing\ - a pointer to int.", + "Define this to return nonzero if the memory reference @var{ref}\n\ +may alias with the system C library errno location. The default\n\ +version of this hook assumes the system C library errno location\n\ +is either a declaration of type int or accessed by dereferencing\n\ +a pointer to int.", bool, (ao_ref *ref), default_ref_may_alias_errno) @@ -3936,7 +3938,8 @@ such as certain MIPS architectures possess both branches with and without\n\ delay slots. As the eager delay slot filler can decrease performance,\n\ disabling it is beneficial when ordinary branches are available. Use of\n\ delay slot branches filled using the basic filler is often still desirable\n\ -as the delay slot can hide a pipeline bubble.", bool, (void), +as the delay slot can hide a pipeline bubble.", + bool, (void), hook_bool_void_false) /* Return where to allocate pseudo for a given hard register initial value. */ @@ -4330,8 +4333,8 @@ normally defined in @file{libgcc2.c}.", protector runtime support. */ DEFHOOK (stack_protect_runtime_enabled_p, - "Returns true if the target wants GCC's default stack protect runtime support,\ - otherwise return false. The default implementation always returns true.", + "Returns true if the target wants GCC's default stack protect runtime support,\n\ +otherwise return false. The default implementation always returns true.", bool, (void), hook_bool_void_true) @@ -4454,17 +4457,17 @@ loops containing function calls or branch on table instructions.", /* Returns true for a legitimate combined insn. */ DEFHOOK (legitimate_combined_insn, -"Take an instruction in @var{insn} and return @code{false} if the instruction\ - is not appropriate as a combination of two or more instructions. The\ - default is to accept all instructions.", +"Take an instruction in @var{insn} and return @code{false} if the instruction\n\ +is not appropriate as a combination of two or more instructions. The\n\ +default is to accept all instructions.", bool, (rtx_insn *insn), hook_bool_rtx_insn_true) DEFHOOK (valid_dllimport_attribute_p, -"@var{decl} is a variable or function with @code{__attribute__((dllimport))}\ - specified. Use this hook if the target needs to add extra validation\ - checks to @code{handle_dll_attribute}.", +"@var{decl} is a variable or function with @code{__attribute__((dllimport))}\n\ +specified. Use this hook if the target needs to add extra validation\n\ +checks to @code{handle_dll_attribute}.", bool, (const_tree decl), hook_bool_const_tree_true) @@ -5256,7 +5259,7 @@ HPPA or IA-64.\n\ \n\ Using descriptors for nested functions\n\ eliminates the need for trampolines that reside on the stack and require\n\ -it to be made executable.",\ +it to be made executable.", int, -1) /* Return the number of bytes of its own arguments that a function @@ -5307,9 +5310,9 @@ number of arguments.", returned. */ DEFHOOK (get_raw_result_mode, - "This target hook returns the mode to be used when accessing raw return\ - registers in @code{__builtin_return}. Define this macro if the value\ - in @var{reg_raw_mode} is not correct.", + "This target hook returns the mode to be used when accessing raw return\n\ +registers in @code{__builtin_return}. Define this macro if the value\n\ +in @var{reg_raw_mode} is not correct.", fixed_size_mode, (int regno), default_get_reg_raw_mode) @@ -5317,9 +5320,9 @@ DEFHOOK passed. */ DEFHOOK (get_raw_arg_mode, - "This target hook returns the mode to be used when accessing raw argument\ - registers in @code{__builtin_apply_args}. Define this macro if the value\ - in @var{reg_raw_mode} is not correct.", + "This target hook returns the mode to be used when accessing raw argument\n\ +registers in @code{__builtin_apply_args}. Define this macro if the value\n\ +in @var{reg_raw_mode} is not correct.", fixed_size_mode, (int regno), default_get_reg_raw_mode) @@ -5476,53 +5479,53 @@ DEFHOOK /* Return true if we use LRA instead of reload. */ DEFHOOK (lra_p, - "A target hook which returns true if we use LRA instead of reload pass.\ - \ - The default version of this target hook returns true. New ports\ - should use LRA, and existing ports are encouraged to convert.", + "A target hook which returns true if we use LRA instead of reload pass.\n\ +\n\ +The default version of this target hook returns true. New ports\n\ +should use LRA, and existing ports are encouraged to convert.", bool, (void), default_lra_p) /* Return register priority of given hard regno for the current target. */ DEFHOOK (register_priority, - "A target hook which returns the register priority number to which the\ - register @var{hard_regno} belongs to. The bigger the number, the\ - more preferable the hard register usage (when all other conditions are\ - the same). This hook can be used to prefer some hard register over\ - others in LRA. For example, some x86-64 register usage needs\ - additional prefix which makes instructions longer. The hook can\ - return lower priority number for such registers make them less favorable\ - and as result making the generated code smaller.\ - \ - The default version of this target hook returns always zero.", + "A target hook which returns the register priority number to which the\n\ +register @var{hard_regno} belongs to. The bigger the number, the\n\ +more preferable the hard register usage (when all other conditions are\n\ +the same). This hook can be used to prefer some hard register over\n\ +others in LRA. For example, some x86-64 register usage needs\n\ +additional prefix which makes instructions longer. The hook can\n\ +return lower priority number for such registers make them less favorable\n\ +and as result making the generated code smaller.\n\ +\n\ +The default version of this target hook returns always zero.", int, (int), default_register_priority) /* Return true if we need register usage leveling. */ DEFHOOK (register_usage_leveling_p, - "A target hook which returns true if we need register usage leveling.\ - That means if a few hard registers are equally good for the\ - assignment, we choose the least used hard register. The register\ - usage leveling may be profitable for some targets. Don't use the\ - usage leveling for targets with conditional execution or targets\ - with big register files as it hurts if-conversion and cross-jumping\ - optimizations.\ - \ - The default version of this target hook returns always false.", + "A target hook which returns true if we need register usage leveling.\n\ +That means if a few hard registers are equally good for the\n\ +assignment, we choose the least used hard register. The register\n\ +usage leveling may be profitable for some targets. Don't use the\n\ +usage leveling for targets with conditional execution or targets\n\ +with big register files as it hurts if-conversion and cross-jumping\n\ +optimizations.\n\ +\n\ +The default version of this target hook returns always false.", bool, (void), default_register_usage_leveling_p) /* Return true if maximal address displacement can be different. */ DEFHOOK (different_addr_displacement_p, - "A target hook which returns true if an address with the same structure\ - can have different maximal legitimate displacement. For example, the\ - displacement can depend on memory mode or on operand combinations in\ - the insn.\ - \ - The default version of this target hook returns always false.", + "A target hook which returns true if an address with the same structure\n\ +can have different maximal legitimate displacement. For example, the\n\ +displacement can depend on memory mode or on operand combinations in\n\ +the insn.\n\ +\n\ +The default version of this target hook returns always false.", bool, (void), default_different_addr_displacement_p) @@ -5530,32 +5533,32 @@ DEFHOOK instead of memory. */ DEFHOOK (spill_class, - "This hook defines a class of registers which could be used for spilling\ - pseudos of the given mode and class, or @code{NO_REGS} if only memory\ - should be used. Not defining this hook is equivalent to returning\ - @code{NO_REGS} for all inputs.", + "This hook defines a class of registers which could be used for spilling\n\ +pseudos of the given mode and class, or @code{NO_REGS} if only memory\n\ +should be used. Not defining this hook is equivalent to returning\n\ +@code{NO_REGS} for all inputs.", reg_class_t, (reg_class_t, machine_mode), NULL) /* Determine an additional allocno class. */ DEFHOOK (additional_allocno_class_p, - "This hook should return @code{true} if given class of registers should\ - be an allocno class in any way. Usually RA uses only one register\ - class from all classes containing the same register set. In some\ - complicated cases, you need to have two or more such classes as\ - allocno ones for RA correct work. Not defining this hook is\ - equivalent to returning @code{false} for all inputs.", + "This hook should return @code{true} if given class of registers should\n\ +be an allocno class in any way. Usually RA uses only one register\n\ +class from all classes containing the same register set. In some\n\ +complicated cases, you need to have two or more such classes as\n\ +allocno ones for RA correct work. Not defining this hook is\n\ +equivalent to returning @code{false} for all inputs.", bool, (reg_class_t), hook_bool_reg_class_t_false) DEFHOOK (cstore_mode, - "This hook defines the machine mode to use for the boolean result of\ - conditional store patterns. The ICODE argument is the instruction code\ - for the cstore being performed. Not definiting this hook is the same\ - as accepting the mode encoded into operand 0 of the cstore expander\ - patterns.", + "This hook defines the machine mode to use for the boolean result of\n\ +conditional store patterns. The ICODE argument is the instruction code\n\ +for the cstore being performed. Not definiting this hook is the same\n\ +as accepting the mode encoded into operand 0 of the cstore expander\n\ +patterns.", scalar_int_mode, (enum insn_code icode), default_cstore_mode) @@ -5563,10 +5566,10 @@ DEFHOOK classes to use. */ DEFHOOK (compute_pressure_classes, - "A target hook which lets a backend compute the set of pressure classes to\ - be used by those optimization passes which take register pressure into\ - account, as opposed to letting IRA compute them. It returns the number of\ - register classes stored in the array @var{pressure_classes}.", + "A target hook which lets a backend compute the set of pressure classes to\n\ +be used by those optimization passes which take register pressure into\n\ +account, as opposed to letting IRA compute them. It returns the number of\n\ +register classes stored in the array @var{pressure_classes}.", int, (enum reg_class *pressure_classes), NULL) /* True if a structure, union or array with MODE containing FIELD should @@ -5590,7 +5593,7 @@ Normally, this is not needed.", DEFHOOK (expand_divmod_libfunc, "Define this hook for enabling divmod transform if the port does not have\n\ -hardware divmod insn but defines target-specific divmod libfuncs.", +hardware divmod insn but defines target-specific divmod libfuncs.", void, (rtx libfunc, machine_mode mode, rtx op0, rtx op1, rtx *quot, rtx *rem), NULL) @@ -5830,16 +5833,16 @@ in words.", DEFHOOK (preferred_rename_class, - "A target hook that places additional preference on the register\ - class to use when it is necessary to rename a register in class\ - @var{rclass} to another class, or perhaps @var{NO_REGS}, if no\ - preferred register class is found or hook @code{preferred_rename_class}\ - is not implemented.\ - Sometimes returning a more restrictive class makes better code. For\ - example, on ARM, thumb-2 instructions using @code{LO_REGS} may be\ - smaller than instructions using @code{GENERIC_REGS}. By returning\ - @code{LO_REGS} from @code{preferred_rename_class}, code size can\ - be reduced.", + "A target hook that places additional preference on the register\n\ +class to use when it is necessary to rename a register in class\n\ +@var{rclass} to another class, or perhaps @var{NO_REGS}, if no\n\ +preferred register class is found or hook @code{preferred_rename_class}\n\ +is not implemented.\n\ +Sometimes returning a more restrictive class makes better code. For\n\ +example, on ARM, thumb-2 instructions using @code{LO_REGS} may be\n\ +smaller than instructions using @code{GENERIC_REGS}. By returning\n\ +@code{LO_REGS} from @code{preferred_rename_class}, code size can\n\ +be reduced.", reg_class_t, (reg_class_t rclass), default_preferred_rename_class) @@ -6145,11 +6148,11 @@ these registers when the target switches are opposed to them.)", DEFHOOK (stack_clash_protection_alloca_probe_range, "Some targets have an ABI defined interval for which no probing needs to be done.\n\ -When a probe does need to be done this same interval is used as the probe distance \ +When a probe does need to be done this same interval is used as the probe distance\n\ up when doing stack clash protection for alloca.\n\ On such targets this value can be set to override the default probing up interval.\n\ -Define this variable to return nonzero if such a probe range is required or zero otherwise. \ -Defining this hook also requires your functions which make use of alloca to have at least 8 byes\ +Define this variable to return nonzero if such a probe range is required or zero otherwise.\n\ +Defining this hook also requires your functions which make use of alloca to have at least 8 byes\n\ of outgoing arguments. If this is not the case the stack will be corrupted.\n\ You need not define this macro if it would always have the value zero.", HOST_WIDE_INT, (void), @@ -6171,22 +6174,22 @@ DEFHOOK_UNDOC DEFHOOK (excess_precision, - "Return a value, with the same meaning as the C99 macro\ - @code{FLT_EVAL_METHOD} that describes which excess precision should be\ - applied. @var{type} is either @code{EXCESS_PRECISION_TYPE_IMPLICIT},\ - @code{EXCESS_PRECISION_TYPE_FAST}, or\ - @code{EXCESS_PRECISION_TYPE_STANDARD}. For\ - @code{EXCESS_PRECISION_TYPE_IMPLICIT}, the target should return which\ - precision and range operations will be implictly evaluated in regardless\ - of the excess precision explicitly added. For\ - @code{EXCESS_PRECISION_TYPE_STANDARD} and\ - @code{EXCESS_PRECISION_TYPE_FAST}, the target should return the\ - explicit excess precision that should be added depending on the\ - value set for @option{-fexcess-precision=@r{[}standard@r{|}fast@r{]}}.\ - Note that unpredictable explicit excess precision does not make sense,\ - so a target should never return @code{FLT_EVAL_METHOD_UNPREDICTABLE}\ - when @var{type} is @code{EXCESS_PRECISION_TYPE_STANDARD} or\ - @code{EXCESS_PRECISION_TYPE_FAST}.", + "Return a value, with the same meaning as the C99 macro\n\ +@code{FLT_EVAL_METHOD} that describes which excess precision should be\n\ +applied. @var{type} is either @code{EXCESS_PRECISION_TYPE_IMPLICIT},\n\ +@code{EXCESS_PRECISION_TYPE_FAST}, or\n\ +@code{EXCESS_PRECISION_TYPE_STANDARD}. For\n\ +@code{EXCESS_PRECISION_TYPE_IMPLICIT}, the target should return which\n\ +precision and range operations will be implictly evaluated in regardless\n\ +of the excess precision explicitly added. For\n\ +@code{EXCESS_PRECISION_TYPE_STANDARD} and\n\ +@code{EXCESS_PRECISION_TYPE_FAST}, the target should return the\n\ +explicit excess precision that should be added depending on the\n\ +value set for @option{-fexcess-precision=@r{[}standard@r{|}fast@r{]}}.\n\ +Note that unpredictable explicit excess precision does not make sense,\n\ +so a target should never return @code{FLT_EVAL_METHOD_UNPREDICTABLE}\n\ +when @var{type} is @code{EXCESS_PRECISION_TYPE_STANDARD} or\n\ +@code{EXCESS_PRECISION_TYPE_FAST}.", enum flt_eval_method, (enum excess_precision_type type), default_excess_precision) @@ -6272,12 +6275,12 @@ method. The default is to return @code{true}.", DEFHOOK (determine_class_data_visibility, -"@var{decl} is a virtual table, virtual table table, typeinfo object,\ - or other similar implicit class data object that will be emitted with\ - external linkage in this translation unit. No ELF visibility has been\ - explicitly specified. If the target needs to specify a visibility\ - other than that of the containing class, use this hook to set\ - @code{DECL_VISIBILITY} and @code{DECL_VISIBILITY_SPECIFIED}.", +"@var{decl} is a virtual table, virtual table table, typeinfo object,\n\ +or other similar implicit class data object that will be emitted with\n\ +external linkage in this translation unit. No ELF visibility has been\n\ +explicitly specified. If the target needs to specify a visibility\n\ +other than that of the containing class, use this hook to set\n\ +@code{DECL_VISIBILITY} and @code{DECL_VISIBILITY_SPECIFIED}.", void, (tree decl), hook_void_tree) @@ -6331,9 +6334,9 @@ unloaded. The default is to return false.", DEFHOOK (adjust_class_at_definition, -"@var{type} is a C++ class (i.e., RECORD_TYPE or UNION_TYPE) that has just\ - been defined. Use this hook to make adjustments to the class (eg, tweak\ - visibility or perform any other required target modifications).", +"@var{type} is a C++ class (i.e., RECORD_TYPE or UNION_TYPE) that has just\n\ +been defined. Use this hook to make adjustments to the class (eg, tweak\n\ +visibility or perform any other required target modifications).", void, (tree type), hook_void_tree) @@ -6551,7 +6554,9 @@ specific target options and the caller does not use the same options.", DEFHOOK (relayout_function, -"This target hook fixes function @var{fndecl} after attributes are processed. Default does nothing. On ARM, the default function's alignment is updated with the attribute target.", +"This target hook fixes function @var{fndecl} after attributes are processed.\n\ +Default does nothing. On ARM, the default function's alignment is updated\n\ +with the attribute target.", void, (tree fndecl), hook_void_tree) @@ -6590,8 +6595,8 @@ is to enable the fipa-ra optimization.", /* Fill in additional registers set up by prologue into a regset. */ DEFHOOK (set_up_by_prologue, - "This hook should add additional registers that are computed by the prologue\ - to the hard regset for shrink-wrapping optimization purposes.", + "This hook should add additional registers that are computed by the prologue\n\ +to the hard regset for shrink-wrapping optimization purposes.", void, (struct hard_reg_set_container *), NULL) @@ -6600,7 +6605,9 @@ DEFHOOK function attribute. */ DEFHOOK (warn_func_return, - "True if a function's return statements should be checked for matching the function's return type. This includes checking for falling off the end of a non-void function. Return false if no such check should be made.", + "True if a function's return statements should be checked for matching\n\ +the function's return type. This includes checking for falling off the end\n\ +of a non-void function. Return false if no such check should be made.", bool, (tree), hook_bool_tree_true) @@ -6678,8 +6685,8 @@ This will suppress generation of the normal debug frame unwind information.", default_debug_unwind_info) DEFHOOK -(reset_location_view, "\ -This hook, if defined, enables -ginternal-reset-location-views, and\n\ +(reset_location_view, + "This hook, if defined, enables -ginternal-reset-location-views, and\n\ uses its result to override cases in which the estimated min insn\n\ length might be nonzero even when a PC advance (i.e., a view reset)\n\ cannot be taken for granted.\n\ @@ -6740,9 +6747,9 @@ defined to 1.", DEFHOOKPOD (atomic_test_and_set_trueval, - "This value should be set if the result written by\ - @code{atomic_test_and_set} is not exactly 1, i.e.@: the\ - @code{bool} @code{true}.", + "This value should be set if the result written by\n\ +@code{atomic_test_and_set} is not exactly 1, i.e.@: the\n\ +@code{bool} @code{true}.", unsigned char, 1) /* Return an unsigned int representing the alignment (in bits) of the atomic @@ -6750,29 +6757,29 @@ DEFHOOKPOD as needed. */ DEFHOOK (atomic_align_for_mode, -"If defined, this function returns an appropriate alignment in bits for an\ - atomic object of machine_mode @var{mode}. If 0 is returned then the\ - default alignment for the specified mode is used. ", +"If defined, this function returns an appropriate alignment in bits for an\n\ +atomic object of machine_mode @var{mode}. If 0 is returned then the\n\ +default alignment for the specified mode is used.", unsigned int, (machine_mode mode), hook_uint_mode_0) DEFHOOK (atomic_assign_expand_fenv, -"ISO C11 requires atomic compound assignments that may raise floating-point\ - exceptions to raise exceptions corresponding to the arithmetic operation\ - whose result was successfully stored in a compare-and-exchange sequence. \ - This requires code equivalent to calls to @code{feholdexcept},\ - @code{feclearexcept} and @code{feupdateenv} to be generated at\ - appropriate points in the compare-and-exchange sequence. This hook should\ - set @code{*@var{hold}} to an expression equivalent to the call to\ - @code{feholdexcept}, @code{*@var{clear}} to an expression equivalent to\ - the call to @code{feclearexcept} and @code{*@var{update}} to an expression\ - equivalent to the call to @code{feupdateenv}. The three expressions are\ - @code{NULL_TREE} on entry to the hook and may be left as @code{NULL_TREE}\ - if no code is required in a particular place. The default implementation\ - leaves all three expressions as @code{NULL_TREE}. The\ - @code{__atomic_feraiseexcept} function from @code{libatomic} may be of use\ - as part of the code generated in @code{*@var{update}}.", +"ISO C11 requires atomic compound assignments that may raise floating-point\n\ +exceptions to raise exceptions corresponding to the arithmetic operation\n\ +whose result was successfully stored in a compare-and-exchange sequence.\n\ +This requires code equivalent to calls to @code{feholdexcept},\n\ +@code{feclearexcept} and @code{feupdateenv} to be generated at\n\ +appropriate points in the compare-and-exchange sequence. This hook should\n\ +set @code{*@var{hold}} to an expression equivalent to the call to\n\ +@code{feholdexcept}, @code{*@var{clear}} to an expression equivalent to\n\ +the call to @code{feclearexcept} and @code{*@var{update}} to an expression\n\ +equivalent to the call to @code{feupdateenv}. The three expressions are\n\ +@code{NULL_TREE} on entry to the hook and may be left as @code{NULL_TREE}\n\ +if no code is required in a particular place. The default implementation\n\ +leaves all three expressions as @code{NULL_TREE}. The\n\ +@code{__atomic_feraiseexcept} function from @code{libatomic} may be of use\n\ +as part of the code generated in @code{*@var{update}}.", void, (tree *hold, tree *clear, tree *update), default_atomic_assign_expand_fenv) @@ -6857,23 +6864,26 @@ running a cleanup. The default is @code{false}.", DEFHOOKPOD (want_debug_pub_sections, - "True if the @code{.debug_pubtypes} and @code{.debug_pubnames} sections\ - should be emitted. These sections are not used on most platforms, and\ - in particular GDB does not use them.", + "True if the @code{.debug_pubtypes} and @code{.debug_pubnames} sections\n\ +should be emitted. These sections are not used on most platforms, and\n\ +in particular GDB does not use them.", bool, false) DEFHOOKPOD -(delay_sched2, "True if sched2 is not to be run at its normal place.\n\ +(delay_sched2, + "True if sched2 is not to be run at its normal place.\n\ This usually means it will be run as part of machine-specific reorg.", bool, false) DEFHOOKPOD -(delay_vartrack, "True if vartrack is not to be run at its normal place.\n\ +(delay_vartrack, + "True if vartrack is not to be run at its normal place.\n\ This usually means it will be run as part of machine-specific reorg.", bool, false) DEFHOOKPOD -(no_register_allocation, "True if register allocation and the passes\n\ +(no_register_allocation, + "True if register allocation and the passes\n\ following it should not be run. Usually true only for virtual assembler\n\ targets.", bool, false) @@ -6887,32 +6897,57 @@ HOOK_VECTOR (TARGET_TOGGLE_, mode_switching) DEFHOOK (emit, - "Generate one or more insns to set @var{entity} to @var{mode}. @var{hard_reg_live} is the set of hard registers live at the point where the insn(s) are to be inserted. @var{prev_moxde} indicates the mode to switch from. Sets of a lower numbered entity will be emitted before sets of a higher numbered entity to a mode of the same or lower priority.", + "Generate one or more insns to set @var{entity} to @var{mode}.\n\ +@var{hard_reg_live} is the set of hard registers live at the point where\n\ +the insn(s) are to be inserted. @var{prev_moxde} indicates the mode\n\ +to switch from. Sets of a lower numbered entity will be emitted before\n\ +sets of a higher numbered entity to a mode of the same or lower priority.", void, (int entity, int mode, int prev_mode, HARD_REG_SET regs_live), NULL) DEFHOOK (needed, - "@var{entity} is an integer specifying a mode-switched entity. If @code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro to return an integer value not larger than the corresponding element in @code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity} must be switched into prior to the execution of @var{insn}.", + "@var{entity} is an integer specifying a mode-switched entity.\n\ +If @code{OPTIMIZE_MODE_SWITCHING} is defined, you must define this macro\n\ +to return an integer value not larger than the corresponding element\n\ +in @code{NUM_MODES_FOR_MODE_SWITCHING}, to denote the mode that @var{entity}\n\ +must be switched into prior to the execution of @var{insn}.", int, (int entity, rtx_insn *insn), NULL) DEFHOOK (after, - "@var{entity} is an integer specifying a mode-switched entity. If this macro is defined, it is evaluated for every @var{insn} during mode switching. It determines the mode that an insn results in (if different from the incoming mode).", + "@var{entity} is an integer specifying a mode-switched entity.\n\ +If this macro is defined, it is evaluated for every @var{insn} during mode\n\ +switching. It determines the mode that an insn results\n\ +in (if different from the incoming mode).", int, (int entity, int mode, rtx_insn *insn), NULL) DEFHOOK (entry, - "If this macro is defined, it is evaluated for every @var{entity} that needs mode switching. It should evaluate to an integer, which is a mode that @var{entity} is assumed to be switched to at function entry. If @code{TARGET_MODE_ENTRY} is defined then @code{TARGET_MODE_EXIT} must be defined.", + "If this macro is defined, it is evaluated for every @var{entity} that\n\ +needs mode switching. It should evaluate to an integer, which is a mode\n\ +that @var{entity} is assumed to be switched to at function entry.\n\ +If @code{TARGET_MODE_ENTRY} is defined then @code{TARGET_MODE_EXIT}\n\ +must be defined.", int, (int entity), NULL) DEFHOOK (exit, - "If this macro is defined, it is evaluated for every @var{entity} that needs mode switching. It should evaluate to an integer, which is a mode that @var{entity} is assumed to be switched to at function exit. If @code{TARGET_MODE_EXIT} is defined then @code{TARGET_MODE_ENTRY} must be defined.", + "If this macro is defined, it is evaluated for every @var{entity} that\n\ +needs mode switching. It should evaluate to an integer, which is a mode\n\ +that @var{entity} is assumed to be switched to at function exit.\n\ +If @code{TARGET_MODE_EXIT} is defined then @code{TARGET_MODE_ENTRY}\n\ +must be defined.", int, (int entity), NULL) DEFHOOK (priority, - "This macro specifies the order in which modes for @var{entity} are processed. 0 is the highest priority, @code{NUM_MODES_FOR_MODE_SWITCHING[@var{entity}] - 1} the lowest. The value of the macro should be an integer designating a mode for @var{entity}. For any fixed @var{entity}, @code{mode_priority} (@var{entity}, @var{n}) shall be a bijection in 0 @dots{} @code{num_modes_for_mode_switching[@var{entity}] - 1}.", + "This macro specifies the order in which modes for @var{entity}\n\ +are processed. 0 is the highest priority,\n\ +@code{NUM_MODES_FOR_MODE_SWITCHING[@var{entity}] - 1} the lowest.\n\ +The value of the macro should be an integer designating a mode\n\ +for @var{entity}. For any fixed @var{entity}, @code{mode_priority}\n\ +(@var{entity}, @var{n}) shall be a bijection in 0 @dots{}\n\ +@code{num_modes_for_mode_switching[@var{entity}] - 1}.", int, (int entity, int n), NULL) HOOK_VECTOR_END (mode_switching) -- cgit v1.1