From 63be21c8596ab2eee819a39a2b30c3b8b7bcf8af Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Mon, 27 May 2019 13:37:57 +0000 Subject: [testsuite,aarch64,arm] PR88440: Fix testcases 2019-05-27 Christophe Lyon PR tree-optimization/88440 gcc/testsuite/ * gcc.target/aarch64/sve/index_offset_1.c: Add -fno-tree-loop-distribute-patterns. * gcc.target/aarch64/sve/single_1.c: Likewise. * gcc.target/aarch64/sve/single_2.c: Likewise. * gcc.target/aarch64/sve/single_3.c: Likewise. * gcc.target/aarch64/sve/single_4.c: Likewise. * gcc.target/aarch64/sve/vec_init_1.c: Likewise. * gcc.target/aarch64/vect-fmovd-zero.c: Likewise. * gcc.target/aarch64/vect-fmovf-zero.c: Likewise. * gcc.target/arm/ivopts.c: Likewise. From-SVN: r271662 --- gcc/testsuite/ChangeLog | 13 +++++++++++++ gcc/testsuite/gcc.target/aarch64/sve/index_offset_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/single_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/single_2.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/single_3.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/single_4.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/vec_init_1.c | 2 +- gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c | 2 +- gcc/testsuite/gcc.target/aarch64/vect-fmovf-zero.c | 2 +- gcc/testsuite/gcc.target/arm/ivopts.c | 2 +- 10 files changed, 22 insertions(+), 9 deletions(-) (limited to 'gcc') diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index de15705..2250874 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,16 @@ +2019-05-27 Christophe Lyon + + PR tree-optimization/88440 + * gcc.target/aarch64/sve/index_offset_1.c: Add -fno-tree-loop-distribute-patterns. + * gcc.target/aarch64/sve/single_1.c: Likewise. + * gcc.target/aarch64/sve/single_2.c: Likewise. + * gcc.target/aarch64/sve/single_3.c: Likewise. + * gcc.target/aarch64/sve/single_4.c: Likewise. + * gcc.target/aarch64/sve/vec_init_1.c: Likewise. + * gcc.target/aarch64/vect-fmovd-zero.c: Likewise. + * gcc.target/aarch64/vect-fmovf-zero.c: Likewise. + * gcc.target/arm/ivopts.c: Likewise. + 2019-05-27 Richard Biener PR tree-optimization/90637 diff --git a/gcc/testsuite/gcc.target/aarch64/sve/index_offset_1.c b/gcc/testsuite/gcc.target/aarch64/sve/index_offset_1.c index 31d46aa..a26be32 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/index_offset_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/index_offset_1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=256" } */ +/* { dg-options "-O2 -ftree-vectorize -msve-vector-bits=256 -fno-tree-loop-distribute-patterns" } */ #define SIZE (15 * 8 + 3) diff --git a/gcc/testsuite/gcc.target/aarch64/sve/single_1.c b/gcc/testsuite/gcc.target/aarch64/sve/single_1.c index 11b88ae..e3a8409 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/single_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/single_1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fopenmp-simd -msve-vector-bits=256" } */ +/* { dg-options "-O2 -ftree-vectorize -fopenmp-simd -msve-vector-bits=256 -fno-tree-loop-distribute-patterns" } */ #ifndef N #define N 32 diff --git a/gcc/testsuite/gcc.target/aarch64/sve/single_2.c b/gcc/testsuite/gcc.target/aarch64/sve/single_2.c index 1fbf489..195ee20 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/single_2.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/single_2.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fopenmp-simd -msve-vector-bits=512" } */ +/* { dg-options "-O2 -ftree-vectorize -fopenmp-simd -msve-vector-bits=512 -fno-tree-loop-distribute-patterns" } */ #define N 64 #include "single_1.c" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/single_3.c b/gcc/testsuite/gcc.target/aarch64/sve/single_3.c index a3688b6..e031276 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/single_3.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/single_3.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fopenmp-simd -msve-vector-bits=1024" } */ +/* { dg-options "-O2 -ftree-vectorize -fopenmp-simd -msve-vector-bits=1024 -fno-tree-loop-distribute-patterns" } */ #define N 128 #include "single_1.c" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/single_4.c b/gcc/testsuite/gcc.target/aarch64/sve/single_4.c index 08965d3..01ff7f6 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/single_4.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/single_4.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fopenmp-simd -msve-vector-bits=2048" } */ +/* { dg-options "-O2 -ftree-vectorize -fopenmp-simd -msve-vector-bits=2048 -fno-tree-loop-distribute-patterns" } */ #define N 256 #include "single_1.c" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/vec_init_1.c b/gcc/testsuite/gcc.target/aarch64/sve/vec_init_1.c index 6042606..1624ab1 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/vec_init_1.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/vec_init_1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize" } */ +/* { dg-options "-O2 -ftree-vectorize -fno-tree-loop-distribute-patterns" } */ #include diff --git a/gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c b/gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c index c987f5f..a51aa33 100644 --- a/gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c +++ b/gcc/testsuite/gcc.target/aarch64/vect-fmovd-zero.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-vect-cost-model" } */ +/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-vect-cost-model -fno-tree-loop-distribute-patterns" } */ #pragma GCC target "+nosve" diff --git a/gcc/testsuite/gcc.target/aarch64/vect-fmovf-zero.c b/gcc/testsuite/gcc.target/aarch64/vect-fmovf-zero.c index 22a0535..8dfd26b 100644 --- a/gcc/testsuite/gcc.target/aarch64/vect-fmovf-zero.c +++ b/gcc/testsuite/gcc.target/aarch64/vect-fmovf-zero.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-vect-cost-model" } */ +/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-all -fno-vect-cost-model -fno-tree-loop-distribute-patterns" } */ #pragma GCC target "+nosve" diff --git a/gcc/testsuite/gcc.target/arm/ivopts.c b/gcc/testsuite/gcc.target/arm/ivopts.c index 2bb6cc4..5d27240 100644 --- a/gcc/testsuite/gcc.target/arm/ivopts.c +++ b/gcc/testsuite/gcc.target/arm/ivopts.c @@ -1,5 +1,5 @@ /* { dg-do assemble } */ -/* { dg-options "-Os -fdump-tree-ivopts -save-temps" } */ +/* { dg-options "-Os -fdump-tree-ivopts -save-temps -fno-tree-loop-distribute-patterns" } */ void tr5 (short array[], int n) -- cgit v1.1