From 4be3919fb75e3d2a4d2bb80ba33c14e0973bc08f Mon Sep 17 00:00:00 2001 From: "Jose E. Marchesi" Date: Mon, 24 Jul 2023 15:57:05 +0200 Subject: bpf: sdiv/smod are now part of BPF V4 We used to support signed division and signed modulus instructions in the XBPF GCC-specific extensions to BPF. However, BPF catched up by adding these instructions in the V4 of the ISA. This patch changes GCC in order to use sdiv/smod instructions when -mcpu=v4 or higher. The testsuite and the manual have been updated accordingly. Tested in bpf-unknown-none. gcc/ChangeLog PR target/110783 * config/bpf/bpf.opt: New command-line option -msdiv. * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv. * config/bpf/bpf.cc (bpf_option_override): Initialize bpf_has_sdiv. * doc/invoke.texi (eBPF Options): Document -msdiv. gcc/testsuite/ChangeLog PR target/110783 * gcc.target/bpf/xbpf-sdiv-1.c: Renamed to sdiv-1.c * gcc.target/bpf/xbpf-smod-1.c: Renamed to smod-1.c * gcc.target/bpf/sdiv-1.c: Renamed from xbpf-sdiv-1.c, use -mcpu=v4. * gcc.target/bpf/smod-1.c: Renamed from xbpf-smod-1.c, use -mcpu=v4. * gcc.target/bpf/diag-sdiv.c: Use -mcpu=v3. * gcc.target/bpf/diag-smod.c: Likewise. --- gcc/config/bpf/bpf.cc | 3 +++ gcc/config/bpf/bpf.md | 16 ++++++++-------- gcc/config/bpf/bpf.opt | 4 ++++ gcc/doc/invoke.texi | 5 +++++ gcc/testsuite/gcc.target/bpf/diag-sdiv.c | 2 +- gcc/testsuite/gcc.target/bpf/diag-smod.c | 2 +- gcc/testsuite/gcc.target/bpf/sdiv-1.c | 14 ++++++++++++++ gcc/testsuite/gcc.target/bpf/smod-1.c | 14 ++++++++++++++ gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c | 14 -------------- gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c | 14 -------------- 10 files changed, 50 insertions(+), 38 deletions(-) create mode 100644 gcc/testsuite/gcc.target/bpf/sdiv-1.c create mode 100644 gcc/testsuite/gcc.target/bpf/smod-1.c delete mode 100644 gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c delete mode 100644 gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c (limited to 'gcc') diff --git a/gcc/config/bpf/bpf.cc b/gcc/config/bpf/bpf.cc index 18d3b5f..55b6927 100644 --- a/gcc/config/bpf/bpf.cc +++ b/gcc/config/bpf/bpf.cc @@ -256,6 +256,9 @@ bpf_option_override (void) if (bpf_has_bswap == -1) bpf_has_bswap = (bpf_isa >= ISA_V4); + if (bpf_has_sdiv == -1) + bpf_has_sdiv = (bpf_isa >= ISA_V4); + /* Disable -fstack-protector as it is not supported in BPF. */ if (flag_stack_protect) { diff --git a/gcc/config/bpf/bpf.md b/gcc/config/bpf/bpf.md index 81e2268..3e2d760 100644 --- a/gcc/config/bpf/bpf.md +++ b/gcc/config/bpf/bpf.md @@ -167,8 +167,8 @@ ;;; Division -;; Note that eBPF doesn't provide instructions for signed integer -;; division. +;; Note that eBPF <= V3 doesn't provide instructions for signed +;; integer division. (define_insn "udiv3" [(set (match_operand:AM 0 "register_operand" "=r,r") @@ -178,20 +178,20 @@ "{div\t%0,%2|%w0 /= %w2}" [(set_attr "type" "")]) -;; However, xBPF does provide a signed division operator, sdiv. +;; However, BPF V4 does provide a signed division operator, sdiv. (define_insn "div3" [(set (match_operand:AM 0 "register_operand" "=r,r") (div:AM (match_operand:AM 1 "register_operand" " 0,0") (match_operand:AM 2 "reg_or_imm_operand" "r,I")))] - "TARGET_XBPF" + "bpf_has_sdiv" "{sdiv\t%0,%2|%w0 s/= %w2}" [(set_attr "type" "")]) ;;; Modulus -;; Note that eBPF doesn't provide instructions for signed integer -;; remainder. +;; Note that eBPF <= V3 doesn't provide instructions for signed +;; integer remainder. (define_insn "umod3" [(set (match_operand:AM 0 "register_operand" "=r,r") @@ -201,13 +201,13 @@ "{mod\t%0,%2|%w0 %%= %w2}" [(set_attr "type" "")]) -;; Again, xBPF provides a signed version, smod. +;; However, BPF V4 does provide a signed modulus operator, smod. (define_insn "mod3" [(set (match_operand:AM 0 "register_operand" "=r,r") (mod:AM (match_operand:AM 1 "register_operand" " 0,0") (match_operand:AM 2 "reg_or_imm_operand" "r,I")))] - "TARGET_XBPF" + "bpf_has_sdiv" "{smod\t%0,%2|%w0 s%%= %w2}" [(set_attr "type" "")]) diff --git a/gcc/config/bpf/bpf.opt b/gcc/config/bpf/bpf.opt index 3bf9033..bd35f8d 100644 --- a/gcc/config/bpf/bpf.opt +++ b/gcc/config/bpf/bpf.opt @@ -63,6 +63,10 @@ mbswap Target Var(bpf_has_bswap) Init(-1) Enable byte swap instructions. +msdiv +Target Var(bpf_has_sdiv) Init(-1) +Enable signed division and modulus instructions. + mcpu= Target RejectNegative Joined Var(bpf_isa) Enum(bpf_isa) Init(ISA_V4) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index a977a34..fa765d5 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -24711,6 +24711,11 @@ Enable 32-bit ALU instructions. Enabled for CPU v3 and above. @item -mbswap Enable byte swap instructions. Enabled for CPU v4 and above. +@opindex msdiv +@item -msdiv +Enable signed division and modulus instructions. Enabled for CPU v4 +and above. + @opindex mcpu @item -mcpu=@var{version} This specifies which version of the eBPF ISA to target. Newer versions diff --git a/gcc/testsuite/gcc.target/bpf/diag-sdiv.c b/gcc/testsuite/gcc.target/bpf/diag-sdiv.c index db0c494..c48bbf0 100644 --- a/gcc/testsuite/gcc.target/bpf/diag-sdiv.c +++ b/gcc/testsuite/gcc.target/bpf/diag-sdiv.c @@ -1,6 +1,6 @@ /* Verify signed division does not produce 'sdiv' insn in eBPF. */ /* { dg-do compile } */ -/* { dg-options "-O0" } */ +/* { dg-options "-O0 -mcpu=v3" } */ void foo () diff --git a/gcc/testsuite/gcc.target/bpf/diag-smod.c b/gcc/testsuite/gcc.target/bpf/diag-smod.c index 20234ee..d3df308 100644 --- a/gcc/testsuite/gcc.target/bpf/diag-smod.c +++ b/gcc/testsuite/gcc.target/bpf/diag-smod.c @@ -1,6 +1,6 @@ /* Verify signed modulo does not produce 'smod' insn in eBPF. */ /* { dg-do compile } */ -/* { dg-options "-O0" } */ +/* { dg-options "-O0 -mcpu=v3" } */ void foo () diff --git a/gcc/testsuite/gcc.target/bpf/sdiv-1.c b/gcc/testsuite/gcc.target/bpf/sdiv-1.c new file mode 100644 index 0000000..ad75b04 --- /dev/null +++ b/gcc/testsuite/gcc.target/bpf/sdiv-1.c @@ -0,0 +1,14 @@ +/* Verify that sdiv instruction is used for xBPF. */ +/* { dg-do compile } */ +/* { dg-options "-O0 -mcpu=v4" } */ + +void +foo () +{ + signed int x = 5; + signed int y = 2; + signed int z = x / y; + signed int w = x / 3; +} + +/* { dg-final { scan-assembler "sdiv(32)?\t%r" } } */ diff --git a/gcc/testsuite/gcc.target/bpf/smod-1.c b/gcc/testsuite/gcc.target/bpf/smod-1.c new file mode 100644 index 0000000..c5fc6f7 --- /dev/null +++ b/gcc/testsuite/gcc.target/bpf/smod-1.c @@ -0,0 +1,14 @@ +/* Verify that smod instruction is used for xBPF. */ +/* { dg-do compile } */ +/* { dg-options "-O0 -mcpu=v4" } */ + +void +foo () +{ + signed int x = 5; + signed int y = 2; + signed int z = x % y; + signed int w = x % 3; +} + +/* { dg-final { scan-assembler "smod(32)?\t%r" } } */ diff --git a/gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c b/gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c deleted file mode 100644 index f6c5c9e..0000000 --- a/gcc/testsuite/gcc.target/bpf/xbpf-sdiv-1.c +++ /dev/null @@ -1,14 +0,0 @@ -/* Verify that sdiv instruction is used for xBPF. */ -/* { dg-do compile } */ -/* { dg-options "-O0 -mxbpf" } */ - -void -foo () -{ - signed int x = 5; - signed int y = 2; - signed int z = x / y; - signed int w = x / 3; -} - -/* { dg-final { scan-assembler "sdiv(32)?\t%r" } } */ diff --git a/gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c b/gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c deleted file mode 100644 index b3e5816..0000000 --- a/gcc/testsuite/gcc.target/bpf/xbpf-smod-1.c +++ /dev/null @@ -1,14 +0,0 @@ -/* Verify that smod instruction is used for xBPF. */ -/* { dg-do compile } */ -/* { dg-options "-O0 -mxbpf" } */ - -void -foo () -{ - signed int x = 5; - signed int y = 2; - signed int z = x % y; - signed int w = x % 3; -} - -/* { dg-final { scan-assembler "smod(32)?\t%r" } } */ -- cgit v1.1