From 461d34fc92a857834dae45cc52aa002ffd33f82d Mon Sep 17 00:00:00 2001 From: Andrew Stubbs Date: Wed, 22 Nov 2023 13:46:12 +0000 Subject: amdgcn: Fix vector TImode reload loop I've only observed the problem on the devel/omp/gcc-13 branch, but this could theoretically affect mainline also. The mov insns for the other modes already have '$', so this completes the set. gcc/ChangeLog: * config/gcn/gcn-valu.md (*mov_4reg): Disparage AVGPR use when a reload is required. (cherry picked from commit ecb22ddbe2b676484d04e7979f7991f7eec93470) --- gcc/ChangeLog.omp | 8 ++++++++ gcc/config/gcn/gcn-valu.md | 8 ++++---- 2 files changed, 12 insertions(+), 4 deletions(-) (limited to 'gcc') diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp index a4ff7f9..2a221c8 100644 --- a/gcc/ChangeLog.omp +++ b/gcc/ChangeLog.omp @@ -3,6 +3,14 @@ Backport from mainline: Andrew Stubbs + * config/gcn/gcn-valu.md (*mov_4reg): Disparage AVGPR use when a + reload is required. + +2023-11-28 Andrew Stubbs + + Backport from mainline: + Andrew Stubbs + * config/gcn/constraints.md: Add "a" AVGPR constraint. * config/gcn/gcn-valu.md (*mov): Add AVGPR alternatives. (*mov_4reg): Likewise. diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 9749be1..a9b6aa6 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -566,10 +566,10 @@ (match_operand:V_4REG 1 "general_operand"))] "" {@ [cons: =0, 1; attrs: type, length, gcn_version] - [v,vDB;vmult,16,* ] v_mov_b32\t%L0, %L1\; v_mov_b32\t%H0, %H1\; v_mov_b32\t%J0, %J1\; v_mov_b32\t%K0, %K1 - [v,a ;vmult,32,* ] v_accvgpr_read_b32\t%L0, %L1\; v_accvgpr_read_b32\t%H0, %H1\; v_accvgpr_read_b32\t%J0, %J1\; v_accvgpr_read_b32\t%K0, %K1 - [a,v ;vmult,32,* ] v_accvgpr_write_b32\t%L0, %L1\;v_accvgpr_write_b32\t%H0, %H1\;v_accvgpr_write_b32\t%J0, %J1\;v_accvgpr_write_b32\t%K0, %K1 - [a,a ;vmult,32,cdna2] v_accvgpr_mov_b32\t%L0, %L1\; v_accvgpr_mov_b32\t%H0, %H1\; v_accvgpr_mov_b32\t%J0, %J1\; v_accvgpr_mov_b32\t%K0, %K1 + [v ,vDB;vmult,16,* ] v_mov_b32\t%L0, %L1\; v_mov_b32\t%H0, %H1\; v_mov_b32\t%J0, %J1\; v_mov_b32\t%K0, %K1 + [v ,a ;vmult,32,* ] v_accvgpr_read_b32\t%L0, %L1\; v_accvgpr_read_b32\t%H0, %H1\; v_accvgpr_read_b32\t%J0, %J1\; v_accvgpr_read_b32\t%K0, %K1 + [$a,v ;vmult,32,* ] v_accvgpr_write_b32\t%L0, %L1\;v_accvgpr_write_b32\t%H0, %H1\;v_accvgpr_write_b32\t%J0, %J1\;v_accvgpr_write_b32\t%K0, %K1 + [a ,a ;vmult,32,cdna2] v_accvgpr_mov_b32\t%L0, %L1\; v_accvgpr_mov_b32\t%H0, %H1\; v_accvgpr_mov_b32\t%J0, %J1\; v_accvgpr_mov_b32\t%K0, %K1 }) (define_insn "mov_exec" -- cgit v1.1