From 429ec7dc9b70e5eebcdd7abf328e90c76b4a55bc Mon Sep 17 00:00:00 2001 From: David Edelsohn Date: Thu, 6 Jul 2006 18:59:58 +0000 Subject: re PR target/28150 (ICE in reload_cse_simplify_operands, at postreload.c:394) 2006-07-06 David Edelsohn PR target/28150 * config/rs6000/rs6000.c (rs6000_legitimate_address): Do not allow PRE_{INC,DEC} of TFmode. 2006-07-06 David Edelsohn Alan Modra PR target/28170 * config/rs6000/rs6000.c (insvdi_rshift_rlwimi_p): Correct shiftop bounds. Simplify. Co-Authored-By: Alan Modra From-SVN: r115229 --- gcc/ChangeLog | 13 +++++++++++++ gcc/config/rs6000/rs6000.c | 13 +++++++------ 2 files changed, 20 insertions(+), 6 deletions(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 53b44a7..c296175 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2006-07-06 David Edelsohn + + PR target/28150 + * config/rs6000/rs6000.c (rs6000_legitimate_address): Do not allow + PRE_{INC,DEC} of TFmode. + +2006-07-06 David Edelsohn + Alan Modra + + PR target/28170 + * config/rs6000/rs6000.c (insvdi_rshift_rlwimi_p): Correct shiftop + bounds. Simplify. + 2006-07-06 Rainer Orth PR target/28285 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index a212611..c42bb9f 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -3522,6 +3522,7 @@ rs6000_legitimate_address (enum machine_mode mode, rtx x, int reg_ok_strict) if ((GET_CODE (x) == PRE_INC || GET_CODE (x) == PRE_DEC) && !ALTIVEC_VECTOR_MODE (mode) && !SPE_VECTOR_MODE (mode) + && mode != TFmode /* Restrict addressing for DI because of our SUBREG hackery. */ && !(TARGET_E500_DOUBLE && (mode == DFmode || mode == DImode)) && TARGET_UPDATE @@ -9799,12 +9800,12 @@ effects of instruction do not correspond to semantics of RTL insn. */ int insvdi_rshift_rlwimi_p (rtx sizeop, rtx startop, rtx shiftop) { - if (INTVAL (startop) < 64 - && INTVAL (startop) > 32 - && (INTVAL (sizeop) + INTVAL (startop) < 64) - && (INTVAL (sizeop) + INTVAL (startop) > 33) - && (INTVAL (sizeop) + INTVAL (startop) + INTVAL (shiftop) < 96) - && (INTVAL (sizeop) + INTVAL (startop) + INTVAL (shiftop) >= 64) + if (INTVAL (startop) > 32 + && INTVAL (startop) < 64 + && INTVAL (sizeop) > 1 + && INTVAL (sizeop) + INTVAL (startop) < 64 + && INTVAL (shiftop) > 0 + && INTVAL (sizeop) + INTVAL (shiftop) < 32 && (64 - (INTVAL (shiftop) & 63)) >= INTVAL (sizeop)) return 1; -- cgit v1.1