From 360c8cad6a727d5afd43017ca1ce9a84c6db61c5 Mon Sep 17 00:00:00 2001 From: Edwin Lu Date: Tue, 12 Sep 2023 09:31:40 -0700 Subject: RISC-V: Finish Typing Un-Typed Instructions and Turn on Assert Updates autovec instruction that was added after last patch and turns on the assert statement to ensure all new instructions have a type. * config/riscv/autovec-opt.md: Update type * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert Reviewed-by: Jeff Law Signed-off-by: Edwin Lu --- gcc/config/riscv/autovec-opt.md | 3 ++- gcc/config/riscv/riscv.cc | 2 -- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'gcc') diff --git a/gcc/config/riscv/autovec-opt.md b/gcc/config/riscv/autovec-opt.md index 58e8004..f1d058c 100644 --- a/gcc/config/riscv/autovec-opt.md +++ b/gcc/config/riscv/autovec-opt.md @@ -649,7 +649,8 @@ gen_int_mode (GET_MODE_NUNITS (mode), Pmode)}; riscv_vector::expand_cond_len_unop (icode, ops); DONE; -}) +} +[(set_attr "type" "vector")]) ;; Combine vlmax neg and UNSPEC_VCOPYSIGN (define_insn_and_split "*copysign_neg" diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index 0ecda79..9d04ddd 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -7721,11 +7721,9 @@ riscv_sched_variable_issue (FILE *, int, rtx_insn *insn, int more) if (get_attr_type (insn) == TYPE_GHOST) return 0; -#if 0 /* If we ever encounter an insn with an unknown type, trip an assert so we can find and fix this problem. */ gcc_assert (get_attr_type (insn) != TYPE_UNKNOWN); -#endif return more - 1; } -- cgit v1.1