From 2fab365eb958c699ff3cc4952924a456cc01d79c Mon Sep 17 00:00:00 2001 From: Paolo Bonzini Date: Thu, 21 Jul 2005 07:30:00 +0000 Subject: re PR target/22085 (error with -fpreprocessed) gcc: 2005-07-21 Paolo Bonzini PR target/22085 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Do not initialize targetm.resolve_overloaded_builtin here. (altivec_expand_overloaded_builtin): Make it non-static. * config/rs6000/rs6000-protos.h (altivec_expand_overloaded_builtin): New prototype. * config/rs6000/rs6000.h (REGISTER_TARGET_PRAGMAS): Initialize targetm.resolve_overloaded_builtin here. * config/rs6000/darwin.h (REGISTER_TARGET_PRAGMAS): Likewise. testsuite: 2005-07-21 Paolo Bonzini PR target/22085 * gcc.dg/altivec-pr22085.c: New. From-SVN: r102226 --- gcc/ChangeLog | 12 ++++++++++++ gcc/config/rs6000/darwin.h | 8 +++++++- gcc/config/rs6000/rs6000-c.c | 6 +----- gcc/config/rs6000/rs6000-protos.h | 1 + gcc/config/rs6000/rs6000.h | 1 + gcc/testsuite/ChangeLog | 6 ++++++ gcc/testsuite/gcc.dg/altivec-pr22085.c | 12 ++++++++++++ 7 files changed, 40 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/altivec-pr22085.c (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2777cbd..3be68a7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,16 @@ 2005-07-21 Paolo Bonzini + + PR target/22085 + * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Do not + initialize targetm.resolve_overloaded_builtin here. + (altivec_expand_overloaded_builtin): Make it non-static. + * config/rs6000/rs6000-protos.h + (altivec_expand_overloaded_builtin): New prototype. + * config/rs6000/rs6000.h (REGISTER_TARGET_PRAGMAS): Initialize + targetm.resolve_overloaded_builtin here. + * config/rs6000/darwin.h (REGISTER_TARGET_PRAGMAS): Likewise. + +2005-07-21 Paolo Bonzini Zdenek Dvorak PR tree-optimization/19210 diff --git a/gcc/config/rs6000/darwin.h b/gcc/config/rs6000/darwin.h index 6086445..482c6e7 100644 --- a/gcc/config/rs6000/darwin.h +++ b/gcc/config/rs6000/darwin.h @@ -383,7 +383,13 @@ do { \ #define BOOL_TYPE_SIZE (darwin_one_byte_bool ? CHAR_TYPE_SIZE : INT_TYPE_SIZE) #undef REGISTER_TARGET_PRAGMAS -#define REGISTER_TARGET_PRAGMAS DARWIN_REGISTER_TARGET_PRAGMAS +#define REGISTER_TARGET_PRAGMAS() \ + do \ + { \ + DARWIN_REGISTER_TARGET_PRAGMAS(); \ + targetm.resolve_overloaded_builtin = altivec_resolve_overloaded_builtin; \ + } \ + while (0) /* Just like config/darwin.h's REAL_LIBGCC_SPEC, but use -lgcc_s_ppc64 for -m64. */ diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index c125c78..bfe542f 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -38,8 +38,6 @@ -static tree altivec_resolve_overloaded_builtin (tree, tree); - /* Handle the machine specific pragma longcall. Its syntax is # pragma longcall ( TOGGLE ) @@ -143,8 +141,6 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile) /* Let the compiled code know if 'f' class registers will not be available. */ if (TARGET_SOFT_FLOAT || !TARGET_FPRS) builtin_define ("__NO_FPRS__"); - - targetm.resolve_overloaded_builtin = altivec_resolve_overloaded_builtin; } @@ -2470,7 +2466,7 @@ altivec_build_resolved_builtin (tree *args, int n, /* Implementation of the resolve_overloaded_builtin target hook, to support Altivec's overloaded builtins. */ -static tree +tree altivec_resolve_overloaded_builtin (tree fndecl, tree arglist) { unsigned int fcode = DECL_FUNCTION_CODE (fndecl); diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 14dd8e6..2103e60 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -115,6 +115,7 @@ extern void function_arg_advance (CUMULATIVE_ARGS *, enum machine_mode, tree, int, int); extern int function_arg_boundary (enum machine_mode, tree); extern rtx function_arg (CUMULATIVE_ARGS *, enum machine_mode, tree, int); +extern tree altivec_resolve_overloaded_builtin (tree, tree); extern rtx rs6000_function_value (tree, tree); extern rtx rs6000_libcall_value (enum machine_mode); extern rtx rs6000_va_arg (tree, tree); diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 269d5bb0..b5e1286 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -339,6 +339,7 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops; /* Target pragma. */ #define REGISTER_TARGET_PRAGMAS() do { \ c_register_pragma (0, "longcall", rs6000_pragma_longcall); \ + targetm.resolve_overloaded_builtin = altivec_resolve_overloaded_builtin; \ } while (0) /* Target #defines. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 7e4f35b..d9e4ab8 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,11 @@ 2005-07-21 Paolo Bonzini + PR target/22085 + * gcc.dg/altivec-pr22085.c: New. + +2005-07-21 Paolo Bonzini + + PR tree-optimization/19210 * gcc.dg/tree-ssa/pr19210-1.c: New. * gcc.dg/tree-ssa/pr19210-2.c: New. diff --git a/gcc/testsuite/gcc.dg/altivec-pr22085.c b/gcc/testsuite/gcc.dg/altivec-pr22085.c new file mode 100644 index 0000000..5f0b5df --- /dev/null +++ b/gcc/testsuite/gcc.dg/altivec-pr22085.c @@ -0,0 +1,12 @@ +/* { dg-do compile { target powerpc*-*-* } } */ +/* { dg-options "-maltivec -fpreprocessed" } */ + +/* Program to test AltiVec with -fpreprocessed. */ +int foo(__attribute__((altivec(vector__))) float x, + __attribute__((altivec(vector__))) float y) +{ + if (__builtin_vec_vcmpeq_p (2, (x), (y))) + return 3245; + else + return 12; +} -- cgit v1.1