From 1ea45291af0bc8f7b6dff67a0f23be662b2f9908 Mon Sep 17 00:00:00 2001 From: John David Anglin Date: Fri, 8 Nov 2024 16:34:41 -0500 Subject: hppa: Fix handling of secondary reloads involving a SUBREG This is fairly subtle. When handling spills for SUBREG arguments in pa_emit_move_sequence, alter_subreg may be called. It in turn calls adjust_address_1 and change_address_1. change_address_1 calls pa_legitimate_address_p to validate the new spill address. change_address_1 generates an internal compiler error if the address is not valid. We need to allow 14-bit displacements for all modes when reload_in_progress is true and strict is false to prevent the internal compiler error. SUBREGs are only used with the general registers, so the spill should result in an integer access. 14-bit displacements are okay for integer loads and stores but not for floating-point loads and stores. Potentially, the change could break the handling of spills for the floating point-registers but I believe these are handled separately in pa_emit_move_sequence. This change fixes the build of symmetrica-3.0.1+ds. 2024-11-08 John David Anglin gcc/ChangeLog: PR target/117443 * config/pa/pa.cc (pa_legitimate_address_p): Allow any 14-bit displacement when reload is in progress and strict is false. --- gcc/config/pa/pa.cc | 1 + 1 file changed, 1 insertion(+) (limited to 'gcc') diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc index 94ee7db..941ef3a 100644 --- a/gcc/config/pa/pa.cc +++ b/gcc/config/pa/pa.cc @@ -11009,6 +11009,7 @@ pa_legitimate_address_p (machine_mode mode, rtx x, bool strict, code_helper) /* Long 14-bit displacements always okay for these cases. */ if (INT14_OK_STRICT || reload_completed + || (reload_in_progress && !strict) || mode == QImode || mode == HImode) return true; -- cgit v1.1