From 08498f81f0595eb8a90ea33afd7dab44bb76b293 Mon Sep 17 00:00:00 2001
From: Patrick O'Neill <patrick@rivosinc.com>
Date: Tue, 25 Jun 2024 14:14:16 -0700
Subject: RISC-V: Rename amo testcases

Rename riscv/amo/ testcases to follow a '{ext}-{model}-{name}-{memory order}.c'
naming convention.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/amo/amo-table-a-6-load-2.c: Move to...
	* gcc.target/riscv/amo/a-rvwmo-load-acquire.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-load-1.c: Move to...
	* gcc.target/riscv/amo/a-rvwmo-load-relaxed.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-load-3.c: Move to...
	* gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c: Move to...
	* gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-store-1.c: Move to...
	* gcc.target/riscv/amo/a-rvwmo-store-relaxed.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-store-2.c: Move to...
	* gcc.target/riscv/amo/a-rvwmo-store-release.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-load-2.c: Move to...
	* gcc.target/riscv/amo/a-ztso-load-acquire.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-load-1.c: Move to...
	* gcc.target/riscv/amo/a-ztso-load-relaxed.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-load-3.c: Move to...
	* gcc.target/riscv/amo/a-ztso-load-seq-cst.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-store-3.c: Move to...
	* gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-store-1.c: Move to...
	* gcc.target/riscv/amo/a-ztso-store-relaxed.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-store-2.c: Move to...
	* gcc.target/riscv/amo/a-ztso-store-release.c: ...here.
	* gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c: Move to...
	* gcc.target/riscv/amo/zaamo-preferred-over-zalrsc.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c: ...here.
	* gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c: Move to...
	* gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-6.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-3.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-2.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-1.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-4.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-7.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-compare-exchange-5.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c: ...here.
	* gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c: Move to...
	* gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c: ...here.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
---
 .../gcc.target/riscv/amo/a-rvwmo-load-acquire.c    | 66 ++++++++++++++++++++
 .../gcc.target/riscv/amo/a-rvwmo-load-relaxed.c    | 61 +++++++++++++++++++
 .../gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c    | 71 ++++++++++++++++++++++
 .../riscv/amo/a-rvwmo-store-compat-seq-cst.c       | 71 ++++++++++++++++++++++
 .../gcc.target/riscv/amo/a-rvwmo-store-relaxed.c   | 61 +++++++++++++++++++
 .../gcc.target/riscv/amo/a-rvwmo-store-release.c   | 66 ++++++++++++++++++++
 .../gcc.target/riscv/amo/a-ztso-load-acquire.c     | 61 +++++++++++++++++++
 .../gcc.target/riscv/amo/a-ztso-load-relaxed.c     | 61 +++++++++++++++++++
 .../gcc.target/riscv/amo/a-ztso-load-seq-cst.c     | 66 ++++++++++++++++++++
 .../riscv/amo/a-ztso-store-compat-seq-cst.c        | 66 ++++++++++++++++++++
 .../gcc.target/riscv/amo/a-ztso-store-relaxed.c    | 61 +++++++++++++++++++
 .../gcc.target/riscv/amo/a-ztso-store-release.c    | 61 +++++++++++++++++++
 .../riscv/amo/amo-table-a-6-compare-exchange-1.c   | 11 ----
 .../riscv/amo/amo-table-a-6-compare-exchange-2.c   | 11 ----
 .../riscv/amo/amo-table-a-6-compare-exchange-3.c   | 11 ----
 .../riscv/amo/amo-table-a-6-compare-exchange-4.c   | 11 ----
 .../riscv/amo/amo-table-a-6-compare-exchange-5.c   | 11 ----
 .../riscv/amo/amo-table-a-6-compare-exchange-6.c   | 12 ----
 .../riscv/amo/amo-table-a-6-compare-exchange-7.c   | 11 ----
 .../gcc.target/riscv/amo/amo-table-a-6-load-1.c    | 61 -------------------
 .../gcc.target/riscv/amo/amo-table-a-6-load-2.c    | 66 --------------------
 .../gcc.target/riscv/amo/amo-table-a-6-load-3.c    | 71 ----------------------
 .../gcc.target/riscv/amo/amo-table-a-6-store-1.c   | 61 -------------------
 .../gcc.target/riscv/amo/amo-table-a-6-store-2.c   | 66 --------------------
 .../riscv/amo/amo-table-a-6-store-compat-3.c       | 71 ----------------------
 .../riscv/amo/amo-table-a-6-subword-amo-add-1.c    | 11 ----
 .../riscv/amo/amo-table-a-6-subword-amo-add-2.c    | 11 ----
 .../riscv/amo/amo-table-a-6-subword-amo-add-3.c    | 11 ----
 .../riscv/amo/amo-table-a-6-subword-amo-add-4.c    | 11 ----
 .../riscv/amo/amo-table-a-6-subword-amo-add-5.c    | 11 ----
 .../riscv/amo/amo-table-ztso-compare-exchange-1.c  | 11 ----
 .../riscv/amo/amo-table-ztso-compare-exchange-2.c  | 11 ----
 .../riscv/amo/amo-table-ztso-compare-exchange-3.c  | 11 ----
 .../riscv/amo/amo-table-ztso-compare-exchange-4.c  | 11 ----
 .../riscv/amo/amo-table-ztso-compare-exchange-5.c  | 11 ----
 .../riscv/amo/amo-table-ztso-compare-exchange-6.c  | 11 ----
 .../riscv/amo/amo-table-ztso-compare-exchange-7.c  | 11 ----
 .../gcc.target/riscv/amo/amo-table-ztso-load-1.c   | 61 -------------------
 .../gcc.target/riscv/amo/amo-table-ztso-load-2.c   | 61 -------------------
 .../gcc.target/riscv/amo/amo-table-ztso-load-3.c   | 66 --------------------
 .../gcc.target/riscv/amo/amo-table-ztso-store-1.c  | 61 -------------------
 .../gcc.target/riscv/amo/amo-table-ztso-store-2.c  | 61 -------------------
 .../gcc.target/riscv/amo/amo-table-ztso-store-3.c  | 66 --------------------
 .../riscv/amo/amo-table-ztso-subword-amo-add-1.c   | 11 ----
 .../riscv/amo/amo-table-ztso-subword-amo-add-2.c   | 11 ----
 .../riscv/amo/amo-table-ztso-subword-amo-add-3.c   | 11 ----
 .../riscv/amo/amo-table-ztso-subword-amo-add-4.c   | 11 ----
 .../riscv/amo/amo-table-ztso-subword-amo-add-5.c   | 11 ----
 .../riscv/amo/amo-zaamo-preferred-over-zalrsc.c    | 17 ------
 .../riscv/amo/zaamo-preferred-over-zalrsc.c        | 17 ++++++
 ...sc-rvwmo-compare-exchange-int-acquire-release.c | 12 ++++
 .../zalrsc-rvwmo-compare-exchange-int-acquire.c    | 11 ++++
 .../zalrsc-rvwmo-compare-exchange-int-consume.c    | 11 ++++
 .../zalrsc-rvwmo-compare-exchange-int-relaxed.c    | 11 ++++
 .../zalrsc-rvwmo-compare-exchange-int-release.c    | 11 ++++
 ...sc-rvwmo-compare-exchange-int-seq-cst-relaxed.c | 11 ++++
 .../zalrsc-rvwmo-compare-exchange-int-seq-cst.c    | 11 ++++
 .../zalrsc-rvwmo-subword-amo-add-char-acq-rel.c    | 11 ++++
 .../zalrsc-rvwmo-subword-amo-add-char-acquire.c    | 11 ++++
 .../zalrsc-rvwmo-subword-amo-add-char-relaxed.c    | 11 ++++
 .../zalrsc-rvwmo-subword-amo-add-char-release.c    | 11 ++++
 .../zalrsc-rvwmo-subword-amo-add-char-seq-cst.c    | 11 ++++
 ...rsc-ztso-compare-exchange-int-acquire-release.c | 11 ++++
 .../amo/zalrsc-ztso-compare-exchange-int-acquire.c | 11 ++++
 .../amo/zalrsc-ztso-compare-exchange-int-consume.c | 11 ++++
 .../amo/zalrsc-ztso-compare-exchange-int-relaxed.c | 11 ++++
 .../amo/zalrsc-ztso-compare-exchange-int-release.c | 11 ++++
 ...rsc-ztso-compare-exchange-int-seq-cst-relaxed.c | 11 ++++
 .../amo/zalrsc-ztso-compare-exchange-int-seq-cst.c | 11 ++++
 .../amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c | 11 ++++
 .../amo/zalrsc-ztso-subword-amo-add-char-acquire.c | 11 ++++
 .../amo/zalrsc-ztso-subword-amo-add-char-relaxed.c | 11 ++++
 .../amo/zalrsc-ztso-subword-amo-add-char-release.c | 11 ++++
 .../amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c | 11 ++++
 74 files changed, 1054 insertions(+), 1054 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-4.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-5.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-6.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-7.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c
 delete mode 100644 gcc/testsuite/gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zaamo-preferred-over-zalrsc.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c

(limited to 'gcc')

diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c
new file mode 100644
index 0000000..f9871b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-acquire.c
@@ -0,0 +1,66 @@
+/* { dg-do compile } */
+/* Verify that load mappings match Table A.6's recommended mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_load_long_acquire:
+**	l[wd]\t[atx][0-9]+,0\(a0\)
+**	fence\tr,rw
+**	s[wd]\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_long_acquire (long* bar, long* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_load_int_acquire:
+**	lw\t[atx][0-9]+,0\(a0\)
+**	fence\tr,rw
+**	sw\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_int_acquire (int* bar, int* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_load_short_acquire:
+**	lh\t[atx][0-9]+,0\(a0\)
+**	fence\tr,rw
+**	sh\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_short_acquire (short* bar, short* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_load_char_acquire:
+**	lb\t[atx][0-9]+,0\(a0\)
+**	fence\tr,rw
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_char_acquire (char* bar, char* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_load_bool_acquire:
+**	lb\t[atx][0-9]+,0\(a0\)
+**	fence\tr,rw
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_bool_acquire (_Bool* bar, _Bool* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c
new file mode 100644
index 0000000..7b99db0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-relaxed.c
@@ -0,0 +1,61 @@
+/* { dg-do compile } */
+/* Verify that load mappings match Table A.6's recommended mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_load_long_relaxed:
+**	l[wd]\t[atx][0-9]+,0\(a0\)
+**	s[wd]\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_long_relaxed (long* bar, long* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_load_int_relaxed:
+**	lw\t[atx][0-9]+,0\(a0\)
+**	sw\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_int_relaxed (int* bar, int* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_load_short_relaxed:
+**	lh\t[atx][0-9]+,0\(a0\)
+**	sh\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_short_relaxed (short* bar, short* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_load_char_relaxed:
+**	lb\t[atx][0-9]+,0\(a0\)
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_char_relaxed (char* bar, char* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_load_bool_relaxed:
+**	lb\t[atx][0-9]+,0\(a0\)
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_bool_relaxed (_Bool* bar, _Bool* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c
new file mode 100644
index 0000000..35f196c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-load-seq-cst.c
@@ -0,0 +1,71 @@
+/* { dg-do compile } */
+/* Verify that load mappings match Table A.6's recommended mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_load_long_seq_cst:
+**	fence\trw,rw
+**	l[wd]\t[atx][0-9]+,0\(a0\)
+**	fence\tr,rw
+**	s[wd]\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_long_seq_cst (long* bar, long* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_load_int_seq_cst:
+**	fence\trw,rw
+**	lw\t[atx][0-9]+,0\(a0\)
+**	fence\tr,rw
+**	sw\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_int_seq_cst (int* bar, int* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_load_short_seq_cst:
+**	fence\trw,rw
+**	lh\t[atx][0-9]+,0\(a0\)
+**	fence\tr,rw
+**	sh\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_short_seq_cst (short* bar, short* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_load_char_seq_cst:
+**	fence\trw,rw
+**	lb\t[atx][0-9]+,0\(a0\)
+**	fence\tr,rw
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_char_seq_cst (char* bar, char* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_load_bool_seq_cst:
+**	fence\trw,rw
+**	lb\t[atx][0-9]+,0\(a0\)
+**	fence\tr,rw
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_bool_seq_cst (_Bool* bar, _Bool* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c
new file mode 100644
index 0000000..43880b9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-compat-seq-cst.c
@@ -0,0 +1,71 @@
+/* { dg-do compile } */
+/* Verify that store mapping are compatible with Table A.6 & A.7.  */
+/* { dg-options "-O3" } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_store_long_seq_cst:
+**	l[wd]\t[atx][0-9]+,0\(a1\)
+**	fence\trw,w
+**	s[wd]\t[atx][0-9]+,0\(a0\)
+**	fence\trw,rw
+**	ret
+*/
+void atomic_store_long_seq_cst (long* bar, long* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_store_int_seq_cst:
+**	lw\t[atx][0-9]+,0\(a1\)
+**	fence\trw,w
+**	sw\t[atx][0-9]+,0\(a0\)
+**	fence\trw,rw
+**	ret
+*/
+void atomic_store_int_seq_cst (int* bar, int* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_store_short_seq_cst:
+**	lhu\t[atx][0-9]+,0\(a1\)
+**	fence\trw,w
+**	sh\t[atx][0-9]+,0\(a0\)
+**	fence\trw,rw
+**	ret
+*/
+void atomic_store_short_seq_cst (short* bar, short* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_store_char_seq_cst:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	fence\trw,w
+**	sb\t[atx][0-9]+,0\(a0\)
+**	fence\trw,rw
+**	ret
+*/
+void atomic_store_char_seq_cst (char* bar, char* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_store_bool_seq_cst:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	fence\trw,w
+**	sb\t[atx][0-9]+,0\(a0\)
+**	fence\trw,rw
+**	ret
+*/
+void atomic_store_bool_seq_cst (_Bool* bar, _Bool* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c
new file mode 100644
index 0000000..eb67d19
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-relaxed.c
@@ -0,0 +1,61 @@
+/* { dg-do compile } */
+/* Verify that store mappings match Table A.6's recommended mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_store_long_relaxed:
+**	l[wd]\t[atx][0-9]+,0\(a1\)
+**	s[wd]\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_long_relaxed (long* bar, long* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_store_int_relaxed:
+**	lw\t[atx][0-9]+,0\(a1\)
+**	sw\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_int_relaxed (int* bar, int* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_store_short_relaxed:
+**	lhu\t[atx][0-9]+,0\(a1\)
+**	sh\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_short_relaxed (short* bar, short* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_store_char_relaxed:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	sb\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_char_relaxed (char* bar, char* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_store_bool_relaxed:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	sb\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_bool_relaxed (_Bool* bar, _Bool* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c
new file mode 100644
index 0000000..25a998b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-rvwmo-store-release.c
@@ -0,0 +1,66 @@
+/* { dg-do compile } */
+/* Verify that store mappings match Table A.6's recommended mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_store_long_release:
+**	l[wd]\t[atx][0-9]+,0\(a1\)
+**	fence\trw,w
+**	s[wd]\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_long_release (long* bar, long* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_store_int_release:
+**	lw\t[atx][0-9]+,0\(a1\)
+**	fence\trw,w
+**	sw\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_int_release (int* bar, int* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_store_short_release:
+**	lhu\t[atx][0-9]+,0\(a1\)
+**	fence\trw,w
+**	sh\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_short_release (short* bar, short* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_store_char_release:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	fence\trw,w
+**	sb\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_char_release (char* bar, char* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_store_bool_release:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	fence\trw,w
+**	sb\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_bool_release (_Bool* bar, _Bool* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELEASE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c
new file mode 100644
index 0000000..4e94191
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-acquire.c
@@ -0,0 +1,61 @@
+/* { dg-do compile } */
+/* Verify that load mappings match the Ztso suggested mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_load_long_acquire:
+**	l[wd]\t[atx][0-9]+,0\(a0\)
+**	s[wd]\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_long_acquire (long* bar, long* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_load_int_acquire:
+**	lw\t[atx][0-9]+,0\(a0\)
+**	sw\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_int_acquire (int* bar, int* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_load_short_acquire:
+**	lh\t[atx][0-9]+,0\(a0\)
+**	sh\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_short_acquire (short* bar, short* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_load_char_acquire:
+**	lb\t[atx][0-9]+,0\(a0\)
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_char_acquire (char* bar, char* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
+}
+
+/*
+** atomic_load_bool_acquire:
+**	lb\t[atx][0-9]+,0\(a0\)
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_bool_acquire (_Bool* bar, _Bool* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c
new file mode 100644
index 0000000..ef5dee6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-relaxed.c
@@ -0,0 +1,61 @@
+/* { dg-do compile } */
+/* Verify that load mappings match the Ztso suggested mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_load_long_relaxed:
+**	l[wd]\t[atx][0-9]+,0\(a0\)
+**	s[wd]\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_long_relaxed (long* bar, long* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_load_int_relaxed:
+**	lw\t[atx][0-9]+,0\(a0\)
+**	sw\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_int_relaxed (int* bar, int* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_load_short_relaxed:
+**	lh\t[atx][0-9]+,0\(a0\)
+**	sh\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_short_relaxed (short* bar, short* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_load_char_relaxed:
+**	lb\t[atx][0-9]+,0\(a0\)
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_char_relaxed (char* bar, char* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_load_bool_relaxed:
+**	lb\t[atx][0-9]+,0\(a0\)
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_bool_relaxed (_Bool* bar, _Bool* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c
new file mode 100644
index 0000000..93cd8bb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-load-seq-cst.c
@@ -0,0 +1,66 @@
+/* { dg-do compile } */
+/* Verify that load mappings match the Ztso suggested mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_load_long_seq_cst:
+**	fence\trw,rw
+**	l[wd]\t[atx][0-9]+,0\(a0\)
+**	s[wd]\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_long_seq_cst (long* bar, long* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_load_int_seq_cst:
+**	fence\trw,rw
+**	lw\t[atx][0-9]+,0\(a0\)
+**	sw\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_int_seq_cst (int* bar, int* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_load_short_seq_cst:
+**	fence\trw,rw
+**	lh\t[atx][0-9]+,0\(a0\)
+**	sh\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_short_seq_cst (short* bar, short* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_load_char_seq_cst:
+**	fence\trw,rw
+**	lb\t[atx][0-9]+,0\(a0\)
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_char_seq_cst (char* bar, char* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_load_bool_seq_cst:
+**	fence\trw,rw
+**	lb\t[atx][0-9]+,0\(a0\)
+**	sb\t[atx][0-9]+,0\(a1\)
+**	ret
+*/
+void atomic_load_bool_seq_cst (_Bool* bar, _Bool* baz)
+{
+  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c
new file mode 100644
index 0000000..e32cfb1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-compat-seq-cst.c
@@ -0,0 +1,66 @@
+/* { dg-do compile } */
+/* Verify that store mappings match the Ztso suggested mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_store_long_seq_cst:
+**	l[wd]\t[atx][0-9]+,0\(a1\)
+**	s[wd]\t[atx][0-9]+,0\(a0\)
+**	fence\trw,rw
+**	ret
+*/
+void atomic_store_long_seq_cst (long* bar, long* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_store_int_seq_cst:
+**	lw\t[atx][0-9]+,0\(a1\)
+**	sw\t[atx][0-9]+,0\(a0\)
+**	fence\trw,rw
+**	ret
+*/
+void atomic_store_int_seq_cst (int* bar, int* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_store_short_seq_cst:
+**	lhu\t[atx][0-9]+,0\(a1\)
+**	sh\t[atx][0-9]+,0\(a0\)
+**	fence\trw,rw
+**	ret
+*/
+void atomic_store_short_seq_cst (short* bar, short* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_store_char_seq_cst:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	sb\t[atx][0-9]+,0\(a0\)
+**	fence\trw,rw
+**	ret
+*/
+void atomic_store_char_seq_cst (char* bar, char* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
+}
+
+/*
+** atomic_store_bool_seq_cst:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	sb\t[atx][0-9]+,0\(a0\)
+**	fence\trw,rw
+**	ret
+*/
+void atomic_store_bool_seq_cst (_Bool* bar, _Bool* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c
new file mode 100644
index 0000000..2f46470
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-relaxed.c
@@ -0,0 +1,61 @@
+/* { dg-do compile } */
+/* Verify that store mappings match the Ztso suggested mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_store_long_relaxed:
+**	l[wd]\t[atx][0-9]+,0\(a1\)
+**	s[wd]\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_long_relaxed (long* bar, long* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_store_int_relaxed:
+**	lw\t[atx][0-9]+,0\(a1\)
+**	sw\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_int_relaxed (int* bar, int* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_store_short_relaxed:
+**	lhu\t[atx][0-9]+,0\(a1\)
+**	sh\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_short_relaxed (short* bar, short* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_store_char_relaxed:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	sb\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_char_relaxed (char* bar, char* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELAXED);
+}
+
+/*
+** atomic_store_bool_relaxed:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	sb\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_bool_relaxed (_Bool* bar, _Bool* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c
new file mode 100644
index 0000000..dd2db3a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/a-ztso-store-release.c
@@ -0,0 +1,61 @@
+/* { dg-do compile } */
+/* Verify that store mappings match the Ztso suggested mapping.  */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** atomic_store_long_release:
+**	l[wd]\t[atx][0-9]+,0\(a1\)
+**	s[wd]\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_long_release (long* bar, long* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_store_int_release:
+**	lw\t[atx][0-9]+,0\(a1\)
+**	sw\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_int_release (int* bar, int* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_store_short_release:
+**	lhu\t[atx][0-9]+,0\(a1\)
+**	sh\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_short_release (short* bar, short* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_store_char_release:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	sb\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_char_release (char* bar, char* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELEASE);
+}
+
+/*
+** atomic_store_bool_release:
+**	lbu\t[atx][0-9]+,0\(a1\)
+**	sb\t[atx][0-9]+,0\(a0\)
+**	ret
+*/
+void atomic_store_bool_release (_Bool* bar, _Bool* baz)
+{
+  __atomic_store(bar, baz, __ATOMIC_RELEASE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c
deleted file mode 100644
index fd8a8bf..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELAXED, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c
deleted file mode 100644
index b3cffad..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_CONSUME, __ATOMIC_CONSUME);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c
deleted file mode 100644
index 70107c4..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c
deleted file mode 100644
index faab1ab..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c
deleted file mode 100644
index a1435a0..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c
deleted file mode 100644
index 0cbc89c..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c
+++ /dev/null
@@ -1,12 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* Mixed mappings need to be unioned.  */
-/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c
deleted file mode 100644
index 957aa3c..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-1.c
deleted file mode 100644
index 7b99db0..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-1.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* { dg-do compile } */
-/* Verify that load mappings match Table A.6's recommended mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_load_long_relaxed:
-**	l[wd]\t[atx][0-9]+,0\(a0\)
-**	s[wd]\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_long_relaxed (long* bar, long* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_load_int_relaxed:
-**	lw\t[atx][0-9]+,0\(a0\)
-**	sw\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_int_relaxed (int* bar, int* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_load_short_relaxed:
-**	lh\t[atx][0-9]+,0\(a0\)
-**	sh\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_short_relaxed (short* bar, short* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_load_char_relaxed:
-**	lb\t[atx][0-9]+,0\(a0\)
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_char_relaxed (char* bar, char* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_load_bool_relaxed:
-**	lb\t[atx][0-9]+,0\(a0\)
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_bool_relaxed (_Bool* bar, _Bool* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-2.c
deleted file mode 100644
index f9871b9..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-2.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/* { dg-do compile } */
-/* Verify that load mappings match Table A.6's recommended mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_load_long_acquire:
-**	l[wd]\t[atx][0-9]+,0\(a0\)
-**	fence\tr,rw
-**	s[wd]\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_long_acquire (long* bar, long* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
-}
-
-/*
-** atomic_load_int_acquire:
-**	lw\t[atx][0-9]+,0\(a0\)
-**	fence\tr,rw
-**	sw\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_int_acquire (int* bar, int* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
-}
-
-/*
-** atomic_load_short_acquire:
-**	lh\t[atx][0-9]+,0\(a0\)
-**	fence\tr,rw
-**	sh\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_short_acquire (short* bar, short* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
-}
-
-/*
-** atomic_load_char_acquire:
-**	lb\t[atx][0-9]+,0\(a0\)
-**	fence\tr,rw
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_char_acquire (char* bar, char* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
-}
-
-/*
-** atomic_load_bool_acquire:
-**	lb\t[atx][0-9]+,0\(a0\)
-**	fence\tr,rw
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_bool_acquire (_Bool* bar, _Bool* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-3.c
deleted file mode 100644
index 35f196c..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-load-3.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/* { dg-do compile } */
-/* Verify that load mappings match Table A.6's recommended mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_load_long_seq_cst:
-**	fence\trw,rw
-**	l[wd]\t[atx][0-9]+,0\(a0\)
-**	fence\tr,rw
-**	s[wd]\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_long_seq_cst (long* bar, long* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_load_int_seq_cst:
-**	fence\trw,rw
-**	lw\t[atx][0-9]+,0\(a0\)
-**	fence\tr,rw
-**	sw\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_int_seq_cst (int* bar, int* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_load_short_seq_cst:
-**	fence\trw,rw
-**	lh\t[atx][0-9]+,0\(a0\)
-**	fence\tr,rw
-**	sh\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_short_seq_cst (short* bar, short* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_load_char_seq_cst:
-**	fence\trw,rw
-**	lb\t[atx][0-9]+,0\(a0\)
-**	fence\tr,rw
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_char_seq_cst (char* bar, char* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_load_bool_seq_cst:
-**	fence\trw,rw
-**	lb\t[atx][0-9]+,0\(a0\)
-**	fence\tr,rw
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_bool_seq_cst (_Bool* bar, _Bool* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-1.c
deleted file mode 100644
index eb67d19..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-1.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* { dg-do compile } */
-/* Verify that store mappings match Table A.6's recommended mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_store_long_relaxed:
-**	l[wd]\t[atx][0-9]+,0\(a1\)
-**	s[wd]\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_long_relaxed (long* bar, long* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_store_int_relaxed:
-**	lw\t[atx][0-9]+,0\(a1\)
-**	sw\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_int_relaxed (int* bar, int* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_store_short_relaxed:
-**	lhu\t[atx][0-9]+,0\(a1\)
-**	sh\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_short_relaxed (short* bar, short* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_store_char_relaxed:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	sb\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_char_relaxed (char* bar, char* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_store_bool_relaxed:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	sb\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_bool_relaxed (_Bool* bar, _Bool* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-2.c
deleted file mode 100644
index 25a998b..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-2.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/* { dg-do compile } */
-/* Verify that store mappings match Table A.6's recommended mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_store_long_release:
-**	l[wd]\t[atx][0-9]+,0\(a1\)
-**	fence\trw,w
-**	s[wd]\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_long_release (long* bar, long* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELEASE);
-}
-
-/*
-** atomic_store_int_release:
-**	lw\t[atx][0-9]+,0\(a1\)
-**	fence\trw,w
-**	sw\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_int_release (int* bar, int* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELEASE);
-}
-
-/*
-** atomic_store_short_release:
-**	lhu\t[atx][0-9]+,0\(a1\)
-**	fence\trw,w
-**	sh\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_short_release (short* bar, short* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELEASE);
-}
-
-/*
-** atomic_store_char_release:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	fence\trw,w
-**	sb\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_char_release (char* bar, char* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELEASE);
-}
-
-/*
-** atomic_store_bool_release:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	fence\trw,w
-**	sb\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_bool_release (_Bool* bar, _Bool* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELEASE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c
deleted file mode 100644
index 43880b9..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/* { dg-do compile } */
-/* Verify that store mapping are compatible with Table A.6 & A.7.  */
-/* { dg-options "-O3" } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_store_long_seq_cst:
-**	l[wd]\t[atx][0-9]+,0\(a1\)
-**	fence\trw,w
-**	s[wd]\t[atx][0-9]+,0\(a0\)
-**	fence\trw,rw
-**	ret
-*/
-void atomic_store_long_seq_cst (long* bar, long* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_store_int_seq_cst:
-**	lw\t[atx][0-9]+,0\(a1\)
-**	fence\trw,w
-**	sw\t[atx][0-9]+,0\(a0\)
-**	fence\trw,rw
-**	ret
-*/
-void atomic_store_int_seq_cst (int* bar, int* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_store_short_seq_cst:
-**	lhu\t[atx][0-9]+,0\(a1\)
-**	fence\trw,w
-**	sh\t[atx][0-9]+,0\(a0\)
-**	fence\trw,rw
-**	ret
-*/
-void atomic_store_short_seq_cst (short* bar, short* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_store_char_seq_cst:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	fence\trw,w
-**	sb\t[atx][0-9]+,0\(a0\)
-**	fence\trw,rw
-**	ret
-*/
-void atomic_store_char_seq_cst (char* bar, char* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_store_bool_seq_cst:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	fence\trw,w
-**	sb\t[atx][0-9]+,0\(a0\)
-**	fence\trw,rw
-**	ret
-*/
-void atomic_store_bool_seq_cst (_Bool* bar, _Bool* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c
deleted file mode 100644
index 50009f0..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (short* bar, short baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c
deleted file mode 100644
index 782ffcb..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (short* bar, short baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c
deleted file mode 100644
index 76ec8a8..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
-
-void foo (short* bar, short baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c
deleted file mode 100644
index 3f5fa20..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
-
-void foo (short* bar, short baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c
deleted file mode 100644
index 7417a67..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-remove-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
-
-void foo (short* bar, short baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-1.c
deleted file mode 100644
index 46a9f0c..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-1.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELAXED, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-2.c
deleted file mode 100644
index 20e325f..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-2.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_CONSUME, __ATOMIC_CONSUME);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-3.c
deleted file mode 100644
index 0a443b4..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-3.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-4.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-4.c
deleted file mode 100644
index 35e01cdc..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-4.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-5.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-5.c
deleted file mode 100644
index cd88493..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-5.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-6.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-6.c
deleted file mode 100644
index 7da3b1d..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-6.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-7.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-7.c
deleted file mode 100644
index 53f6e6a..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-compare-exchange-7.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
-
-void foo (int bar, int baz, int qux)
-{
-  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-1.c
deleted file mode 100644
index ef5dee6..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-1.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* { dg-do compile } */
-/* Verify that load mappings match the Ztso suggested mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_load_long_relaxed:
-**	l[wd]\t[atx][0-9]+,0\(a0\)
-**	s[wd]\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_long_relaxed (long* bar, long* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_load_int_relaxed:
-**	lw\t[atx][0-9]+,0\(a0\)
-**	sw\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_int_relaxed (int* bar, int* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_load_short_relaxed:
-**	lh\t[atx][0-9]+,0\(a0\)
-**	sh\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_short_relaxed (short* bar, short* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_load_char_relaxed:
-**	lb\t[atx][0-9]+,0\(a0\)
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_char_relaxed (char* bar, char* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_load_bool_relaxed:
-**	lb\t[atx][0-9]+,0\(a0\)
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_bool_relaxed (_Bool* bar, _Bool* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-2.c
deleted file mode 100644
index 4e94191..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-2.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* { dg-do compile } */
-/* Verify that load mappings match the Ztso suggested mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_load_long_acquire:
-**	l[wd]\t[atx][0-9]+,0\(a0\)
-**	s[wd]\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_long_acquire (long* bar, long* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
-}
-
-/*
-** atomic_load_int_acquire:
-**	lw\t[atx][0-9]+,0\(a0\)
-**	sw\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_int_acquire (int* bar, int* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
-}
-
-/*
-** atomic_load_short_acquire:
-**	lh\t[atx][0-9]+,0\(a0\)
-**	sh\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_short_acquire (short* bar, short* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
-}
-
-/*
-** atomic_load_char_acquire:
-**	lb\t[atx][0-9]+,0\(a0\)
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_char_acquire (char* bar, char* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
-}
-
-/*
-** atomic_load_bool_acquire:
-**	lb\t[atx][0-9]+,0\(a0\)
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_bool_acquire (_Bool* bar, _Bool* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-3.c
deleted file mode 100644
index 93cd8bb..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-load-3.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/* { dg-do compile } */
-/* Verify that load mappings match the Ztso suggested mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_load_long_seq_cst:
-**	fence\trw,rw
-**	l[wd]\t[atx][0-9]+,0\(a0\)
-**	s[wd]\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_long_seq_cst (long* bar, long* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_load_int_seq_cst:
-**	fence\trw,rw
-**	lw\t[atx][0-9]+,0\(a0\)
-**	sw\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_int_seq_cst (int* bar, int* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_load_short_seq_cst:
-**	fence\trw,rw
-**	lh\t[atx][0-9]+,0\(a0\)
-**	sh\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_short_seq_cst (short* bar, short* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_load_char_seq_cst:
-**	fence\trw,rw
-**	lb\t[atx][0-9]+,0\(a0\)
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_char_seq_cst (char* bar, char* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_load_bool_seq_cst:
-**	fence\trw,rw
-**	lb\t[atx][0-9]+,0\(a0\)
-**	sb\t[atx][0-9]+,0\(a1\)
-**	ret
-*/
-void atomic_load_bool_seq_cst (_Bool* bar, _Bool* baz)
-{
-  __atomic_load(bar, baz, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-1.c
deleted file mode 100644
index 2f46470..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-1.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* { dg-do compile } */
-/* Verify that store mappings match the Ztso suggested mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_store_long_relaxed:
-**	l[wd]\t[atx][0-9]+,0\(a1\)
-**	s[wd]\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_long_relaxed (long* bar, long* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_store_int_relaxed:
-**	lw\t[atx][0-9]+,0\(a1\)
-**	sw\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_int_relaxed (int* bar, int* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_store_short_relaxed:
-**	lhu\t[atx][0-9]+,0\(a1\)
-**	sh\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_short_relaxed (short* bar, short* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_store_char_relaxed:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	sb\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_char_relaxed (char* bar, char* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELAXED);
-}
-
-/*
-** atomic_store_bool_relaxed:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	sb\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_bool_relaxed (_Bool* bar, _Bool* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-2.c
deleted file mode 100644
index dd2db3a..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-2.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/* { dg-do compile } */
-/* Verify that store mappings match the Ztso suggested mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_store_long_release:
-**	l[wd]\t[atx][0-9]+,0\(a1\)
-**	s[wd]\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_long_release (long* bar, long* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELEASE);
-}
-
-/*
-** atomic_store_int_release:
-**	lw\t[atx][0-9]+,0\(a1\)
-**	sw\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_int_release (int* bar, int* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELEASE);
-}
-
-/*
-** atomic_store_short_release:
-**	lhu\t[atx][0-9]+,0\(a1\)
-**	sh\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_short_release (short* bar, short* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELEASE);
-}
-
-/*
-** atomic_store_char_release:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	sb\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_char_release (char* bar, char* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELEASE);
-}
-
-/*
-** atomic_store_bool_release:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	sb\t[atx][0-9]+,0\(a0\)
-**	ret
-*/
-void atomic_store_bool_release (_Bool* bar, _Bool* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_RELEASE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-3.c
deleted file mode 100644
index e32cfb1..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-store-3.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/* { dg-do compile } */
-/* Verify that store mappings match the Ztso suggested mapping.  */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** atomic_store_long_seq_cst:
-**	l[wd]\t[atx][0-9]+,0\(a1\)
-**	s[wd]\t[atx][0-9]+,0\(a0\)
-**	fence\trw,rw
-**	ret
-*/
-void atomic_store_long_seq_cst (long* bar, long* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_store_int_seq_cst:
-**	lw\t[atx][0-9]+,0\(a1\)
-**	sw\t[atx][0-9]+,0\(a0\)
-**	fence\trw,rw
-**	ret
-*/
-void atomic_store_int_seq_cst (int* bar, int* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_store_short_seq_cst:
-**	lhu\t[atx][0-9]+,0\(a1\)
-**	sh\t[atx][0-9]+,0\(a0\)
-**	fence\trw,rw
-**	ret
-*/
-void atomic_store_short_seq_cst (short* bar, short* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_store_char_seq_cst:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	sb\t[atx][0-9]+,0\(a0\)
-**	fence\trw,rw
-**	ret
-*/
-void atomic_store_char_seq_cst (char* bar, char* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
-}
-
-/*
-** atomic_store_bool_seq_cst:
-**	lbu\t[atx][0-9]+,0\(a1\)
-**	sb\t[atx][0-9]+,0\(a0\)
-**	fence\trw,rw
-**	ret
-*/
-void atomic_store_bool_seq_cst (_Bool* bar, _Bool* baz)
-{
-  __atomic_store(bar, baz, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c
deleted file mode 100644
index a44d698..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that subword atomic op mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (short* bar, short baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c
deleted file mode 100644
index 8d28569..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that subword atomic op mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (short* bar, short baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c
deleted file mode 100644
index fb803ab..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that subword atomic op mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (short* bar, short baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c
deleted file mode 100644
index a88e409..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that subword atomic op mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
-
-void foo (short* bar, short baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c b/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c
deleted file mode 100644
index d851e5e..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c
+++ /dev/null
@@ -1,11 +0,0 @@
-/* { dg-do compile } */
-/* Verify that subword atomic op mappings match the Ztso suggested mapping.  */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_ztso } */
-/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
-/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
-
-void foo (short* bar, short baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c b/gcc/testsuite/gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c
deleted file mode 100644
index dae30c3..0000000
--- a/gcc/testsuite/gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/* { dg-do compile } */
-/* Ensure that AMO ops are emitted when both zalrsc and zaamo are enabled.  */
-/* { dg-options "-O3" } */
-/* { dg-add-options riscv_zalrsc } */
-/* { dg-add-options riscv_zaamo } */
-/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
-/* { dg-final { check-function-bodies "**" "" } } */
-
-/*
-** foo:
-**	amoadd\.w\tzero,a1,0\(a0\)
-**	ret
-*/
-void foo (int* bar, int baz)
-{
-  __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
-}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zaamo-preferred-over-zalrsc.c b/gcc/testsuite/gcc.target/riscv/amo/zaamo-preferred-over-zalrsc.c
new file mode 100644
index 0000000..dae30c3
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zaamo-preferred-over-zalrsc.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* Ensure that AMO ops are emitted when both zalrsc and zaamo are enabled.  */
+/* { dg-options "-O3" } */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_zaamo } */
+/* { dg-skip-if "" { *-*-* } { "-g" "-flto"} } */
+/* { dg-final { check-function-bodies "**" "" } } */
+
+/*
+** foo:
+**	amoadd\.w\tzero,a1,0\(a0\)
+**	ret
+*/
+void foo (int* bar, int baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c
new file mode 100644
index 0000000..0cbc89c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire-release.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* Mixed mappings need to be unioned.  */
+/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_ACQUIRE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c
new file mode 100644
index 0000000..70107c4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-acquire.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c
new file mode 100644
index 0000000..b3cffad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-consume.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_CONSUME, __ATOMIC_CONSUME);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c
new file mode 100644
index 0000000..fd8a8bf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-relaxed.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELAXED, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c
new file mode 100644
index 0000000..faab1ab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-release.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c
new file mode 100644
index 0000000..957aa3c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst-relaxed.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c
new file mode 100644
index 0000000..a1435a0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-compare-exchange-int-seq-cst.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c
new file mode 100644
index 0000000..3f5fa20
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acq-rel.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
+
+void foo (short* bar, short baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c
new file mode 100644
index 0000000..782ffcb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-acquire.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w.aq\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (short* bar, short baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c
new file mode 100644
index 0000000..50009f0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-relaxed.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (short* bar, short baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c
new file mode 100644
index 0000000..76ec8a8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-release.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
+
+void foo (short* bar, short baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c
new file mode 100644
index 0000000..7417a67
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-rvwmo-subword-amo-add-char-seq-cst.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that subword atomic op mappings match Table A.6's recommended mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-remove-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
+
+void foo (short* bar, short baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c
new file mode 100644
index 0000000..7da3b1d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire-release.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_ACQUIRE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c
new file mode 100644
index 0000000..0a443b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-acquire.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_ACQUIRE, __ATOMIC_ACQUIRE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c
new file mode 100644
index 0000000..20e325f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-consume.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_CONSUME, __ATOMIC_CONSUME);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c
new file mode 100644
index 0000000..46a9f0c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-relaxed.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELAXED, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c
new file mode 100644
index 0000000..35e01cdc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-release.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_RELEASE, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c
new file mode 100644
index 0000000..53f6e6a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst-relaxed.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c
new file mode 100644
index 0000000..cd88493
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-compare-exchange-int-seq-cst.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that compare exchange mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
+
+void foo (int bar, int baz, int qux)
+{
+  __atomic_compare_exchange_n(&bar, &baz, qux, 1, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c
new file mode 100644
index 0000000..a88e409
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acq-rel.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that subword atomic op mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (short* bar, short baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_ACQ_REL);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c
new file mode 100644
index 0000000..8d28569
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-acquire.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that subword atomic op mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (short* bar, short baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_ACQUIRE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c
new file mode 100644
index 0000000..a44d698
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-relaxed.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that subword atomic op mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (short* bar, short baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_RELAXED);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c
new file mode 100644
index 0000000..fb803ab
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-release.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that subword atomic op mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w\t" 1 } } */
+
+void foo (short* bar, short baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_RELEASE);
+}
diff --git a/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c
new file mode 100644
index 0000000..d851e5e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/amo/zalrsc-ztso-subword-amo-add-char-seq-cst.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* Verify that subword atomic op mappings match the Ztso suggested mapping.  */
+/* { dg-add-options riscv_zalrsc } */
+/* { dg-add-options riscv_ztso } */
+/* { dg-final { scan-assembler-times "lr.w.aqrl\t" 1 } } */
+/* { dg-final { scan-assembler-times "sc.w.rl\t" 1 } } */
+
+void foo (short* bar, short baz)
+{
+  __atomic_add_fetch(bar, baz, __ATOMIC_SEQ_CST);
+}
-- 
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