From 548b75d82229cf30052db3ad13e34115335cd9d8 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Wed, 3 Feb 2021 00:16:23 +0000 Subject: Daily bump. --- gcc/testsuite/ChangeLog | 70 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 70 insertions(+) (limited to 'gcc/testsuite') diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0614da1..a0c6e73 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,73 @@ +2021-02-02 Martin Liska + + PR target/97510 + * gcc.target/i386/pr97510.c: New test. + +2021-02-02 Jason Merrill + + PR c++/98929 + * g++.dg/cpp1z/class-deduction-decltype1.C: New test. + +2021-02-02 Kyrylo Tkachov + + * gcc.target/aarch64/narrow_high-intrinsics.c: Adjust sqxtun2 scan. + +2021-02-02 Paul Thomas + + PR fortran/91862 + * gfortran.dg/pr91862.f90: New test. + +2021-02-02 Kyrylo Tkachov + + * gcc.target/aarch64/arg-type-diagnostics-1.c: Return result from foo. + +2021-02-02 Jakub Jelinek + + PR tree-optimization/98848 + * gcc.dg/vect/pr98848.c: New test. + * gcc.dg/vect/pr92205.c: Remove xfail. + +2021-02-02 Jakub Jelinek + + PR tree-optimization/97960 + * g++.dg/torture/pr97960.C: New test. + +2021-02-02 Kito Cheng + + PR target/98743 + * g++.dg/opt/pr98743.C: New. + +2021-02-02 Christophe Lyon + + * gcc.target/arm/simd/mve-vorn.c: Add vorn tests. + +2021-02-02 Alexandre Oliva + + * gcc.dg/asan/nested-1.c: New. + +2021-02-02 David Malcolm + + PR analyzer/93355 + PR analyzer/96374 + * gcc.dg/analyzer/conditionals-3.c: Add "__analyzer_" + prefix to support subroutines where necessary. + * gcc.dg/analyzer/data-model-1.c: Likewise. + * gcc.dg/analyzer/feasibility-1.c (called_by_test_6a): New. + (test_6a): New. + * gcc.dg/analyzer/params.c: Add "__analyzer_" prefix to support + subroutines where necessary. + * gcc.dg/analyzer/pr96651-2.c: Likewise. + * gcc.dg/analyzer/signal-4b.c: Likewise. + * gcc.dg/analyzer/single-field.c: Likewise. + * gcc.dg/analyzer/torture/conditionals-2.c: Likewise. + +2021-02-02 David Malcolm + + PR analyzer/93355 + PR analyzer/96374 + * gcc.dg/analyzer/pr93355-localealias-feasibility-2.c: New test. + * gcc.dg/analyzer/pr93355-localealias-feasibility-3.c: New test. + 2021-02-01 Kyrylo Tkachov * gcc.target/aarch64/narrow_high-intrinsics.c: Adjust rshrn2 -- cgit v1.1 From 5e606ed90a1bed878071b6b5a3ef9b97b3d99838 Mon Sep 17 00:00:00 2001 From: Tamar Christina Date: Wed, 3 Feb 2021 08:06:11 +0000 Subject: slp: Split out patterns away from using SLP_ONLY into their own flag Previously the SLP pattern matcher was using STMT_VINFO_SLP_VECT_ONLY as a way to dissolve the SLP only patterns during SLP cancellation. However it seems like the semantics for STMT_VINFO_SLP_VECT_ONLY are slightly different than what I expected. Namely that the non-SLP path can still use a statement marked STMT_VINFO_SLP_VECT_ONLY. One such example is masked loads which are used both in the SLP and non-SLP path. To fix this I now introduce a new flag STMT_VINFO_SLP_VECT_ONLY_PATTERN which is used only by the pattern matcher. gcc/ChangeLog: PR tree-optimization/98928 * tree-vect-loop.c (vect_analyze_loop_2): Change STMT_VINFO_SLP_VECT_ONLY to STMT_VINFO_SLP_VECT_ONLY_PATTERN. * tree-vect-slp-patterns.c (complex_pattern::build): Likewise. * tree-vectorizer.h (STMT_VINFO_SLP_VECT_ONLY_PATTERN): New. (class _stmt_vec_info): Add slp_vect_pattern_only_p. gcc/testsuite/ChangeLog: PR tree-optimization/98928 * gcc.target/i386/pr98928.c: New test. --- gcc/testsuite/gcc.target/i386/pr98928.c | 59 +++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr98928.c (limited to 'gcc/testsuite') diff --git a/gcc/testsuite/gcc.target/i386/pr98928.c b/gcc/testsuite/gcc.target/i386/pr98928.c new file mode 100644 index 0000000..9503b57 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr98928.c @@ -0,0 +1,59 @@ +/* { dg-do compile } */ +/* { dg-additional-options "-Ofast -march=skylake-avx512 -fwhole-program -w" } */ + +typedef float MagickRealType; +typedef short Quantum; +float InterpolateMagickPixelPacket_alpha[1]; +int InterpolateMagickPixelPacket_i; + +void InterpolateMagickPixelPacket(); + +void main() { InterpolateMagickPixelPacket(); } + +typedef struct { + MagickRealType red, green, blue, opacity, index; +} MagickPixelPacket; +typedef struct { + Quantum blue, green, red, opacity; +} PixelPacket; +struct _Image { + int colorspace; + int matte; +} GetMagickPixelPacket(MagickPixelPacket *pixel) { + pixel->red = pixel->green = pixel->blue = 0.0; +} +int AlphaBlendMagickPixelPacket(struct _Image *image, PixelPacket *color, + Quantum *indexes, MagickPixelPacket *pixel, + MagickRealType *alpha) { + if (image->matte) { + *alpha = pixel->red = pixel->green = pixel->blue = pixel->opacity = + color->opacity; + pixel->index = 0.0; + if (image->colorspace) + pixel->index = *indexes; + return 0; + } + *alpha = 1.0 / 0.2; + pixel->red = *alpha * color->red; + pixel->green = *alpha * color->green; + pixel->blue = *alpha * color->blue; + pixel->opacity = pixel->index = 0.0; + if (image->colorspace && indexes) + pixel->index = *indexes; +} +MagickPixelPacket InterpolateMagickPixelPacket_pixels[1]; +PixelPacket InterpolateMagickPixelPacket_p; + +void +InterpolateMagickPixelPacket(struct _Image *image) { + Quantum *indexes; + for (; InterpolateMagickPixelPacket_i; InterpolateMagickPixelPacket_i++) { + GetMagickPixelPacket(InterpolateMagickPixelPacket_pixels + + InterpolateMagickPixelPacket_i); + AlphaBlendMagickPixelPacket( + image, &InterpolateMagickPixelPacket_p + InterpolateMagickPixelPacket_i, + indexes + InterpolateMagickPixelPacket_i, + InterpolateMagickPixelPacket_pixels + InterpolateMagickPixelPacket_i, + InterpolateMagickPixelPacket_alpha + InterpolateMagickPixelPacket_i); + } +} -- cgit v1.1 From 1b5572edb8caaed2f31a7235b8c58628da6bdb8f Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 3 Feb 2021 09:04:26 +0100 Subject: i386: Remove V1DImode shift expanders [PR98287] On Tue, Feb 02, 2021 at 02:23:55PM +0100, Richard Biener wrote: > All I say is that the x86 target > should either not advertise V1DF shifts or advertise the basic > ops that reasonable simplification would expect to exist. The backend has several V1?Imode shifts, but optab only for those V1DImode ones: grep '[la]sh[lr]v1[qhsdtox]' tmp-mddump.md (define_insn ("mmx_ashlv1di3") (define_insn ("mmx_lshrv1di3") (define_insn ("avx512bw_ashlv1ti3") (define_insn ("avx512bw_lshrv1ti3") (define_insn ("sse2_ashlv1ti3") (define_insn ("sse2_lshrv1ti3") (define_expand ("ashlv1di3") (define_expand ("lshrv1di3") emit_insn (gen_sse2_lshrv1ti3 (tmp, gen_lowpart (V1TImode, operands[1]), I think it has been introduced with https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89021#c13 Before we didn't have any V1DImode expanders (except mov/movmisalign, but those are needed and are supplied for other V1??mode modes too). This patch just removes the two V1DImode shift expanders with standard names. 2021-02-03 Jakub Jelinek PR tree-optimization/98287 * config/i386/mmx.md (3): For shifts don't enable expander for V1DImode. * gcc.dg/pr98287.c: New test. --- gcc/testsuite/gcc.dg/pr98287.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/pr98287.c (limited to 'gcc/testsuite') diff --git a/gcc/testsuite/gcc.dg/pr98287.c b/gcc/testsuite/gcc.dg/pr98287.c new file mode 100644 index 0000000..0314428 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr98287.c @@ -0,0 +1,19 @@ +/* PR tree-optimization/98287 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -fno-tree-ccp -fno-tree-forwprop -Wno-psabi -w" } */ + +typedef unsigned long __attribute__((__vector_size__ (8))) V; +V v; + +static __attribute__((noinline, noclone)) V +bar (unsigned short s) +{ + return v >> s << s | v >> s >> 63; +} + +unsigned long +foo (void) +{ + V x = bar (1); + return x[0]; +} -- cgit v1.1 From eb69a49c4d3287e797e0d6279186221354905fe0 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 3 Feb 2021 09:07:36 +0100 Subject: lra-constraints: Fix error-recovery for bad inline-asms [PR97971] The following testcase has ice-on-invalid, it can't be reloaded, but we shouldn't ICE the compiler because the user typed non-sense. In current_insn_transform we have: if (process_alt_operands (reused_alternative_num)) alt_p = true; if (check_only_p) return ! alt_p || best_losers != 0; /* If insn is commutative (it's safe to exchange a certain pair of operands) then we need to try each alternative twice, the second time matching those two operands as if we had exchanged them. To do this, really exchange them in operands. If we have just tried the alternatives the second time, return operands to normal and drop through. */ if (reused_alternative_num < 0 && commutative >= 0) { curr_swapped = !curr_swapped; if (curr_swapped) { swap_operands (commutative); goto try_swapped; } else swap_operands (commutative); } if (! alt_p && ! sec_mem_p) { /* No alternative works with reloads?? */ if (INSN_CODE (curr_insn) >= 0) fatal_insn ("unable to generate reloads for:", curr_insn); error_for_asm (curr_insn, "inconsistent operand constraints in an %"); lra_asm_error_p = true; ... and so handle inline asms there differently (and delete/nullify them after this) - fatal_insn is only called for non-inline asm. But in process_alt_operands we do: /* Both the earlyclobber operand and conflicting operand cannot both be user defined hard registers. */ if (HARD_REGISTER_P (operand_reg[i]) && REG_USERVAR_P (operand_reg[i]) && operand_reg[j] != NULL_RTX && HARD_REGISTER_P (operand_reg[j]) && REG_USERVAR_P (operand_reg[j])) fatal_insn ("unable to generate reloads for " "impossible constraints:", curr_insn); and thus ICE even for inline-asms. I think it is inappropriate to delete/nullify the insn in process_alt_operands, as it could be done e.g. in the check_only_p mode, so this patch just returns false in that case, which results in the caller have alt_p false, and as inline asm isn't simple move, sec_mem_p will be also false (and it isn't commutative either), so for check_only_p it will suggests to the callers it isn't ok and otherwise will emit error and delete/nullify the inline asm insn. 2021-02-03 Jakub Jelinek PR middle-end/97971 * lra-constraints.c (process_alt_operands): For inline asm, don't call fatal_insn, but instead return false. * gcc.target/i386/pr97971.c: New test. --- gcc/testsuite/gcc.target/i386/pr97971.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr97971.c (limited to 'gcc/testsuite') diff --git a/gcc/testsuite/gcc.target/i386/pr97971.c b/gcc/testsuite/gcc.target/i386/pr97971.c new file mode 100644 index 0000000..d07a310 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr97971.c @@ -0,0 +1,12 @@ +/* PR middle-end/97971 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ + +int +foo (void) +{ + register _Complex long a asm ("rax"); + register int b asm ("rdx"); + asm ("# %0 %1" : "=&r" (a), "=r" (b)); /* { dg-error "inconsistent operand constraints in an 'asm'" } */ + return a; +} -- cgit v1.1 From 176c7bd840a3902e9e67eb0796de362677905f56 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 3 Feb 2021 09:09:26 +0100 Subject: ifcvt: Avoid ICEs trying to force_operand random RTL [PR97487] As the testcase shows, RTL ifcvt can throw random RTL (whatever it found in some insns) at expand_binop or expand_unop and expects it to do something (and then will check if it created valid insns and punts if not). These functions in the end if the operands don't match try to copy_to_mode_reg the operands, which does if (!general_operand (x, VOIDmode)) x = force_operand (x, temp); but, force_operand is far from handling all possible RTLs, it will ICE for all more unusual RTL codes. Basically handles just simple arithmetic and unary RTL operations if they have an optab and expand_simple_binop/expand_simple_unop ICE on others. The following patch fixes it by adding some operand verification (whether there is a hope that copy_to_mode_reg will succeed on those). It is added both to noce_emit_move_insn (not needed for this exact testcase, that function simply tries to recog the insn as is and if it fails, handles some simple binop/unop cases; the patch performs the verification of their operands) and noce_try_sign_mask. 2021-02-03 Jakub Jelinek PR middle-end/97487 * ifcvt.c (noce_can_force_operand): New function. (noce_emit_move_insn): Use it. (noce_try_sign_mask): Likewise. Formatting fix. * gcc.dg/pr97487-1.c: New test. * gcc.dg/pr97487-2.c: New test. --- gcc/testsuite/gcc.dg/pr97487-1.c | 9 +++++++++ gcc/testsuite/gcc.dg/pr97487-2.c | 18 ++++++++++++++++++ 2 files changed, 27 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/pr97487-1.c create mode 100644 gcc/testsuite/gcc.dg/pr97487-2.c (limited to 'gcc/testsuite') diff --git a/gcc/testsuite/gcc.dg/pr97487-1.c b/gcc/testsuite/gcc.dg/pr97487-1.c new file mode 100644 index 0000000..e79d1f1 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97487-1.c @@ -0,0 +1,9 @@ +/* PR middle-end/97487 */ +/* { dg-do compile } */ +/* { dg-options "-O2 --param max-rtl-if-conversion-unpredictable-cost=0" } */ + +long int __attribute__ ((simd)) +foo (long int x, long int y) +{ + return x < 0 ? y : 0; +} diff --git a/gcc/testsuite/gcc.dg/pr97487-2.c b/gcc/testsuite/gcc.dg/pr97487-2.c new file mode 100644 index 0000000..0b62381 --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr97487-2.c @@ -0,0 +1,18 @@ +/* PR middle-end/97487 */ +/* { dg-do compile } */ +/* { dg-options "-O2 --param max-rtl-if-conversion-unpredictable-cost=0 -Wno-psabi -w" } */ + +typedef long long int V __attribute__((vector_size (16))); + +long long int +foo (V x, V y) +{ + long long int t1 = y[0]; + long long int t2 = x[0]; + long long int t3; + if (t2 < 0) + t3 = t1; + else + t3 = 0; + return t3; +} -- cgit v1.1 From e3f9f80bfa9e58a90dfe75631921c78660342daf Mon Sep 17 00:00:00 2001 From: Tobias Burnus Date: Wed, 3 Feb 2021 10:34:18 +0100 Subject: Fortran: Fix Array dependency with local coarrays [PR98913] gcc/fortran/ChangeLog: PR fortran/98913 * dependency.c (gfc_dep_resolver): Treat local access to coarrays like any array access in dependency analysis. gcc/testsuite/ChangeLog: PR fortran/98913 * gfortran.dg/coarray/array_temporary.f90: New test. --- .../gfortran.dg/coarray/array_temporary.f90 | 74 ++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 gcc/testsuite/gfortran.dg/coarray/array_temporary.f90 (limited to 'gcc/testsuite') diff --git a/gcc/testsuite/gfortran.dg/coarray/array_temporary.f90 b/gcc/testsuite/gfortran.dg/coarray/array_temporary.f90 new file mode 100644 index 0000000..86460a7 --- /dev/null +++ b/gcc/testsuite/gfortran.dg/coarray/array_temporary.f90 @@ -0,0 +1,74 @@ +! { dg-do compile } +! { dg-additional-options "-Warray-temporaries" } +! +! PR fortran/98913 +! +! Contributed by Jorge D'Elia +! +! Did create an array temporary for local access to coarray +! (but not for identical noncoarray use). +! + +program test + implicit none + integer, parameter :: iin = kind (1) + integer, parameter :: idp = kind (1.0d0) + real (kind=idp), allocatable :: AA (:,:)[:] + real (kind=idp), allocatable :: BB (:,:) + real (kind=idp), allocatable :: UU (:) + integer (kind=iin) :: nn, n1, n2 + integer (kind=iin) :: j, k, k1 + ! + nn = 5 + n1 = 1 + n2 = 10 + ! + allocate (AA (1:nn,n1:n2)[*]) + allocate (BB (1:nn,n1:n2)) + allocate (UU (1:nn)) + ! + k = 1 + k1 = k + 1 + ! + AA = 1.0_idp + BB = 1.0_idp + UU = 2.0_idp + + ! AA - coarrays + ! No temporary needed: + do j = 1, nn + AA (k1:nn,j) = AA (k1:nn,j) - UU (k1:nn) * AA (k,j) ! { dg-bogus "Creating array temporary" } + end do + do j = 1, nn + AA (k1:nn,j) = AA (k1:nn,j) - UU (k1:nn) * AA (k,j) - UU(k) * AA (k1-1:nn-1,j) ! { dg-bogus "Creating array temporary" } + end do + do j = 1, nn + AA (k1:nn,j) = AA (k1:nn,j) - UU (k1:nn) * AA (k,j) - UU(k) * AA (k1+1:nn+1,j) ! { dg-bogus "Creating array temporary" } + end do + + ! But: + do j = 1, nn + AA (k1:nn,j) = AA (k1-1:nn-1,j) - UU (k1:nn) * AA (k,j) - UU(k) * AA (k1+1:nn+1,j) ! { dg-warning "Creating array temporary" } + end do + + ! BB - no coarrays + ! No temporary needed: + do j = 1, nn + BB (k1:nn,j) = BB (k1:nn,j) - UU (k1:nn) * BB (k,j) ! { dg-bogus "Creating array temporary" } + end do + do j = 1, nn + BB (k1:nn,j) = BB (k1:nn,j) - UU (k1:nn) * BB (k,j) - UU(k) * BB (k1-1:nn-1,j) ! { dg-bogus "Creating array temporary" } + end do + do j = 1, nn + BB (k1:nn,j) = BB (k1:nn,j) - UU (k1:nn) * BB (k,j) - UU(k) * BB (k1+1:nn+1,j) ! { dg-bogus "Creating array temporary" } + end do + + ! But: + do j = 1, nn + BB (k1:nn,j) = BB (k1-1:nn-1,j) - UU (k1:nn) * BB (k,j) - UU(k) * BB (k1+1:nn+1,j) ! { dg-warning "Creating array temporary" } + end do + + deallocate (AA) + deallocate (BB) + deallocate (UU) +end program test -- cgit v1.1 From 25fdd0d6df44044a8b505e6fcd07270e2e279b06 Mon Sep 17 00:00:00 2001 From: Marek Polacek Date: Mon, 1 Feb 2021 23:30:05 -0500 Subject: c++: ICE with late parsing of noexcept in nested class [PR98899] Here we crash with a noexcept-specifier in a nested template class, because my handling of such deferred-parse noexcept-specifiers was gronked when we need to instantiate a DEFERRED_PARSE before it was actually parsed at the end of the outermost class. In struct S { template struct B { B() noexcept(noexcept(x)); int x; }; struct A : B { A() : B() {} }; }; we call complete_type for B which triggers tsubsting S::B::B() whose noexcept-specifier still contains a DEFERRED_PARSE. The trick is to stash such noexcept-specifiers into DEFPARSE_INSTANTIATIONS so that we can replace it later when we've finally parsed all deferred noexcept-specifiers. In passing, fix missing usage of UNPARSED_NOEXCEPT_SPEC_P. gcc/cp/ChangeLog: PR c++/98899 * parser.c (cp_parser_class_specifier_1): Use any possible DEFPARSE_INSTANTIATIONS to update DEFERRED_NOEXCEPT_PATTERN. (cp_parser_save_noexcept): Initialize DEFPARSE_INSTANTIATIONS. * pt.c (tsubst_exception_specification): Stash new_specs into DEFPARSE_INSTANTIATIONS. * tree.c (fixup_deferred_exception_variants): Use UNPARSED_NOEXCEPT_SPEC_P. gcc/testsuite/ChangeLog: PR c++/98899 * g++.dg/cpp0x/noexcept65.C: New test. --- gcc/testsuite/g++.dg/cpp0x/noexcept65.C | 35 +++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 gcc/testsuite/g++.dg/cpp0x/noexcept65.C (limited to 'gcc/testsuite') diff --git a/gcc/testsuite/g++.dg/cpp0x/noexcept65.C b/gcc/testsuite/g++.dg/cpp0x/noexcept65.C new file mode 100644 index 0000000..f593377 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp0x/noexcept65.C @@ -0,0 +1,35 @@ +// PR c++/98899 +// { dg-do compile { target c++11 } } + +template struct integral_constant { + static constexpr int value = __v; +}; + +struct S { + template struct B { + B() noexcept(noexcept(x)); + int x; + }; + struct A : B { + A() : B() {} + }; +}; + +struct S2 { + template struct B { + B() noexcept(integral_constant::value); + }; + struct A : B { + A() : B() {} + }; +}; + +struct S3 { + template struct B { + B() noexcept(b); + }; + struct A : B { + A() : B() {} + }; + static constexpr bool b = false; +}; -- cgit v1.1 From c926940f528e689100574a0c600e37548239adab Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 3 Feb 2021 17:14:40 +0100 Subject: testsuite: Add test for already fixed PR [PR97804] This testcase got fixed with the PR98463 r11-6895-g94ff4c9dd98f39280fba22d1ad0958fb25a5363b fix. 2021-02-03 Jakub Jelinek PR c++/97804 * g++.dg/cpp2a/no_unique_address11.C: New test. --- gcc/testsuite/g++.dg/cpp2a/no_unique_address11.C | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 gcc/testsuite/g++.dg/cpp2a/no_unique_address11.C (limited to 'gcc/testsuite') diff --git a/gcc/testsuite/g++.dg/cpp2a/no_unique_address11.C b/gcc/testsuite/g++.dg/cpp2a/no_unique_address11.C new file mode 100644 index 0000000..9ca6184 --- /dev/null +++ b/gcc/testsuite/g++.dg/cpp2a/no_unique_address11.C @@ -0,0 +1,18 @@ +// PR c++/97804 +// { dg-do compile { target c++17 } } + +template struct b { + constexpr b() : c() {} + [[no_unique_address]] a c; +}; +template struct d; +template +struct d : d<1, f...>, b {}; +template struct d : b {}; +template class h : d<0, g...> {}; +struct i {}; +class j { + using k = int; + h l; + float m = 0.025f; +} n; -- cgit v1.1