From 121308d427978857aade10a387e92f130d36cd75 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Thu, 20 Dec 2001 19:03:37 +0000 Subject: Fix prologue/epilogue generation for ARM ISR routines. Add test case to catch bugs reported in prologue/epilogue generation for ARM ISR routines. From-SVN: r48210 --- gcc/testsuite/gcc.misc-tests/arm-isr.c | 48 ++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 gcc/testsuite/gcc.misc-tests/arm-isr.c (limited to 'gcc/testsuite/gcc.misc-tests/arm-isr.c') diff --git a/gcc/testsuite/gcc.misc-tests/arm-isr.c b/gcc/testsuite/gcc.misc-tests/arm-isr.c new file mode 100644 index 0000000..f79e241 --- /dev/null +++ b/gcc/testsuite/gcc.misc-tests/arm-isr.c @@ -0,0 +1,48 @@ +#ifndef __thumb__ +/* There used to be a couple of bugs in the ARM's prologue and epilogue + generation for ISR routines. The wrong epilogue instruction would be + generated to restore the IP register if it had to be pushed onto the + stack, and the wrong offset was being computed for local variables if + r0 - r3 had to be saved. This tests for both of these cases. */ + +int z = 9; + +int +bar (void) +{ + return z; +} + +int +foo (int a, int b, int c, int d, int e, int f, int g, int h) +{ + volatile int i = (a + b) - (g + h) + bar (); + volatile int j = (e + f) - (c + d); + + return a + b + c + d + e + f + g + h + i + j; +} + +int foo1 (int a, int b, int c, int d, int e, int f, int g, int h) __attribute__ ((interrupt ("IRQ"))); + +int +foo1 (int a, int b, int c, int d, int e, int f, int g, int h) +{ + volatile int i = (a + b) - (g + h) + bar (); + volatile int j = (e + f) - (c + d); + + return a + b + c + d + e + f + g + h + i + j; +} +#endif + +int +main (void) +{ +#ifndef __thumb__ + if (foo (1, 2, 3, 4, 5, 6, 7, 8) != 32) + abort (); + + if (foo1 (1, 2, 3, 4, 5, 6, 7, 8) != 32) + abort (); +#endif + exit (0); +} -- cgit v1.1