From cf098191e47535b89373dccb9a2d3cc4a4ebaef7 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Wed, 3 Jan 2018 21:42:52 +0000 Subject: poly_int: GET_MODE_SIZE This patch changes GET_MODE_SIZE from unsigned short to poly_uint16. The non-mechanical parts were handled by previous patches. 2018-01-03 Richard Sandiford Alan Hayward David Sherwood gcc/ * machmode.h (mode_size): Change from unsigned short to poly_uint16_pod. (mode_to_bytes): Return a poly_uint16 rather than an unsigned short. (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES, or if measurement_type is not polynomial. (fixed_size_mode::includes_p): Check for constant-sized modes. * genmodes.c (emit_mode_size_inline): Make mode_size_inline return a poly_uint16 rather than an unsigned short. (emit_mode_size): Change the type of mode_size from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the initializer. (emit_mode_adjustments): Cope with polynomial vector sizes. * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value for GET_MODE_SIZE. * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value for GET_MODE_SIZE. * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial. * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise. * caller-save.c (setup_save_areas): Likewise. (replace_reg_with_saved_mem): Likewise. * calls.c (emit_library_call_value_1): Likewise. * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise. * combine.c (simplify_set, make_extraction, simplify_shift_const_1) (gen_lowpart_for_combine): Likewise. * convert.c (convert_to_integer_1): Likewise. * cse.c (equiv_constant, cse_insn): Likewise. * cselib.c (autoinc_split, cselib_hash_rtx): Likewise. (cselib_subst_to_values): Likewise. * dce.c (word_dce_process_block): Likewise. * df-problems.c (df_word_lr_mark_ref): Likewise. * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise. * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor) (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor) (rtl_for_decl_location): Likewise. * emit-rtl.c (gen_highpart, widen_memory_access): Likewise. * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise. * expr.c (emit_group_load_1, clear_storage_hints): Likewise. (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise. (expand_expr_real_1): Likewise. * function.c (assign_parm_setup_block_p, assign_parm_setup_block) (pad_below): Likewise. * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise. * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise. * ira.c (get_subreg_tracking_sizes): Likewise. * ira-build.c (ira_create_allocno_objects): Likewise. * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise. (ira_sort_regnos_for_alter_reg): Likewise. * ira-costs.c (record_operand_costs): Likewise. * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn) (resolve_simple_move): Likewise. * lra-constraints.c (get_reload_reg, operands_match_p): Likewise. (process_addr_reg, simplify_operand_subreg, curr_insn_transform) (lra_constraints): Likewise. (CONST_POOL_OK_P): Reject variable-sized modes. * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare) (add_pseudo_to_slot, lra_spill): Likewise. * omp-low.c (omp_clause_aligned_alignment): Likewise. * optabs-query.c (get_best_extraction_insn): Likewise. * optabs-tree.c (expand_vec_cond_expr_p): Likewise. * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise. (expand_mult_highpart, valid_multiword_target_p): Likewise. * recog.c (offsettable_address_addr_space_p): Likewise. * regcprop.c (maybe_mode_change): Likewise. * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise. * regrename.c (build_def_use): Likewise. * regstat.c (dump_reg_info): Likewise. * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload) (find_reloads, find_reloads_subreg_address): Likewise. * reload1.c (eliminate_regs_1): Likewise. * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise. * simplify-rtx.c (avoid_constant_pool_reference): Likewise. (simplify_binary_operation_1, simplify_subreg): Likewise. * targhooks.c (default_function_arg_padding): Likewise. (default_hard_regno_nregs, default_class_max_nregs): Likewise. * tree-cfg.c (verify_gimple_assign_binary): Likewise. (verify_gimple_assign_ternary): Likewise. * tree-inline.c (estimate_move_cost): Likewise. * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise. * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise. (get_address_cost_ainc): Likewise. * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise. (vect_supportable_dr_alignment): Likewise. * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise. (vectorizable_reduction): Likewise. * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift) (vectorizable_operation, vectorizable_load): Likewise. * tree.c (build_same_sized_truth_vector_type): Likewise. * valtrack.c (cleanup_auto_inc_dec): Likewise. * var-tracking.c (emit_note_insn_var_location): Likewise. * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a . (ADDR_VEC_ALIGN): Likewise. Co-Authored-By: Alan Hayward Co-Authored-By: David Sherwood From-SVN: r256201 --- gcc/simplify-rtx.c | 44 +++++++++++++++++++++++--------------------- 1 file changed, 23 insertions(+), 21 deletions(-) (limited to 'gcc/simplify-rtx.c') diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index a20782a..e7273a4 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -263,7 +263,7 @@ avoid_constant_pool_reference (rtx x) If that fails we have no choice but to return the original memory. */ if (offset == 0 && cmode == GET_MODE (x)) return c; - else if (offset >= 0 && offset < GET_MODE_SIZE (cmode)) + else if (known_in_range_p (offset, 0, GET_MODE_SIZE (cmode))) { rtx tem = simplify_subreg (GET_MODE (x), c, cmode, offset); if (tem && CONSTANT_P (tem)) @@ -3821,13 +3821,13 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, && GET_CODE (trueop0) == VEC_CONCAT) { rtx vec = trueop0; - int offset = INTVAL (XVECEXP (trueop1, 0, 0)) * GET_MODE_SIZE (mode); + offset = INTVAL (XVECEXP (trueop1, 0, 0)) * GET_MODE_SIZE (mode); /* Try to find the element in the VEC_CONCAT. */ while (GET_MODE (vec) != mode && GET_CODE (vec) == VEC_CONCAT) { - HOST_WIDE_INT vec_size; + poly_int64 vec_size; if (CONST_INT_P (XEXP (vec, 0))) { @@ -3842,13 +3842,15 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, else vec_size = GET_MODE_SIZE (GET_MODE (XEXP (vec, 0))); - if (offset < vec_size) + if (known_lt (offset, vec_size)) vec = XEXP (vec, 0); - else + else if (known_ge (offset, vec_size)) { offset -= vec_size; vec = XEXP (vec, 1); } + else + break; vec = avoid_constant_pool_reference (vec); } @@ -3917,8 +3919,9 @@ simplify_binary_operation_1 (enum rtx_code code, machine_mode mode, : GET_MODE_INNER (mode)); gcc_assert (VECTOR_MODE_P (mode)); - gcc_assert (GET_MODE_SIZE (op0_mode) + GET_MODE_SIZE (op1_mode) - == GET_MODE_SIZE (mode)); + gcc_assert (known_eq (GET_MODE_SIZE (op0_mode) + + GET_MODE_SIZE (op1_mode), + GET_MODE_SIZE (mode))); if (VECTOR_MODE_P (op0_mode)) gcc_assert (GET_MODE_INNER (mode) @@ -6315,10 +6318,12 @@ simplify_subreg (machine_mode outermode, rtx op, gcc_assert (GET_MODE (op) == innermode || GET_MODE (op) == VOIDmode); - if (!multiple_p (byte, GET_MODE_SIZE (outermode))) + poly_uint64 outersize = GET_MODE_SIZE (outermode); + if (!multiple_p (byte, outersize)) return NULL_RTX; - if (maybe_ge (byte, GET_MODE_SIZE (innermode))) + poly_uint64 innersize = GET_MODE_SIZE (innermode); + if (maybe_ge (byte, innersize)) return NULL_RTX; if (outermode == innermode && known_eq (byte, 0U)) @@ -6363,6 +6368,7 @@ simplify_subreg (machine_mode outermode, rtx op, if (GET_CODE (op) == SUBREG) { machine_mode innermostmode = GET_MODE (SUBREG_REG (op)); + poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode); rtx newx; if (outermode == innermostmode @@ -6380,12 +6386,10 @@ simplify_subreg (machine_mode outermode, rtx op, /* See whether resulting subreg will be paradoxical. */ if (!paradoxical_subreg_p (outermode, innermostmode)) { - /* In nonparadoxical subregs we can't handle negative offsets. */ - if (maybe_lt (final_offset, 0)) - return NULL_RTX; /* Bail out in case resulting subreg would be incorrect. */ - if (!multiple_p (final_offset, GET_MODE_SIZE (outermode)) - || maybe_ge (final_offset, GET_MODE_SIZE (innermostmode))) + if (maybe_lt (final_offset, 0) + || maybe_ge (poly_uint64 (final_offset), innermostsize) + || !multiple_p (final_offset, outersize)) return NULL_RTX; } else @@ -6410,9 +6414,8 @@ simplify_subreg (machine_mode outermode, rtx op, if (SUBREG_PROMOTED_VAR_P (op) && SUBREG_PROMOTED_SIGN (op) >= 0 && GET_MODE_CLASS (outermode) == MODE_INT - && IN_RANGE (GET_MODE_SIZE (outermode), - GET_MODE_SIZE (innermode), - GET_MODE_SIZE (innermostmode)) + && known_ge (outersize, innersize) + && known_le (outersize, innermostsize) && subreg_lowpart_p (newx)) { SUBREG_PROMOTED_VAR_P (newx) = 1; @@ -6462,7 +6465,7 @@ simplify_subreg (machine_mode outermode, rtx op, have instruction to move the whole thing. */ && (! MEM_VOLATILE_P (op) || ! have_insn_for (SET, innermode)) - && GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (GET_MODE (op))) + && known_le (outersize, innersize)) return adjust_address_nv (op, outermode, byte); /* Handle complex or vector values represented as CONCAT or VEC_CONCAT @@ -6470,14 +6473,13 @@ simplify_subreg (machine_mode outermode, rtx op, if (GET_CODE (op) == CONCAT || GET_CODE (op) == VEC_CONCAT) { - unsigned int part_size; poly_uint64 final_offset; rtx part, res; machine_mode part_mode = GET_MODE (XEXP (op, 0)); if (part_mode == VOIDmode) part_mode = GET_MODE_INNER (GET_MODE (op)); - part_size = GET_MODE_SIZE (part_mode); + poly_uint64 part_size = GET_MODE_SIZE (part_mode); if (known_lt (byte, part_size)) { part = XEXP (op, 0); @@ -6491,7 +6493,7 @@ simplify_subreg (machine_mode outermode, rtx op, else return NULL_RTX; - if (maybe_gt (final_offset + GET_MODE_SIZE (outermode), part_size)) + if (maybe_gt (final_offset + outersize, part_size)) return NULL_RTX; part_mode = GET_MODE (part); -- cgit v1.1