From cd5ff7bc323a8fa6eafc4513bc814e4e7fa24120 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Tue, 2 Jan 2018 18:28:14 +0000 Subject: Make CONST_VECTOR_ELT handle implicitly-encoded elements This patch makes CONST_VECTOR_ELT handle implicitly-encoded elements, in a similar way to VECTOR_CST_ELT. 2018-01-02 Richard Sandiford gcc/ * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt. (const_vector_encoded_nelts): New function. (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS. (const_vector_int_elt, const_vector_elt): Declare. * emit-rtl.c (const_vector_int_elt_1): New function. (const_vector_elt): Likewise. * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address of CONST_VECTOR_ELT. From-SVN: r256104 --- gcc/simplify-rtx.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'gcc/simplify-rtx.c') diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c index fd6cba7..22cabc5 100644 --- a/gcc/simplify-rtx.c +++ b/gcc/simplify-rtx.c @@ -5991,13 +5991,11 @@ simplify_immed_subreg (fixed_size_mode outermode, rtx op, if (GET_CODE (op) == CONST_VECTOR) { num_elem = CONST_VECTOR_NUNITS (op); - elems = &CONST_VECTOR_ELT (op, 0); elem_bitsize = GET_MODE_UNIT_BITSIZE (innermode); } else { num_elem = 1; - elems = &op; elem_bitsize = max_bitsize; } /* If this asserts, it is too complicated; reducing value_bit may help. */ @@ -6008,7 +6006,9 @@ simplify_immed_subreg (fixed_size_mode outermode, rtx op, for (elem = 0; elem < num_elem; elem++) { unsigned char * vp; - rtx el = elems[elem]; + rtx el = (GET_CODE (op) == CONST_VECTOR + ? CONST_VECTOR_ELT (op, elem) + : op); /* Vectors are kept in target memory order. (This is probably a mistake.) */ -- cgit v1.1