From 21b8482ae8289fccb3ddaaa74532995aa3f27c56 Mon Sep 17 00:00:00 2001 From: Janis Johnson Date: Tue, 4 Dec 2001 00:47:14 +0000 Subject: rtl.def (PREFETCH): New rtx code. * rtl.def (PREFETCH): New rtx code. * doc/rtl.texi (PREFETCH): Add documentation. * function.c (instantiate_virtual_regs_1): Handle PREFETCH rtx. * rtlanal.c (reg_referenced_p): Ditto. * sched-vis.c (print_exp): Ditto. * ssa-dce.c (find_inherently_necessary): Ditto. From-SVN: r47580 --- gcc/rtl.def | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'gcc/rtl.def') diff --git a/gcc/rtl.def b/gcc/rtl.def index 6c887bc..786b940 100644 --- a/gcc/rtl.def +++ b/gcc/rtl.def @@ -514,6 +514,17 @@ DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x') DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eEee0", 'x') +/* Memory prefetch, with attributes supported on some targets. + Operand 1 is the address of the memory to fetch. + Operand 2 is 1 for a write access, 0 otherwise. + Operand 3 is the level of temporal locality; 0 means there is no + temporal locality and 1, 2, and 3 are for increasing levels of temporal + locality. + + The attributes specified by operands 2 and 3 are ignored for targets + whose prefetch instructions do not support them. */ +DEF_RTL_EXPR(PREFETCH, "prefetch", "eee", 'x') + /* ---------------------------------------------------------------------- At the top level of an instruction (perhaps under PARALLEL). ---------------------------------------------------------------------- */ -- cgit v1.1