From 3c04df53d4a3293961c0322fcb6f15a03aaa781a Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Thu, 21 Nov 2019 18:09:57 +0100 Subject: backport: re PR middle-end/91623 (-msse4.1 -O3 segfault in /usr/lib/gcc/x86_64-pc-linux-gnu/8.3.0/include/smmintrin.h:270:10) Backported from mainline 2019-09-01 Jakub Jelinek PR middle-end/91623 * optabs.c (expand_vec_cond_expr): If op0 is a VECTOR_CST and only EQ_EXPR/NE_EXPR is supported, verify that op0 only contains zeros or negative elements and use NE_EXPR instead of LT_EXPR against zero vector. * gcc.target/i386/pr91623.c: New test. From-SVN: r278574 --- gcc/optabs.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'gcc/optabs.c') diff --git a/gcc/optabs.c b/gcc/optabs.c index b31016c..a74d7be 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -5778,6 +5778,25 @@ expand_vec_cond_expr (tree vec_cond_type, tree op0, tree op1, tree op2, icode = get_vcond_icode (mode, cmp_op_mode, unsignedp); if (icode == CODE_FOR_nothing) { + if (tcode == LT_EXPR + && op0a == op0 + && TREE_CODE (op0) == VECTOR_CST) + { + /* A VEC_COND_EXPR condition could be folded from EQ_EXPR/NE_EXPR + into a constant when only get_vcond_eq_icode is supported. + Verify < 0 and != 0 behave the same and change it to NE_EXPR. */ + unsigned HOST_WIDE_INT nelts; + if (!VECTOR_CST_NELTS (op0).is_constant (&nelts)) + { + if (VECTOR_CST_STEPPED_P (op0)) + return 0; + nelts = vector_cst_encoded_nelts (op0); + } + for (unsigned int i = 0; i < nelts; ++i) + if (tree_int_cst_sgn (vector_cst_elt (op0, i)) == 1) + return 0; + tcode = NE_EXPR; + } if (tcode == EQ_EXPR || tcode == NE_EXPR) icode = get_vcond_eq_icode (mode, cmp_op_mode); if (icode == CODE_FOR_nothing) -- cgit v1.1