From b28ece323223adc71ea3c6d924d946ae67186153 Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Fri, 23 Nov 2012 01:29:07 +0000 Subject: re PR middle-end/55430 (LRA miscompilation of ree.c) 2012-11-22 Vladimir Makarov PR middle-end/55430 * lra.c: Move #include "hard-reg-set.h" before #include "rtl.h". (new_insn_reg): Update biggest_mode. (collect_non_operand_hard_regs): Check eliminable regs too. (initialize_lra_reg_info_element): Initialize biggest_mode. (add_regs_to_insn_regno_info): Ignore non-allocatable non-eliminable hard regs. (lra.c): Move setting lra_no_alloc_regs before init_insn_recog_data. * lra-constraints.c (simplify_operand_subreg): Add a comment. (lra_constraints): Ignore equivalent memory of regs occuring in paradoxical subregs. * lra-lives.c (lra_create_live_ranges): Add a comment. From-SVN: r193742 --- gcc/lra-constraints.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'gcc/lra-constraints.c') diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 7fbd3d5..e381c70 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -1146,7 +1146,12 @@ simplify_operand_subreg (int nop, enum machine_mode reg_mode) reg = SUBREG_REG (operand); /* If we change address for paradoxical subreg of memory, the address might violate the necessary alignment or the access might - be slow. So take this into consideration. */ + be slow. So take this into consideration. We should not worry + about access beyond allocated memory for paradoxical memory + subregs as we don't substitute such equiv memory (see processing + equivalences in function lra_constraints) and because for spilled + pseudos we allocate stack memory enough for the biggest + corresponding paradoxical subreg. */ if ((MEM_P (reg) && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (reg)) || MEM_ALIGN (reg) >= GET_MODE_ALIGNMENT (mode))) @@ -3363,7 +3368,12 @@ lra_constraints (bool first_p) && (set = single_set (insn)) != NULL_RTX && REG_P (SET_DEST (set)) && (int) REGNO (SET_DEST (set)) == i) - && init_insn_rhs_dead_pseudo_p (i))) + && init_insn_rhs_dead_pseudo_p (i)) + /* Prevent access beyond equivalent memory for + paradoxical subregs. */ + || (MEM_P (x) + && (GET_MODE_SIZE (lra_reg_info[i].biggest_mode) + > GET_MODE_SIZE (GET_MODE (x))))) ira_reg_equiv[i].defined_p = false; if (contains_reg_p (x, false, true)) ira_reg_equiv[i].profitable_p = false; -- cgit v1.1