From 818b3293f4545d899148810f4f7d676b81e989dd Mon Sep 17 00:00:00 2001 From: Joel Hutton Date: Mon, 4 Nov 2019 16:39:32 +0000 Subject: [SLP] SLP vectorization: vectorize vector constructors gcc/ChangeLog: 2019-11-04 Joel Hutton * expr.c (store_constructor): Modify to handle single element vectors. * tree-vect-slp.c (vect_analyze_slp_instance): Add case for vector constructors. (vect_slp_check_for_constructors): New function. (vect_slp_analyze_bb_1): Call new function to check for vector constructors. (vectorize_slp_instance_root_stmt): New function. (vect_schedule_slp): Call new function to vectorize root stmt of vector constructors. * tree-vectorizer.h (SLP_INSTANCE_ROOT_STMT): New field. gcc/testsuite/ChangeLog: 2019-11-04 Joel Hutton * gcc.dg/vect/bb-slp-40.c: New test. * gcc.dg/vect/bb-slp-41.c: New test. From-SVN: r277784 --- gcc/expr.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'gcc/expr.c') diff --git a/gcc/expr.c b/gcc/expr.c index 476c686..12165af 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -6809,6 +6809,7 @@ store_constructor (tree exp, rtx target, int cleared, poly_int64 size, && n_elts.is_constant (&const_n_elts)) { machine_mode emode = eltmode; + bool vector_typed_elts_p = false; if (CONSTRUCTOR_NELTS (exp) && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value)) @@ -6819,13 +6820,14 @@ store_constructor (tree exp, rtx target, int cleared, poly_int64 size, * TYPE_VECTOR_SUBPARTS (etype), n_elts)); emode = TYPE_MODE (etype); + vector_typed_elts_p = true; } icode = convert_optab_handler (vec_init_optab, mode, emode); if (icode != CODE_FOR_nothing) { unsigned int n = const_n_elts; - if (emode != eltmode) + if (vector_typed_elts_p) { n = CONSTRUCTOR_NELTS (exp); vec_vec_init_p = true; -- cgit v1.1 From 3619076a631eac18c0484acf6dff3e5e94b8e251 Mon Sep 17 00:00:00 2001 From: Matthew Malcomson Date: Tue, 5 Nov 2019 15:36:20 +0000 Subject: [mid-end] Fix declared type of personality functions `build_personality_function` generates a declaration for a personality function. The type it declares for these functions doesn't match the type of the actual personality functions that are defined by the C++ unwinding ABI. This doesn't cause any crashes since the compiler never generates a call to these decl's, and hence the type of the function is never used. Nonetheless, for the sake of consistency and readability we update the type of this declaration. gcc/ChangeLog: 2019-11-05 Matthew Malcomson * expr.c (build_personality_function): Fix generated type to match actual personality functions. From-SVN: r277846 --- gcc/expr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'gcc/expr.c') diff --git a/gcc/expr.c b/gcc/expr.c index 12165af..06e934e 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -12554,7 +12554,8 @@ build_personality_function (const char *lang) name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL)); - type = build_function_type_list (integer_type_node, integer_type_node, + type = build_function_type_list (unsigned_type_node, + integer_type_node, integer_type_node, long_long_unsigned_type_node, ptr_type_node, ptr_type_node, NULL_TREE); decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL, -- cgit v1.1 From a81ffd93b83c4be250514ff385b5b88fa5c3835b Mon Sep 17 00:00:00 2001 From: Jim Wilson Date: Tue, 5 Nov 2019 22:34:40 +0000 Subject: Allow libcalls for complex memcpy when optimizing for size. The RISC-V backend wants to use a libcall when optimizing for size if more than 6 instructions are needed. Emit_move_complex asks for no libcalls. This case requires 8 insns for rv64 and 16 insns for rv32, so we get fallback code that emits a loop. Commit_one_edge_insertion doesn't allow code inserted for a phi node on an edge to end with a branch, and so this triggers an assertion. This problem goes away if we allow libcalls when optimizing for size, which gives the code the RISC-V backend wants, and avoids triggering the assert. gcc/ PR middle-end/92263 * expr.c (emit_move_complex): Only use BLOCK_OP_NO_LIBCALL when optimize_insn_for_speed_p is true. gcc/testsuite/ PR middle-end/92263 * gcc.dg/pr92263.c: New. From-SVN: r277861 --- gcc/expr.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'gcc/expr.c') diff --git a/gcc/expr.c b/gcc/expr.c index 06e934e..0fd5890f 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -3571,11 +3571,13 @@ emit_move_complex (machine_mode mode, rtx x, rtx y) rtx_insn *ret; /* For memory to memory moves, optimal behavior can be had with the - existing block move logic. */ + existing block move logic. But use normal expansion if optimizing + for size. */ if (MEM_P (x) && MEM_P (y)) { emit_block_move (x, y, gen_int_mode (GET_MODE_SIZE (mode), Pmode), - BLOCK_OP_NO_LIBCALL); + (optimize_insn_for_speed_p() + ? BLOCK_OP_NO_LIBCALL : BLOCK_OP_NORMAL)); return get_last_insn (); } -- cgit v1.1 From 9c437a108a14b9bdc44659c131b0da944e5ffeab Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 14 Nov 2019 15:31:25 +0000 Subject: Vectorise conversions between differently-sized integer vectors This patch adds AArch64 patterns for converting between 64-bit and 128-bit integer vectors, and makes the vectoriser and expand pass use them. 2019-11-14 Richard Sandiford gcc/ * tree-cfg.c (verify_gimple_assign_unary): Handle conversions between vector types. * tree-vect-stmts.c (vectorizable_conversion): Extend the non-widening and non-narrowing path to handle standard conversion codes, if the target supports them. * expr.c (convert_move): Try using the extend and truncate optabs for vectors. * optabs-tree.c (supportable_convert_operation): Likewise. * config/aarch64/iterators.md (Vnarroqw): New iterator. * config/aarch64/aarch64-simd.md (2) (trunc2): New patterns. gcc/testsuite/ * gcc.dg/vect/bb-slp-pr69907.c: Do not expect BB vectorization to fail for aarch64 targets. * gcc.dg/vect/no-scevccp-outer-12.c: Expect the test to pass on aarch64 targets. * gcc.dg/vect/vect-double-reduc-5.c: Likewise. * gcc.dg/vect/vect-outer-4e.c: Likewise. * gcc.target/aarch64/vect_mixed_sizes_5.c: New test. * gcc.target/aarch64/vect_mixed_sizes_6.c: Likewise. * gcc.target/aarch64/vect_mixed_sizes_7.c: Likewise. * gcc.target/aarch64/vect_mixed_sizes_8.c: Likewise. * gcc.target/aarch64/vect_mixed_sizes_9.c: Likewise. * gcc.target/aarch64/vect_mixed_sizes_10.c: Likewise. * gcc.target/aarch64/vect_mixed_sizes_11.c: Likewise. * gcc.target/aarch64/vect_mixed_sizes_12.c: Likewise. * gcc.target/aarch64/vect_mixed_sizes_13.c: Likewise. From-SVN: r278245 --- gcc/expr.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'gcc/expr.c') diff --git a/gcc/expr.c b/gcc/expr.c index 0fd5890f..ed50586 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -250,6 +250,31 @@ convert_move (rtx to, rtx from, int unsignedp) if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode)) { + if (GET_MODE_UNIT_PRECISION (to_mode) + > GET_MODE_UNIT_PRECISION (from_mode)) + { + optab op = unsignedp ? zext_optab : sext_optab; + insn_code icode = convert_optab_handler (op, to_mode, from_mode); + if (icode != CODE_FOR_nothing) + { + emit_unop_insn (icode, to, from, + unsignedp ? ZERO_EXTEND : SIGN_EXTEND); + return; + } + } + + if (GET_MODE_UNIT_PRECISION (to_mode) + < GET_MODE_UNIT_PRECISION (from_mode)) + { + insn_code icode = convert_optab_handler (trunc_optab, + to_mode, from_mode); + if (icode != CODE_FOR_nothing) + { + emit_unop_insn (icode, to, from, TRUNCATE); + return; + } + } + gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode), GET_MODE_BITSIZE (to_mode))); -- cgit v1.1 From ea37206decb6b4df127e65af206c58e6fc3ae60a Mon Sep 17 00:00:00 2001 From: Eric Botcazou Date: Sat, 7 Dec 2019 12:20:44 +0000 Subject: re PR middle-end/90840 (ICE in simplify_subreg, at simplify-rtx.c:6441) PR middle-end/90840 * expr.c (expand_assignment): In the case of a CONCAT on the LHS, make sure to pass a valid inner mode in calls to simplify_gen_subreg. From-SVN: r279076 --- gcc/expr.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'gcc/expr.c') diff --git a/gcc/expr.c b/gcc/expr.c index ed50586..20aa939 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -5285,13 +5285,16 @@ expand_assignment (tree to, tree from, bool nontemporal) } else { + machine_mode from_mode + = GET_MODE (result) == VOIDmode + ? TYPE_MODE (TREE_TYPE (from)) + : GET_MODE (result); rtx from_rtx; if (MEM_P (result)) from_rtx = change_address (result, to_mode, NULL_RTX); else from_rtx - = simplify_gen_subreg (to_mode, result, - TYPE_MODE (TREE_TYPE (from)), 0); + = simplify_gen_subreg (to_mode, result, from_mode, 0); if (from_rtx) { emit_move_insn (XEXP (to_rtx, 0), @@ -5303,12 +5306,9 @@ expand_assignment (tree to, tree from, bool nontemporal) { to_mode = GET_MODE_INNER (to_mode); rtx from_real - = simplify_gen_subreg (to_mode, result, - TYPE_MODE (TREE_TYPE (from)), - 0); + = simplify_gen_subreg (to_mode, result, from_mode, 0); rtx from_imag - = simplify_gen_subreg (to_mode, result, - TYPE_MODE (TREE_TYPE (from)), + = simplify_gen_subreg (to_mode, result, from_mode, GET_MODE_SIZE (to_mode)); if (!from_real || !from_imag) goto concat_store_slow; -- cgit v1.1