From 1e0598e25c07970f830bb52f2ae75c7007dea4b4 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Wed, 22 Dec 2004 23:58:41 -0800 Subject: optabs.h (OTI_movmisalign, [...]): New. * optabs.h (OTI_movmisalign, movmisalign_optab): New. * optabs.c (init_optabs): Create it. * genopinit.c (optabs): Initialize it. * expr.c (expand_expr_real_1) : Use it. * tree-vectorizer.c (vect_supportable_dr_alignment): Likewise. * target-def.h (TARGET_VECTORIZE_MISALIGNED_MEM_OK): Remove. * target.h (vectorize.misaligned_mem_ok): Remove. * targhooks.c (default_vect_misaligned_mem_ok): Remove. * doc/md.texi (movmisalign): New. * doc/tm.texi (TARGET_VECTORIZE_MISALIGNED_MEM_OK): Remove. From-SVN: r92537 --- gcc/expr.c | 31 +++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) (limited to 'gcc/expr.c') diff --git a/gcc/expr.c b/gcc/expr.c index 3a09222..d69a8df 100644 --- a/gcc/expr.c +++ b/gcc/expr.c @@ -6697,10 +6697,6 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, tree exp1 = TREE_OPERAND (exp, 0); tree orig; - if (code == MISALIGNED_INDIRECT_REF - && !targetm.vectorize.misaligned_mem_ok (mode)) - abort (); - if (modifier != EXPAND_WRITE) { tree t; @@ -6727,6 +6723,33 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode, orig = exp; set_mem_attributes (temp, orig, 0); + /* Resolve the misalignment now, so that we don't have to remember + to resolve it later. Of course, this only works for reads. */ + /* ??? When we get around to supporting writes, we'll have to handle + this in store_expr directly. The vectorizer isn't generating + those yet, however. */ + if (code == MISALIGNED_INDIRECT_REF) + { + int icode; + rtx reg, insn; + + gcc_assert (modifier == EXPAND_NORMAL); + + /* The vectorizer should have already checked the mode. */ + icode = movmisalign_optab->handlers[mode].insn_code; + gcc_assert (icode != CODE_FOR_nothing); + + /* We've already validated the memory, and we're creating a + new pseudo destination. The predicates really can't fail. */ + reg = gen_reg_rtx (mode); + + /* Nor can the insn generator. */ + insn = GEN_FCN (icode) (reg, temp); + emit_insn (insn); + + return reg; + } + return temp; } -- cgit v1.1