From 30c0ee9ca68e62a066f2653da11c50f708666857 Mon Sep 17 00:00:00 2001 From: Matthew Fortune Date: Wed, 13 Jun 2018 20:40:28 +0000 Subject: MIPS: Add support for P6600. gcc/ChangeLog: 2018-06-13 Matthew Fortune Prachi Godbole * config/mips/mips-cpus.def: Define P6600. * config/mips/mips-tables.opt: Regenerate. * config/mips/mips.c (mips_ucbranch_type): New enum. (mips_rtx_cost_data): Add support for P6600. (mips_issue_rate): Likewise. (mips_multipass_dfa_lookahead): Likewise. (mips_avoid_hazard): Likewise. (mips_reorg_process_insns): Likewise. (mips_classify_branch_p6600): New function. * config/mips/mips.h (TUNE_P6600): New define. (MIPS_ISA_LEVEL_SPEC): Infer mips64r6 from p6600. (ENABLE_LD_ST_PAIRS): Enable load/store bonding for p6600. * config/mips/mips.md: Include p6600.md. (processor): Add p6600. * config/mips/p6600.md: New file. * doc/invoke.texi: Add p6600 to supported architectures. Co-Authored-By: Prachi Godbole From-SVN: r261570 --- gcc/doc/invoke.texi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'gcc/doc') diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index eb33b56..940b846 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -20112,7 +20112,7 @@ The processor names are: @samp{m5100}, @samp{m5101}, @samp{octeon}, @samp{octeon+}, @samp{octeon2}, @samp{octeon3}, @samp{orion}, -@samp{p5600}, +@samp{p5600}, @samp{p6600}, @samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400}, @samp{r4600}, @samp{r4650}, @samp{r4700}, @samp{r6000}, @samp{r8000}, @samp{rm7000}, @samp{rm9000}, -- cgit v1.1