From ed15c5984e10f6556dffdf397accff804bf60a7c Mon Sep 17 00:00:00 2001 From: Kito Cheng Date: Fri, 2 May 2014 06:03:22 +0000 Subject: defaults.h (HONOR_REG_ALLOC_ORDER): Change HONOR_REG_ALLOC_ORDER to a C expression marco. 2014-02-26 Kito Cheng * defaults.h (HONOR_REG_ALLOC_ORDER): Change HONOR_REG_ALLOC_ORDER to a C expression marco. * ira-color.c (HONOR_REG_ALLOC_ORDER) : Ditto. * config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Ditto. * config/nds32/nds32.h (HONOR_REG_ALLOC_ORDER): Ditto. * doc/tm.texi (HONOR_REG_ALLOC_ORDER): Update document for HONOR_REG_ALLOC_ORDER. * doc/tm.texi.in (HONOR_REG_ALLOC_ORDER): Ditto. From-SVN: r210000 --- gcc/doc/tm.texi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'gcc/doc/tm.texi') diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index b8ca17e..ed35bcb 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -2044,8 +2044,8 @@ Normally, IRA tries to estimate the costs for saving a register in the prologue and restoring it in the epilogue. This discourages it from using call-saved registers. If a machine wants to ensure that IRA allocates registers in the order given by REG_ALLOC_ORDER even if some -call-saved registers appear earlier than call-used ones, this macro -should be defined. +call-saved registers appear earlier than call-used ones, then define this +macro as a C expression to nonzero. Default is 0. @end defmac @defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno}) -- cgit v1.1