From d63d9c3dd160dce24f0209f193b8e7388b19f712 Mon Sep 17 00:00:00 2001 From: Richard Biener Date: Thu, 20 Jan 2022 14:34:33 +0100 Subject: target/100784 - avoid ICE with folding __builtin_ia32_shufpd This avoids ICEing when there is no LHS on the call by following what foldings of other builtins do in , namely not folding. 2022-01-20 Richard Biener PR target/100784 * config/i386/i386.cc (ix86_gimple_fold_builtin): Check for LHS before folding __builtin_ia32_shufpd and friends. --- gcc/config/i386/i386.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'gcc/config') diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc index af82886..ad5a5ca 100644 --- a/gcc/config/i386/i386.cc +++ b/gcc/config/i386/i386.cc @@ -18710,7 +18710,7 @@ ix86_gimple_fold_builtin (gimple_stmt_iterator *gsi) gimple_call_arg (stmt, n_args - 1))) break; arg2 = gimple_call_arg (stmt, 2); - if (TREE_CODE (arg2) == INTEGER_CST) + if (TREE_CODE (arg2) == INTEGER_CST && gimple_call_lhs (stmt)) { unsigned HOST_WIDE_INT shuffle_mask = TREE_INT_CST_LOW (arg2); /* Check valid imm, refer to gcc.target/i386/testimm-10.c. */ -- cgit v1.1 From 9d7a84b96980d357bb9a3d368044fb18aab4aade Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Fri, 21 Jan 2022 12:09:34 +0000 Subject: [ARM] Add support for TLS register based stack protector canary access Add support for accessing the stack canary value via the TLS register, so that multiple threads running in the same address space can use distinct canary values. This is intended for the Linux kernel running in SMP mode, where processes entering the kernel are essentially threads running the same program concurrently: using a global variable for the canary in that context is problematic because it can never be rotated, and so the OS is forced to use the same value as long as it remains up. Using the TLS register to index the stack canary helps with this, as it allows each CPU to context switch the TLS register along with the rest of the process, permitting each process to use its own value for the stack canary. gcc/ChangeLog: * config/arm/arm-opts.h (enum stack_protector_guard): New. * config/arm/arm-protos.h (arm_stack_protect_tls_canary_mem): New. * config/arm/arm.cc (TARGET_STACK_PROTECT_GUARD): Define. (arm_option_override_internal): Handle and put in error checks. for stack protector guard options. (arm_option_reconfigure_globals): Likewise. (arm_stack_protect_tls_canary_mem): New. (arm_stack_protect_guard): New. * config/arm/arm.md (stack_protect_set): New. (stack_protect_set_tls): Likewise. (stack_protect_test): Likewise. (stack_protect_test_tls): Likewise. (reload_tp_hard): Likewise. * config/arm/arm.opt (-mstack-protector-guard): New (-mstack-protector-guard-offset): New. * doc/invoke.texi: Document new options. gcc/testsuite/ChangeLog: * gcc.target/arm/stack-protector-7.c: New test. * gcc.target/arm/stack-protector-8.c: New test. --- gcc/config/arm/arm-opts.h | 6 ++++ gcc/config/arm/arm-protos.h | 2 ++ gcc/config/arm/arm.cc | 55 +++++++++++++++++++++++++++++++++++ gcc/config/arm/arm.md | 71 +++++++++++++++++++++++++++++++++++++++++++-- gcc/config/arm/arm.opt | 22 ++++++++++++++ 5 files changed, 154 insertions(+), 2 deletions(-) (limited to 'gcc/config') diff --git a/gcc/config/arm/arm-opts.h b/gcc/config/arm/arm-opts.h index c50d5e5..24d12fa 100644 --- a/gcc/config/arm/arm-opts.h +++ b/gcc/config/arm/arm-opts.h @@ -69,4 +69,10 @@ enum arm_tls_type { TLS_GNU, TLS_GNU2 }; + +/* Where to get the canary for the stack protector. */ +enum stack_protector_guard { + SSP_TLSREG, /* per-thread canary in TLS register */ + SSP_GLOBAL /* global canary */ +}; #endif diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index cd55a9f..881c72c 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -195,6 +195,8 @@ extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx); extern rtx arm_load_tp (rtx); extern bool arm_coproc_builtin_available (enum unspecv); extern bool arm_coproc_ldc_stc_legitimate_address (rtx); +extern rtx arm_stack_protect_tls_canary_mem (bool); + #if defined TREE_CODE extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); diff --git a/gcc/config/arm/arm.cc b/gcc/config/arm/arm.cc index 04354b3..663f459 100644 --- a/gcc/config/arm/arm.cc +++ b/gcc/config/arm/arm.cc @@ -829,6 +829,9 @@ static const struct attribute_spec arm_attribute_table[] = #undef TARGET_MD_ASM_ADJUST #define TARGET_MD_ASM_ADJUST arm_md_asm_adjust + +#undef TARGET_STACK_PROTECT_GUARD +#define TARGET_STACK_PROTECT_GUARD arm_stack_protect_guard /* Obstack for minipool constant handling. */ static struct obstack minipool_obstack; @@ -3176,6 +3179,26 @@ arm_option_override_internal (struct gcc_options *opts, if (TARGET_THUMB2_P (opts->x_target_flags)) opts->x_inline_asm_unified = true; + if (arm_stack_protector_guard == SSP_GLOBAL + && opts->x_arm_stack_protector_guard_offset_str) + { + error ("incompatible options %'-mstack-protector-guard=global%' and" + "%'-mstack-protector-guard-offset=%qs%'", + arm_stack_protector_guard_offset_str); + } + + if (opts->x_arm_stack_protector_guard_offset_str) + { + char *end; + const char *str = arm_stack_protector_guard_offset_str; + errno = 0; + long offs = strtol (arm_stack_protector_guard_offset_str, &end, 0); + if (!*str || *end || errno) + error ("%qs is not a valid offset in %qs", str, + "-mstack-protector-guard-offset="); + arm_stack_protector_guard_offset = offs; + } + #ifdef SUBTARGET_OVERRIDE_INTERNAL_OPTIONS SUBTARGET_OVERRIDE_INTERNAL_OPTIONS; #endif @@ -3852,6 +3875,9 @@ arm_option_reconfigure_globals (void) else target_thread_pointer = TP_SOFT; } + + if (!TARGET_HARD_TP && arm_stack_protector_guard == SSP_TLSREG) + error("%'-mstack-protector-guard=tls%' needs a hardware TLS register"); } /* Perform some validation between the desired architecture and the rest of the @@ -8117,6 +8143,23 @@ legitimize_pic_address (rtx orig, machine_mode mode, rtx reg, rtx pic_reg, } +/* Generate insns that produce the address of the stack canary */ +rtx +arm_stack_protect_tls_canary_mem (bool reload) +{ + rtx tp = gen_reg_rtx (SImode); + if (reload) + emit_insn (gen_reload_tp_hard (tp)); + else + emit_insn (gen_load_tp_hard (tp)); + + rtx reg = gen_reg_rtx (SImode); + rtx offset = GEN_INT (arm_stack_protector_guard_offset); + emit_set_insn (reg, gen_rtx_PLUS (SImode, tp, offset)); + return gen_rtx_MEM (SImode, reg); +} + + /* Whether a register is callee saved or not. This is necessary because high registers are marked as caller saved when optimizing for size on Thumb-1 targets despite being callee saved in order to avoid using them. */ @@ -34084,6 +34127,18 @@ arm_run_selftests (void) #define TARGET_RUN_TARGET_SELFTESTS selftest::arm_run_selftests #endif /* CHECKING_P */ +/* Implement TARGET_STACK_PROTECT_GUARD. In case of a + global variable based guard use the default else + return a null tree. */ +static tree +arm_stack_protect_guard (void) +{ + if (arm_stack_protector_guard == SSP_GLOBAL) + return default_stack_protect_guard (); + + return NULL_TREE; +} + /* Worker function for TARGET_MD_ASM_ADJUST, while in thumb1 mode. Unlike the arm version, we do NOT implement asm flag outputs. */ diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 90756fb..60468f6 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -9183,7 +9183,7 @@ UNSPEC_SP_SET)) (clobber (match_scratch:SI 2 "")) (clobber (match_scratch:SI 3 ""))])] - "" + "arm_stack_protector_guard == SSP_GLOBAL" "" ) @@ -9267,7 +9267,7 @@ (clobber (match_scratch:SI 3 "")) (clobber (match_scratch:SI 4 "")) (clobber (reg:CC CC_REGNUM))])] - "" + "arm_stack_protector_guard == SSP_GLOBAL" "" ) @@ -9361,6 +9361,64 @@ (set_attr "arch" "t,32")] ) +(define_expand "stack_protect_set" + [(match_operand:SI 0 "memory_operand") + (match_operand:SI 1 "memory_operand")] + "arm_stack_protector_guard == SSP_TLSREG" + " +{ + operands[1] = arm_stack_protect_tls_canary_mem (false /* reload */); + emit_insn (gen_stack_protect_set_tls (operands[0], operands[1])); + DONE; +}" +) + +;; DO NOT SPLIT THIS PATTERN. It is important for security reasons that the +;; canary value does not live beyond the life of this sequence. +(define_insn "stack_protect_set_tls" + [(set (match_operand:SI 0 "memory_operand" "=m") + (unspec:SI [(match_operand:SI 1 "memory_operand" "m")] + UNSPEC_SP_SET)) + (set (match_scratch:SI 2 "=&r") (const_int 0))] + "" + "ldr\\t%2, %1\;str\\t%2, %0\;mov\t%2, #0" + [(set_attr "length" "12") + (set_attr "conds" "unconditional") + (set_attr "type" "multiple")] +) + +(define_expand "stack_protect_test" + [(match_operand:SI 0 "memory_operand") + (match_operand:SI 1 "memory_operand") + (match_operand:SI 2)] + "arm_stack_protector_guard == SSP_TLSREG" + " +{ + operands[1] = arm_stack_protect_tls_canary_mem (true /* reload */); + emit_insn (gen_stack_protect_test_tls (operands[0], operands[1])); + + rtx cc_reg = gen_rtx_REG (CC_Zmode, CC_REGNUM); + rtx eq = gen_rtx_EQ (CC_Zmode, cc_reg, const0_rtx); + emit_jump_insn (gen_arm_cond_branch (operands[2], eq, cc_reg)); + DONE; +}" +) + +(define_insn "stack_protect_test_tls" + [(set (reg:CC_Z CC_REGNUM) + (compare:CC_Z (unspec:SI [(match_operand:SI 0 "memory_operand" "m") + (match_operand:SI 1 "memory_operand" "m")] + UNSPEC_SP_TEST) + (const_int 0))) + (clobber (match_scratch:SI 2 "=&r")) + (clobber (match_scratch:SI 3 "=&r"))] + "" + "ldr\t%2, %0\;ldr\t%3, %1\;eors\t%2, %3, %2\;mov\t%3, #0" + [(set_attr "length" "16") + (set_attr "conds" "set") + (set_attr "type" "multiple")] +) + (define_expand "casesi" [(match_operand:SI 0 "s_register_operand") ; index to jump on (match_operand:SI 1 "const_int_operand") ; lower bound @@ -12133,6 +12191,15 @@ (set_attr "type" "mrs")] ) +;; Used by the TLS register based stack protector +(define_insn "reload_tp_hard" + [(set (match_operand:SI 0 "register_operand" "=r") + (unspec_volatile:SI [(const_int 0)] VUNSPEC_MRC))] + "TARGET_HARD_TP" + "mrc\\tp15, 0, %0, c13, c0, 3\\t@ reload_tp_hard" + [(set_attr "type" "mrs")] +) + ;; Doesn't clobber R1-R3. Must use r0 for the first operand. (define_insn "load_tp_soft_fdpic" [(set (reg:SI 0) (unspec:SI [(const_int 0)] UNSPEC_TLS)) diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 2a4f165..cc16534 100644 --- a/gcc/config/arm/arm.opt +++ b/gcc/config/arm/arm.opt @@ -321,3 +321,25 @@ Generate code which uses the core registers only (r0-r14). mfdpic Target Mask(FDPIC) Enable Function Descriptor PIC mode. + +mstack-protector-guard= +Target RejectNegative Joined Enum(stack_protector_guard) Var(arm_stack_protector_guard) Init(SSP_GLOBAL) +Use given stack-protector guard. + +Enum +Name(stack_protector_guard) Type(enum stack_protector_guard) +Valid arguments to -mstack-protector-guard=: + +EnumValue +Enum(stack_protector_guard) String(tls) Value(SSP_TLSREG) + +EnumValue +Enum(stack_protector_guard) String(global) Value(SSP_GLOBAL) + +mstack-protector-guard-offset= +Target Joined RejectNegative String Var(arm_stack_protector_guard_offset_str) +Use an immediate to offset from the TLS register. This option is for use with +fstack-protector-guard=tls and not for use in user-land code. + +TargetVariable +long arm_stack_protector_guard_offset = 0 -- cgit v1.1 From 886e9779581102caf97cd05dea80d9be87c24784 Mon Sep 17 00:00:00 2001 From: Roger Sayle Date: Fri, 21 Jan 2022 18:42:30 +0000 Subject: PR middle-end/104140: bootstrap ICE on riscv. This patch resolves the P1 "ice-on-valid-code" regression boostrapping GCC on risv-unknown-linux-gnu caused by my recent MULT_HIGHPART_EXPR functionality. RISC-V differs from x86_64 and many targets by supporting a usmusidi3 instruction, basically a widening multiply where one operand is signed and the other is unsigned. Alas the final version of my patch to recognize MULT_HIGHPART_EXPR didn't sufficiently defend against the operands of WIDEN_MULT_EXPR having different signedness. This is fixed by the two-line change to tree-ssa-math-opts.cc's convert_mult_to_highpart in the patch below. The majority of the rest of the patch is to the documentation (in tree.def and generic.texi). It turns out that WIDEN_MULT_EXPR wasn't previously documented in generic.texi, let alone the slightly unusual semantics of allowing mismatched (signed vs unsigned) operands. This also clarifies that MULT_HIGHPART_EXPR currently requires the signedness of operands to match [but this might change in a future release of GCC to support targets with usmul3_highpart]. The one final chunk of this patch (that is hopefully sufficiently close to obvious for stage 4) is a similar (NULL pointer) sanity check in riscv_cpu_cpp_builtins. Currently running cc1 from the command line (or from gdb) without specifying -march results in a segmentation fault (ICE). This is a minor annoyance tracking down issues (in cross compilers) for riscv, and trivially fixed as below. 2022-01-22 Roger Sayle gcc/ChangeLog PR middle-end/104140 * tree-ssa-math-opts.cc (convert_mult_to_highpart): Check that the operands of the widening multiplication are either both signed or both unsigned, and abort the conversion if mismatched. * doc/generic.texi (WIDEN_MULT_EXPR): Describe expression node. (MULT_HIGHPART_EXPR): Clarify that operands must have the same signedness. * tree.def (MULT_HIGHPART_EXPR): Document both operands must have integer types with the same precision and signedness. (WIDEN_MULT_EXPR): Document that operands must have integer types with the same precision, but possibly differing signedness. * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Defend against riscv_current_subset_list returning a NULL pointer (empty list). gcc/testsuite/ChangeLog PR middle-end/104140 * gcc.target/riscv/pr104140.c: New test case. --- gcc/config/riscv/riscv-c.cc | 3 +++ 1 file changed, 3 insertions(+) (limited to 'gcc/config') diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc index 211472f..73c62f4 100644 --- a/gcc/config/riscv/riscv-c.cc +++ b/gcc/config/riscv/riscv-c.cc @@ -108,6 +108,9 @@ riscv_cpu_cpp_builtins (cpp_reader *pfile) builtin_define_with_int_value ("__riscv_arch_test", 1); const riscv_subset_list *subset_list = riscv_current_subset_list (); + if (!subset_list) + return; + size_t max_ext_len = 0; /* Figure out the max length of extension name for reserving buffer. */ -- cgit v1.1 From 518aad6a161598fd49dffaa5b5c8da477fda160a Mon Sep 17 00:00:00 2001 From: Bill Seurer Date: Fri, 21 Jan 2022 13:04:38 -0600 Subject: rs6000: Fix bootstrap Fix a compilation issue in stage2 bootstrap. Fixed as obvious (re: discussion with Bill Schmidt). 2022-01-21 Bill Seurer gcc/ * config/rs6000/rs6000.cc (rs6000_get_function_versions_dispatcher): Fix mention of ifunc in string. --- gcc/config/rs6000/rs6000.cc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'gcc/config') diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 0882ecb..587fb11 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -25082,7 +25082,7 @@ rs6000_get_function_versions_dispatcher (void *decl) else { error_at (DECL_SOURCE_LOCATION (default_node->decl), - "multiversioning needs ifunc which is not supported " + "multiversioning needs % which is not supported " "on this target"); } #endif -- cgit v1.1 From afe91e2566f47a6041f45095a48fc255625cb468 Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Fri, 21 Jan 2022 13:13:11 -0600 Subject: rs6000: Support vector float/double for vec_sldw 2022-01-21 Bill Schmidt gcc/ * config/rs6000/rs6000-overload.def (VEC_SLDW): Add instances for vector float and vector double. gcc/testsuite/ * gcc.target/powerpc/builtins-4.c: Add two test variants. Adjust assembler counts. --- gcc/config/rs6000/rs6000-overload.def | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'gcc/config') diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def index e279153..7d030ab 100644 --- a/gcc/config/rs6000/rs6000-overload.def +++ b/gcc/config/rs6000/rs6000-overload.def @@ -3401,6 +3401,10 @@ XXSLDWI_2DI XXSLDWI_VSLL vull __builtin_vec_sldw (vull, vull, const int); XXSLDWI_2DI XXSLDWI_VULL + vf __builtin_vec_sldw (vf, vf, const int); + XXSLDWI_4SF XXSLDWI_VF + vd __builtin_vec_sldw (vd, vd, const int); + XXSLDWI_2DF XXSLDWI_VD [VEC_SLL, vec_sll, __builtin_vec_sll] vsc __builtin_vec_sll (vsc, vuc); -- cgit v1.1 From c163647ffbc9a20c8feb6e079dbecccfe016c82e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?S=C3=B6ren=20Tempel?= Date: Fri, 21 Jan 2022 19:22:46 +0000 Subject: Disable -fsplit-stack support on non-glibc targets MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The -fsplit-stack option requires the pthread_t TCB definition in the libc to provide certain struct fields at specific hardcoded offsets. As far as I know, only glibc provides these fields at the required offsets. Most notably, musl libc does not have these fields. However, since gcc accesses the fields using a fixed offset, this does not cause a compile-time error, but instead results in a silent memory corruption at run-time with musl libc. For example, on s390x libgcc's __stack_split_initialize CTOR will overwrite the cancel field in the pthread_t TCB on musl. The -fsplit-stack option is used within the gcc code base itself by gcc-go (if available). On musl-based systems with split-stack support (i.e. s390x or x86) this causes Go programs compiled with gcc-go to misbehave at run-time. This patch fixes gcc-go on musl by disabling -fsplit-stack in gcc itself since it is not supported on non-glibc targets anyhow. This is achieved by checking if gcc targets a glibc-based system. This check has been added for x86 and s390x, the rs6000 config already checks for TARGET_GLIBC_MAJOR. Other architectures do not have split-stack support. With this patch applied, the gcc-go configure script will detect that -fsplit-stack support is not available and will not use it. See https://www.openwall.com/lists/musl/2012/10/16/12 This patch was written under the assumption that glibc is the only libc implementation which supports the required fields at the required offsets in the pthread_t TCB. The patch has been tested on Alpine Linux Edge on the s390x and x86 architectures by bootstrapping Google's Go implementation with gcc-go. Signed-off-by: Sören Tempel gcc/ChangeLog: * common/config/s390/s390-common.cc (s390_supports_split_stack): Only support split-stack on glibc targets. * config/i386/gnu-user-common.h (STACK_CHECK_STATIC_BUILTIN): Ditto. * config/i386/gnu.h (defined): Ditto. --- gcc/config/i386/gnu-user-common.h | 5 +++-- gcc/config/i386/gnu.h | 5 ++++- 2 files changed, 7 insertions(+), 3 deletions(-) (limited to 'gcc/config') diff --git a/gcc/config/i386/gnu-user-common.h b/gcc/config/i386/gnu-user-common.h index 23b54c5..7525f78 100644 --- a/gcc/config/i386/gnu-user-common.h +++ b/gcc/config/i386/gnu-user-common.h @@ -66,7 +66,8 @@ along with GCC; see the file COPYING3. If not see #define STACK_CHECK_STATIC_BUILTIN 1 /* We only build the -fsplit-stack support in libgcc if the - assembler has full support for the CFI directives. */ -#if HAVE_GAS_CFI_PERSONALITY_DIRECTIVE + assembler has full support for the CFI directives and + targets glibc. */ +#if HAVE_GAS_CFI_PERSONALITY_DIRECTIVE && OPTION_GLIBC #define TARGET_CAN_SPLIT_STACK #endif diff --git a/gcc/config/i386/gnu.h b/gcc/config/i386/gnu.h index 401e60c..daa505a 100644 --- a/gcc/config/i386/gnu.h +++ b/gcc/config/i386/gnu.h @@ -35,7 +35,10 @@ along with GCC. If not, see . crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s}" #endif -#ifdef TARGET_LIBC_PROVIDES_SSP +/* -fsplit-stack uses a field in the TCB at a fixed offset. This + field is only available for glibc. Disable -fsplit-stack for + other libc implementations to avoid silent TCB corruptions. */ +#if defined (TARGET_LIBC_PROVIDES_SSP) && OPTION_GLIBC /* i386 glibc provides __stack_chk_guard in %gs:0x14. */ #define TARGET_THREAD_SSP_OFFSET 0x14 -- cgit v1.1 From 60953a23d57b13a672f751bec0c6eefc059eb1ab Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Fri, 21 Jan 2022 13:24:00 -0800 Subject: x86: Properly disable -fsplit-stack support on non-glibc targets Revert x86 changes in commit c163647ffbc9a20c8feb6e079dbecccfe016c82e Author: Soren Tempel Date: Fri Jan 21 19:22:46 2022 +0000 Disable -fsplit-stack support on non-glibc targets and change ix86_supports_split_stack to return true only on glibc. PR bootstrap/104170 * common/config/i386/i386-common.cc (ix86_supports_split_stack): Return true only on glibc. * config/i386/gnu-user-common.h (STACK_CHECK_STATIC_BUILTIN): Revert commit c163647ffbc. * config/i386/gnu.h (TARGET_LIBC_PROVIDES_SSP): Likewise. --- gcc/config/i386/gnu-user-common.h | 5 ++--- gcc/config/i386/gnu.h | 5 +---- 2 files changed, 3 insertions(+), 7 deletions(-) (limited to 'gcc/config') diff --git a/gcc/config/i386/gnu-user-common.h b/gcc/config/i386/gnu-user-common.h index 7525f78..23b54c5 100644 --- a/gcc/config/i386/gnu-user-common.h +++ b/gcc/config/i386/gnu-user-common.h @@ -66,8 +66,7 @@ along with GCC; see the file COPYING3. If not see #define STACK_CHECK_STATIC_BUILTIN 1 /* We only build the -fsplit-stack support in libgcc if the - assembler has full support for the CFI directives and - targets glibc. */ -#if HAVE_GAS_CFI_PERSONALITY_DIRECTIVE && OPTION_GLIBC + assembler has full support for the CFI directives. */ +#if HAVE_GAS_CFI_PERSONALITY_DIRECTIVE #define TARGET_CAN_SPLIT_STACK #endif diff --git a/gcc/config/i386/gnu.h b/gcc/config/i386/gnu.h index daa505a..401e60c 100644 --- a/gcc/config/i386/gnu.h +++ b/gcc/config/i386/gnu.h @@ -35,10 +35,7 @@ along with GCC. If not, see . crti.o%s %{static:crtbeginT.o%s;shared|pie:crtbeginS.o%s;:crtbegin.o%s}" #endif -/* -fsplit-stack uses a field in the TCB at a fixed offset. This - field is only available for glibc. Disable -fsplit-stack for - other libc implementations to avoid silent TCB corruptions. */ -#if defined (TARGET_LIBC_PROVIDES_SSP) && OPTION_GLIBC +#ifdef TARGET_LIBC_PROVIDES_SSP /* i386 glibc provides __stack_chk_guard in %gs:0x14. */ #define TARGET_THREAD_SSP_OFFSET 0x14 -- cgit v1.1 From f9063d12633c62a089115df032a19295854d8b06 Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Fri, 21 Jan 2022 18:08:50 -0500 Subject: Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136 If you compile module_advect_em.F90 with -Ofast -mcpu=power10, one module is large enough that we can't use a single conditional jump to span the function. Instead, GCC has to reverse the condition, and do a conditional jump around an unconditional branch. It turns out when xxspltiw and xxspltdp instructions were generated, they were not marked as being prefixed (i.e. length of 12 bytes instead of 4 bytes). This meant the calculations for the branch length were off, which in turn meant the assembler raised an error because it couldn't do the conditional jump. The fix is to explicitly set the prefixed attribute when we are loading up vector constants with the xxspltiw or xxspltidp instructions. I have removed the code that sets the prefixed attribute for xxspltiw, xxspltidp, and xxsplti32dx instructions, since it no longer will be invoked. I have also explicitly set the prefixed attribute for load SF and DF mode constants with xxsplitw and xxspltidp. Previously, it was not set on these insns, but when the insn was split to get the XXSPLTIW/XXSPLTIDP forms, those forms already had the prefixed attribute set. 2022-01-21 Michael Meissner gcc/ PR target/104136 * config/rs6000/rs6000-protos.h (prefixed_xxsplti_p): Delete. * config/rs6000/rs6000.cc (prefixed_xxsplti_p): Delete. * config/rs6000/rs6000.md (prefixed attribute): Delete section that sets the prefixed attribute for xxspltiw, xxspltidp, and xxsplti32dx instructions. (movsf_hardfloat): Explicitly set the prefixed attribute when xxspltiw and xxspltidp instructions are generated. (mov_hardfloat32): Likewise. (mov_hardfloat64): Likewise. * config/rs6000/vsx.md (vsx_mov_64bit): Explicitly set the prefixed attribute for xxspltiw and xxspltidp instructions. (vsx_mov_32bit): Likewise. --- gcc/config/rs6000/rs6000-protos.h | 1 - gcc/config/rs6000/rs6000.cc | 38 -------------------------------------- gcc/config/rs6000/rs6000.md | 24 ++++++++++++++++-------- gcc/config/rs6000/vsx.md | 12 +++++++++++- 4 files changed, 27 insertions(+), 48 deletions(-) (limited to 'gcc/config') diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index e322ac0..3ea0102 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -199,7 +199,6 @@ enum non_prefixed_form reg_to_non_prefixed (rtx reg, machine_mode mode); extern bool prefixed_load_p (rtx_insn *); extern bool prefixed_store_p (rtx_insn *); extern bool prefixed_paddi_p (rtx_insn *); -extern bool prefixed_xxsplti_p (rtx_insn *); extern void rs6000_asm_output_opcode (FILE *); extern void output_pcrel_opt_reloc (rtx); extern void rs6000_final_prescan_insn (rtx_insn *, rtx [], int); diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index 587fb11..943f53e 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -26609,44 +26609,6 @@ prefixed_paddi_p (rtx_insn *insn) return (iform == INSN_FORM_PCREL_EXTERNAL || iform == INSN_FORM_PCREL_LOCAL); } -/* Whether an instruction is a prefixed XXSPLTI* instruction. This is called - from the prefixed attribute processing. */ - -bool -prefixed_xxsplti_p (rtx_insn *insn) -{ - rtx set = single_set (insn); - if (!set) - return false; - - rtx dest = SET_DEST (set); - rtx src = SET_SRC (set); - machine_mode mode = GET_MODE (dest); - - if (!REG_P (dest) && !SUBREG_P (dest)) - return false; - - if (GET_CODE (src) == UNSPEC) - { - int unspec = XINT (src, 1); - return (unspec == UNSPEC_XXSPLTIW - || unspec == UNSPEC_XXSPLTIDP - || unspec == UNSPEC_XXSPLTI32DX); - } - - vec_const_128bit_type vsx_const; - if (vec_const_128bit_to_bytes (src, mode, &vsx_const)) - { - if (constant_generates_xxspltiw (&vsx_const)) - return true; - - if (constant_generates_xxspltidp (&vsx_const)) - return true; - } - - return false; -} - /* Whether the next instruction needs a 'p' prefix issued before the instruction is printed out. */ static bool prepend_p_to_next_insn; diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 59531b6..4e22118 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -315,11 +315,6 @@ (eq_attr "type" "integer,add") (if_then_else (match_test "prefixed_paddi_p (insn)") (const_string "yes") - (const_string "no")) - - (eq_attr "type" "vecperm") - (if_then_else (match_test "prefixed_xxsplti_p (insn)") - (const_string "yes") (const_string "no"))] (const_string "no"))) @@ -7857,7 +7852,11 @@ (set_attr "isa" "*, *, p9v, p8v, *, p9v, p8v, *, *, *, *, *, - *, *, *, *, p10")]) + *, *, *, *, p10") + (set_attr "prefixed" + "*, *, *, *, *, *, + *, *, *, *, *, *, + *, *, *, *, yes")]) ;; LWZ LFIWZX STW STFIWX MTVSRWZ MFVSRWZ ;; FMR MR MT%0 MF%1 NOP @@ -8159,7 +8158,11 @@ (set_attr "isa" "*, *, *, p9v, p9v, p7v, p7v, *, *, *, - *, *, *, p10")]) + *, *, *, p10") + (set_attr "prefixed" + "*, *, *, *, *, + *, *, *, *, *, + *, *, *, yes")]) ;; STW LWZ MR G-const H-const F-const @@ -8232,7 +8235,12 @@ "*, *, *, p9v, p9v, p7v, p7v, *, *, *, *, *, *, *, *, - *, p8v, p8v, p10")]) + *, p8v, p8v, p10") + (set_attr "prefixed" + "*, *, *, *, *, + *, *, *, *, *, + *, *, *, *, *, + *, *, *, *")]) ;; STD LD MR MT MF G-const ;; H-const F-const Special diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index e84ffb6..c8c891e 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -1237,7 +1237,12 @@ ", , , *, *, *, *, *, *, *, p9v, *, p10, p10, - , *, *, *, *")]) + , *, *, *, *") + (set_attr "prefixed" + "*, *, *, *, *, *, + *, *, *, *, *, *, + *, yes, + *, *, *, *, *")]) ;; VSX store VSX load VSX move GPR load GPR store GPR move ;; LXVKQ XXSPLTI* @@ -1276,6 +1281,11 @@ ", , , *, *, *, p10, p10, p9v, *, , *, *, + *, *") + (set_attr "prefixed" + "*, *, *, *, *, *, + *, yes, + *, *, *, *, *, *, *")]) ;; Explicit load/store expanders for the builtin functions -- cgit v1.1 From cbcf4a50fa21abd7a4a50a7ce47ada80b115febc Mon Sep 17 00:00:00 2001 From: Andrew Pinski Date: Sun, 9 Jan 2022 23:39:31 -0800 Subject: [aarch64/64821]: Simplify __builtin_aarch64_sqrt* into internal function .SQRT. This is a simple patch which simplifies the __builtin_aarch64_sqrt* builtins into the internal function SQRT which allows for constant folding and other optimizations at the gimple level. It was originally suggested we do to __builtin_sqrt just for __builtin_aarch64_sqrtdf when -fno-math-errno but since r6-4969-g686ee9719a4 we have the internal function SQRT which does the same so it makes we don't need to check -fno-math-errno either now. Applied as approved after bootstrapped and tested on aarch64-linux-gnu with no regressions. PR target/64821 gcc/ChangeLog: * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin): Handle __builtin_aarch64_sqrt* and simplify into SQRT internal function. gcc/testsuite/ChangeLog: * gcc.target/aarch64/vsqrt-1.c: New test. * gcc.target/aarch64/vsqrt-2.c: New test. --- gcc/config/aarch64/aarch64-builtins.cc | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'gcc/config') diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc index b7f338d..5217dbd 100644 --- a/gcc/config/aarch64/aarch64-builtins.cc +++ b/gcc/config/aarch64/aarch64-builtins.cc @@ -2820,6 +2820,13 @@ aarch64_general_gimple_fold_builtin (unsigned int fcode, gcall *stmt, gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt)); break; + /* Lower sqrt builtins to gimple/internal function sqrt. */ + BUILTIN_VHSDF_DF (UNOP, sqrt, 2, FP) + new_stmt = gimple_build_call_internal (IFN_SQRT, + 1, args[0]); + gimple_call_set_lhs (new_stmt, gimple_call_lhs (stmt)); + break; + /*lower store and load neon builtins to gimple. */ BUILTIN_VALL_F16 (LOAD1, ld1, 0, LOAD) BUILTIN_VDQ_I (LOAD1_U, ld1, 0, LOAD) -- cgit v1.1 From 4d2321314a656dd3e30117e2a5266cbacb1e60eb Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Sat, 22 Jan 2022 12:04:30 -0800 Subject: x86: Also check mode of memory broadcast in bcst_mem_operand Return false for invalid mode on memory broadcast in bcst_mem_operand: (vec_duplicate:V16SF (mem/j:V4SF (reg/v/f:DI 109 [ b ]))) gcc/ PR target/104188 * config/i386/predicates.md (bcst_mem_operand): Also check mode of memory broadcast. gcc/testsuite/ PR target/104188 * gcc.target/i386/pr104188.c: New test. --- gcc/config/i386/predicates.md | 2 ++ 1 file changed, 2 insertions(+) (limited to 'gcc/config') diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index eae6ab5..a8cc17a 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -1157,6 +1157,8 @@ (ior (match_test "TARGET_AVX512VL") (match_test "GET_MODE_SIZE (GET_MODE (op)) == 64"))) (match_test "VALID_BCST_MODE_P (GET_MODE_INNER (GET_MODE (op)))") + (match_test "GET_MODE (XEXP (op, 0)) + == GET_MODE_INNER (GET_MODE (op))") (match_test "memory_operand (XEXP (op, 0), GET_MODE (XEXP (op, 0)))"))) ; Return true when OP is bcst_mem_operand or vector_memory_operand. -- cgit v1.1 From 2c31a8be4a5db11a0a0e97c366dded6362421086 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Mon, 24 Jan 2022 11:13:39 +0100 Subject: properly disable -fsplit-stack on non-glibc targets [PR104170] MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On Sat, Jan 22, 2022 at 10:32:21AM +0100, Martin Liška wrote: > I've just noticed the patch broke a few cross compilers: > > s390x-ibm-tpf: > > /home/marxin/buildworker/zen2-cross-compilers/build/gcc/common/config/s390/s390-common.cc: In function ‘bool s390_supports_split_stack(bool, gcc_options*)’: > /home/marxin/buildworker/zen2-cross-compilers/build/gcc/common/config/s390/s390-common.cc:126:13: error: ‘struct gcc_options’ has no member named ‘x_linux_libc’ > 126 | if (opts->x_linux_libc == LIBC_GLIBC) > | ^~~~~~~~~~~~ > > i686-kopensolaris-gnu, i686-symbolics-gnu > > /home/marxin/buildworker/zen2-cross-compilers/build/gcc/common/config/i386/i386-common.cc: In function ‘bool ix86_supports_split_stack(bool, gcc_options*)’: > /home/marxin/buildworker/zen2-cross-compilers/build/gcc/common/config/i386/i386-common.cc:1721:13: error: ‘struct gcc_options’ has no member named ‘x_linux_libc’ > 1721 | if (opts->x_linux_libc != LIBC_GLIBC) > | ^~~~~~~~~~~~ > make[1]: *** [Makefile:2418: i386-common.o] Error 1 > > Can you please take a look? Btw. do you have a bugzilla account? I bet instead of opts->x_linux_libc != LIBC_GLIBC it needs to use #ifdef OPTION_GLIBC if (!OPTION_GLIBC) #endif or so. I think the first committed patch actually used that but used it in #if directive, which is wrong because it is something that needs to be evaluated at runtime. That doesn't work well either, because the *supports_split_stack hooks have opts argument and OPTION_GLIBC doesn't take that. So, here is a patch that introduces OPTION_*_P macros that take opts as an argument and redefines OPTION_* using those (similarly to how the option scripts create TARGET_*_P and TARGET_* macros). 2022-01-24 Jakub Jelinek PR bootstrap/104170 * config/linux.h (OPTION_GLIBC_P, OPTION_UCLIBC_P, OPTION_BIONIC_P, OPTION_MUSL_P): Define. (OPTION_GLIBC, OPTION_UCLIBC, OPTION_BIONIC, OPTION_MUSL): Redefine using OPTION_*_P macros. * config/alpha/linux.h (OPTION_GLIBC_P, OPTION_UCLIBC_P, OPTION_BIONIC_P, OPTION_MUSL_P): Define. (OPTION_GLIBC, OPTION_UCLIBC, OPTION_BIONIC, OPTION_MUSL): Redefine using OPTION_*_P macros. * config/rs6000/linux.h (OPTION_GLIBC_P, OPTION_UCLIBC_P, OPTION_BIONIC_P, OPTION_MUSL_P): Define. (OPTION_GLIBC, OPTION_UCLIBC, OPTION_BIONIC, OPTION_MUSL): Redefine using OPTION_*_P macros. * config/rs6000/linux64.h (OPTION_GLIBC_P, OPTION_UCLIBC_P, OPTION_BIONIC_P, OPTION_MUSL_P): Define. (OPTION_GLIBC, OPTION_UCLIBC, OPTION_BIONIC, OPTION_MUSL): Redefine using OPTION_*_P macros. * config/fuchsia.h (OPTION_MUSL_P): Redefine. * config/glibc-stdint.h (OPTION_MUSL_P): Define if not defined. * common/config/s390/s390-common.cc (s390_supports_split_stack): Re-add ATTRIBUTE_UNUSED to opts parameter. If OPTION_GLIBC_P is defined, use OPTION_GLIBC_P (opts) as condition, otherwise assume if (false). * common/config/i386/i386-common.cc (ix86_supports_split_stack): If OPTION_GLIBC_P is defined use !OPTION_GLIBC_P (opts) as condition, otherwise assume if (true). --- gcc/config/alpha/linux.h | 25 +++++++++++++++---------- gcc/config/fuchsia.h | 2 ++ gcc/config/glibc-stdint.h | 3 +++ gcc/config/linux.h | 25 +++++++++++++++---------- gcc/config/rs6000/linux.h | 25 +++++++++++++++---------- gcc/config/rs6000/linux64.h | 25 +++++++++++++++---------- 6 files changed, 65 insertions(+), 40 deletions(-) (limited to 'gcc/config') diff --git a/gcc/config/alpha/linux.h b/gcc/config/alpha/linux.h index 9ab501c..14ced5f 100644 --- a/gcc/config/alpha/linux.h +++ b/gcc/config/alpha/linux.h @@ -58,18 +58,23 @@ along with GCC; see the file COPYING3. If not see #define WCHAR_TYPE "int" #ifdef SINGLE_LIBC -#define OPTION_GLIBC (DEFAULT_LIBC == LIBC_GLIBC) -#define OPTION_UCLIBC (DEFAULT_LIBC == LIBC_UCLIBC) -#define OPTION_BIONIC (DEFAULT_LIBC == LIBC_BIONIC) -#undef OPTION_MUSL -#define OPTION_MUSL (DEFAULT_LIBC == LIBC_MUSL) +#define OPTION_GLIBC_P(opts) (DEFAULT_LIBC == LIBC_GLIBC) +#define OPTION_UCLIBC_P(opts) (DEFAULT_LIBC == LIBC_UCLIBC) +#define OPTION_BIONIC_P(opts) (DEFAULT_LIBC == LIBC_BIONIC) +#undef OPTION_MUSL_P +#define OPTION_MUSL_P(opts) (DEFAULT_LIBC == LIBC_MUSL) #else -#define OPTION_GLIBC (linux_libc == LIBC_GLIBC) -#define OPTION_UCLIBC (linux_libc == LIBC_UCLIBC) -#define OPTION_BIONIC (linux_libc == LIBC_BIONIC) -#undef OPTION_MUSL -#define OPTION_MUSL (linux_libc == LIBC_MUSL) +#define OPTION_GLIBC_P(opts) ((opts)->x_linux_libc == LIBC_GLIBC) +#define OPTION_UCLIBC_P(opts) ((opts)->x_linux_libc == LIBC_UCLIBC) +#define OPTION_BIONIC_P(opts) ((opts)->x_linux_libc == LIBC_BIONIC) +#undef OPTION_MUSL_P +#define OPTION_MUSL_P(opts) ((opts)->x_linux_libc == LIBC_MUSL) #endif +#define OPTION_GLIBC OPTION_GLIBC_P (&global_options) +#define OPTION_UCLIBC OPTION_UCLIBC_P (&global_options) +#define OPTION_BIONIC OPTION_BIONIC_P (&global_options) +#undef OPTION_MUSL +#define OPTION_MUSL OPTION_MUSL_P (&global_options) /* Determine what functions are present at the runtime; this includes full c99 runtime and sincos. */ diff --git a/gcc/config/fuchsia.h b/gcc/config/fuchsia.h index e013265..0baf6f1f 100644 --- a/gcc/config/fuchsia.h +++ b/gcc/config/fuchsia.h @@ -52,6 +52,8 @@ along with GCC; see the file COPYING3. If not see /* We are using MUSL as our libc. */ #undef OPTION_MUSL #define OPTION_MUSL 1 +#undef OPTION_MUSL_P +#define OPTION_MUSL_P(opts) 1 #ifndef TARGET_SUB_OS_CPP_BUILTINS #define TARGET_SUB_OS_CPP_BUILTINS() diff --git a/gcc/config/glibc-stdint.h b/gcc/config/glibc-stdint.h index 1161616..a3652d0 100644 --- a/gcc/config/glibc-stdint.h +++ b/gcc/config/glibc-stdint.h @@ -27,6 +27,9 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #ifndef OPTION_MUSL #define OPTION_MUSL 0 #endif +#ifndef OPTION_MUSL_P +#define OPTION_MUSL_P(opts) 0 +#endif #define SIG_ATOMIC_TYPE "int" diff --git a/gcc/config/linux.h b/gcc/config/linux.h index 2e888e3..74f7079 100644 --- a/gcc/config/linux.h +++ b/gcc/config/linux.h @@ -29,18 +29,23 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see /* C libraries supported on Linux. */ #ifdef SINGLE_LIBC -#define OPTION_GLIBC (DEFAULT_LIBC == LIBC_GLIBC) -#define OPTION_UCLIBC (DEFAULT_LIBC == LIBC_UCLIBC) -#define OPTION_BIONIC (DEFAULT_LIBC == LIBC_BIONIC) -#undef OPTION_MUSL -#define OPTION_MUSL (DEFAULT_LIBC == LIBC_MUSL) +#define OPTION_GLIBC_P(opts) (DEFAULT_LIBC == LIBC_GLIBC) +#define OPTION_UCLIBC_P(opts) (DEFAULT_LIBC == LIBC_UCLIBC) +#define OPTION_BIONIC_P(opts) (DEFAULT_LIBC == LIBC_BIONIC) +#undef OPTION_MUSL_P +#define OPTION_MUSL_P(opts) (DEFAULT_LIBC == LIBC_MUSL) #else -#define OPTION_GLIBC (linux_libc == LIBC_GLIBC) -#define OPTION_UCLIBC (linux_libc == LIBC_UCLIBC) -#define OPTION_BIONIC (linux_libc == LIBC_BIONIC) -#undef OPTION_MUSL -#define OPTION_MUSL (linux_libc == LIBC_MUSL) +#define OPTION_GLIBC_P(opts) ((opts)->x_linux_libc == LIBC_GLIBC) +#define OPTION_UCLIBC_P(opts) ((opts)->x_linux_libc == LIBC_UCLIBC) +#define OPTION_BIONIC_P(opts) ((opts)->x_linux_libc == LIBC_BIONIC) +#undef OPTION_MUSL_P +#define OPTION_MUSL_P(opts) ((opts)->x_linux_libc == LIBC_MUSL) #endif +#define OPTION_GLIBC OPTION_GLIBC_P (&global_options) +#define OPTION_UCLIBC OPTION_UCLIBC_P (&global_options) +#define OPTION_BIONIC OPTION_BIONIC_P (&global_options) +#undef OPTION_MUSL +#define OPTION_MUSL OPTION_MUSL_P (&global_options) #define GNU_USER_TARGET_OS_CPP_BUILTINS() \ do { \ diff --git a/gcc/config/rs6000/linux.h b/gcc/config/rs6000/linux.h index e6a3223..8c9039a 100644 --- a/gcc/config/rs6000/linux.h +++ b/gcc/config/rs6000/linux.h @@ -27,18 +27,23 @@ #define NO_PROFILE_COUNTERS 1 #ifdef SINGLE_LIBC -#define OPTION_GLIBC (DEFAULT_LIBC == LIBC_GLIBC) -#define OPTION_UCLIBC (DEFAULT_LIBC == LIBC_UCLIBC) -#define OPTION_BIONIC (DEFAULT_LIBC == LIBC_BIONIC) -#undef OPTION_MUSL -#define OPTION_MUSL (DEFAULT_LIBC == LIBC_MUSL) +#define OPTION_GLIBC_P(opts) (DEFAULT_LIBC == LIBC_GLIBC) +#define OPTION_UCLIBC_P(opts) (DEFAULT_LIBC == LIBC_UCLIBC) +#define OPTION_BIONIC_P(opts) (DEFAULT_LIBC == LIBC_BIONIC) +#undef OPTION_MUSL_P +#define OPTION_MUSL_P(opts) (DEFAULT_LIBC == LIBC_MUSL) #else -#define OPTION_GLIBC (linux_libc == LIBC_GLIBC) -#define OPTION_UCLIBC (linux_libc == LIBC_UCLIBC) -#define OPTION_BIONIC (linux_libc == LIBC_BIONIC) -#undef OPTION_MUSL -#define OPTION_MUSL (linux_libc == LIBC_MUSL) +#define OPTION_GLIBC_P(opts) ((opts)->x_linux_libc == LIBC_GLIBC) +#define OPTION_UCLIBC_P(opts) ((opts)->x_linux_libc == LIBC_UCLIBC) +#define OPTION_BIONIC_P(opts) ((opts)->x_linux_libc == LIBC_BIONIC) +#undef OPTION_MUSL_P +#define OPTION_MUSL_P(opts) ((opts)->x_linux_libc == LIBC_MUSL) #endif +#define OPTION_GLIBC OPTION_GLIBC_P (&global_options) +#define OPTION_UCLIBC OPTION_UCLIBC_P (&global_options) +#define OPTION_BIONIC OPTION_BIONIC_P (&global_options) +#undef OPTION_MUSL +#define OPTION_MUSL OPTION_MUSL_P (&global_options) /* Determine what functions are present at the runtime; this includes full c99 runtime and sincos. */ diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h index d617f346..b2a7afa 100644 --- a/gcc/config/rs6000/linux64.h +++ b/gcc/config/rs6000/linux64.h @@ -265,18 +265,23 @@ extern int dot_symbols; #define OS_MISSING_POWERPC64 !TARGET_64BIT #ifdef SINGLE_LIBC -#define OPTION_GLIBC (DEFAULT_LIBC == LIBC_GLIBC) -#define OPTION_UCLIBC (DEFAULT_LIBC == LIBC_UCLIBC) -#define OPTION_BIONIC (DEFAULT_LIBC == LIBC_BIONIC) -#undef OPTION_MUSL -#define OPTION_MUSL (DEFAULT_LIBC == LIBC_MUSL) +#define OPTION_GLIBC_P(opts) (DEFAULT_LIBC == LIBC_GLIBC) +#define OPTION_UCLIBC_P(opts) (DEFAULT_LIBC == LIBC_UCLIBC) +#define OPTION_BIONIC_P(opts) (DEFAULT_LIBC == LIBC_BIONIC) +#undef OPTION_MUSL_P +#define OPTION_MUSL_P(opts) (DEFAULT_LIBC == LIBC_MUSL) #else -#define OPTION_GLIBC (linux_libc == LIBC_GLIBC) -#define OPTION_UCLIBC (linux_libc == LIBC_UCLIBC) -#define OPTION_BIONIC (linux_libc == LIBC_BIONIC) -#undef OPTION_MUSL -#define OPTION_MUSL (linux_libc == LIBC_MUSL) +#define OPTION_GLIBC_P(opts) ((opts)->x_linux_libc == LIBC_GLIBC) +#define OPTION_UCLIBC_P(opts) ((opts)->x_linux_libc == LIBC_UCLIBC) +#define OPTION_BIONIC_P(opts) ((opts)->x_linux_libc == LIBC_BIONIC) +#undef OPTION_MUSL_P +#define OPTION_MUSL_P(opts) ((opts)->x_linux_libc == LIBC_MUSL) #endif +#define OPTION_GLIBC OPTION_GLIBC_P (&global_options) +#define OPTION_UCLIBC OPTION_UCLIBC_P (&global_options) +#define OPTION_BIONIC OPTION_BIONIC_P (&global_options) +#undef OPTION_MUSL +#define OPTION_MUSL OPTION_MUSL_P (&global_options) /* Determine what functions are present at the runtime; this includes full c99 runtime and sincos. */ -- cgit v1.1