From 99710245becabdfa97984d1f68a01f9876124417 Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Mon, 28 Mar 2011 01:53:24 +0000 Subject: re PR bootstrap/48307 (Bootstrap failure) 2011-03-27 Vladimir Makarov PR bootstrap/48307 Revert the previous patch. From-SVN: r171589 --- gcc/config/sparc/sparc.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'gcc/config/sparc') diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 9398968..297844f 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -1008,6 +1008,19 @@ extern enum reg_class sparc_regno_reg_class[FIRST_PSEUDO_REGISTER]; #define REGNO_REG_CLASS(REGNO) sparc_regno_reg_class[(REGNO)] +/* The following macro defines cover classes for Integrated Register + Allocator. Cover classes is a set of non-intersected register + classes covering all hard registers used for register allocation + purpose. Any move between two registers of a cover class should be + cheaper than load or store of the registers. The macro value is + array of register classes with LIM_REG_CLASSES used as the end + marker. */ + +#define IRA_COVER_CLASSES \ +{ \ + GENERAL_REGS, EXTRA_FP_REGS, FPCC_REGS, LIM_REG_CLASSES \ +} + /* Defines invalid mode changes. Borrowed from pa64-regs.h. SImode loads to floating-point registers are not zero-extended. -- cgit v1.1