From f6aa5171a1a0091bcc3741b1ffff9e8a962e728c Mon Sep 17 00:00:00 2001 From: Jan Hubicka Date: Wed, 10 Jan 2018 12:02:55 +0100 Subject: re PR target/81616 (Update -mtune=generic for the current Intel and AMD processors) PR target/81616 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER. * i386.h (TARGET_USE_GATHER): Define. * x86-tune.def (X86_TUNE_USE_GATHER): New. From-SVN: r256424 --- gcc/config/i386/i386.c | 2 +- gcc/config/i386/i386.h | 2 ++ gcc/config/i386/x86-tune.def | 4 ++++ 3 files changed, 7 insertions(+), 1 deletion(-) (limited to 'gcc/config/i386') diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 8696f93..d10b137 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -38233,7 +38233,7 @@ ix86_vectorize_builtin_gather (const_tree mem_vectype, bool si; enum ix86_builtins code; - if (! TARGET_AVX2) + if (! TARGET_AVX2 || !TARGET_USE_GATHER) return NULL_TREE; if ((TREE_CODE (index_type) != INTEGER_TYPE diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 93b7a2c..6928f80 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -498,6 +498,8 @@ extern unsigned char ix86_tune_features[X86_TUNE_LAST]; ix86_tune_features[X86_TUNE_SLOW_PSHUFB] #define TARGET_AVOID_4BYTE_PREFIXES \ ix86_tune_features[X86_TUNE_AVOID_4BYTE_PREFIXES] +#define TARGET_USE_GATHER \ + ix86_tune_features[X86_TUNE_USE_GATHER] #define TARGET_FUSE_CMP_AND_BRANCH_32 \ ix86_tune_features[X86_TUNE_FUSE_CMP_AND_BRANCH_32] #define TARGET_FUSE_CMP_AND_BRANCH_64 \ diff --git a/gcc/config/i386/x86-tune.def b/gcc/config/i386/x86-tune.def index 9401d51..0bc928b 100644 --- a/gcc/config/i386/x86-tune.def +++ b/gcc/config/i386/x86-tune.def @@ -399,6 +399,10 @@ DEF_TUNE (X86_TUNE_SLOW_PSHUFB, "slow_pshufb", DEF_TUNE (X86_TUNE_AVOID_4BYTE_PREFIXES, "avoid_4byte_prefixes", m_SILVERMONT | m_INTEL) +/* X86_TUNE_USE_GATHER: Use gather instructions. */ +DEF_TUNE (X86_TUNE_USE_GATHER, "use_gather", + ~(m_ZNVER1 | m_GENERIC)) + /*****************************************************************************/ /* AVX instruction selection tuning (some of SSE flags affects AVX, too) */ /*****************************************************************************/ -- cgit v1.1