From c5395d88dfa2123ca5155008c8c8339ded98fd32 Mon Sep 17 00:00:00 2001 From: Claudiu Zissulescu Date: Mon, 9 Nov 2020 17:34:13 +0200 Subject: arc: Improve/add instruction patterns to better use MAC instructions. ARC MYP7+ instructions adds MAC instructions for either vector and scalar data types. This patch adds a madd pattern for 16it datum using the 32bit MAC instruction, and dot_prod patterns for v4hi vector types. The 64bit moves are also upgraded by using vadd2 instuction. 2020-11-09 Claudiu Zissulescu gcc/ * config/arc/arc.c (arc_split_move): Recognize vadd2 instructions. * config/arc/arc.md (movdi_insn): Update pattern to use vadd2 instructions. (movdf_insn): Likewise. (maddhisi4): New pattern. (umaddhisi4): Likewise. * config/arc/simdext.md (mov_int): Update pattern to use vadd2. (sdot_prodv4hi): New pattern. (udot_prodv4hi): Likewise. (arc_vec_mac_hi_v4hi): Update/renamed to arc_vec_mac_v2hiv2si. (arc_vec_mac_v2hiv2si_zero): New pattern. * config/arc/constraints.md (Ral): Accumulator register constraint. Signed-off-by: Claudiu Zissulescu --- gcc/config/arc/arc.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'gcc/config/arc/arc.c') diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 6b96c5e..2a7b1fb 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -10155,6 +10155,14 @@ arc_split_move (rtx *operands) } if (TARGET_PLUS_QMACW + && even_register_operand (operands[0], mode) + && even_register_operand (operands[1], mode)) + { + emit_move_insn (operands[0], operands[1]); + return; + } + + if (TARGET_PLUS_QMACW && GET_CODE (operands[1]) == CONST_VECTOR) { HOST_WIDE_INT intval0, intval1; -- cgit v1.1