From ddc014d2c69240ecf8a49399d1a58ebb2530b9d1 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Mon, 11 Nov 2024 12:32:19 +0000 Subject: aarch64: Define arm_neon.h types in arm_sve.h too This patch moves the scalar and single-vector Advanced SIMD types from arm_neon.h into a private header, so that they can be defined by arm_sve.h as well. This is needed for the upcoming SVE2.1 hybrid-VLA reductions, which return 128-bit Advanced SIMD vectors. The approach follows Claudio's patch for FP8. gcc/ * config.gcc (extra_headers): Add arm_private_neon_types.h. * config/aarch64/arm_private_neon_types.h: New file, split out from... * config/aarch64/arm_neon.h: ...here. * config/aarch64/arm_sve.h: Include arm_private_neon_types.h --- gcc/config.gcc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'gcc/config.gcc') diff --git a/gcc/config.gcc b/gcc/config.gcc index b813352..9b616bd 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -347,7 +347,7 @@ m32c*-*-*) ;; aarch64*-*-*) cpu_type=aarch64 - extra_headers="arm_fp16.h arm_neon.h arm_bf16.h arm_acle.h arm_sve.h arm_sme.h arm_neon_sve_bridge.h arm_private_fp8.h" + extra_headers="arm_fp16.h arm_neon.h arm_bf16.h arm_acle.h arm_sve.h arm_sme.h arm_neon_sve_bridge.h arm_private_fp8.h arm_private_neon_types.h" c_target_objs="aarch64-c.o" cxx_target_objs="aarch64-c.o" d_target_objs="aarch64-d.o" -- cgit v1.1