From e61c94dd3123dc9942e9fed6eb79d741a69b4ab4 Mon Sep 17 00:00:00 2001 From: Kirill Yukhin Date: Wed, 25 Jul 2012 13:01:35 +0000 Subject: Changelog entry: 2012-07-25 Kirill Yukhin Michael Zolotukhin * common/config/i386/i386-common.c (OPTION_MASK_ISA_PRFCHW_SET): New. (OPTION_MASK_ISA_PRFCHW_UNSET): Likewise. (ix86_handle_option): Handle mprfchw option. * config.gcc (i[34567]86-*-*): Add prfchwintrin.h. (x86_64-*-*): Likewise. * config/i386/prfchwintrin.h: New header. * config/i386/cpuid.h (bit_PRFCHW): New. (bit_BMI): Formatting fix. (bit_HLE): Likewise. (bit_RTM): Likewise. * config/i386/driver-i386.c (host_detect_local_cpu): Detect PREFETCHW support. * config/i386/i386-c.c: Define __PRFCHW__ if needed. * config/i386/i386.c (ix86_target_string): Define -mprfchw option. Formatting fixes. (PTA_HLE): Formatting fix. (PTA_PRFCHW): New. (ix86_option_override_internal): Handle new option. (ix86_valid_target_attribute_inner_p): Add OPT_mprfchw. * config/i386/i386.h (TARGET_PRFCHW): New. * config/i386/i386.md (prefetch): Enable for TARGET_PRFCHW. * config/i386/i386.opt (mprfchw): New. * config/i386/mm3dnow.h: Move _m_prefetchw from here to prfchwintrin.h. * config/i386/x86intrin.h: Include prfchwintrin.h. testsuite/Changelog entry: 2012-07-24 Kirill Yukhin Michael Zolotukhin * gcc.target/i386/prefetchw-1.c: New. * gcc.target/i386/sse-12.c: Add -mprfchw. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. Co-Authored-By: Michael Zolotukhin From-SVN: r189844 --- gcc/common/config/i386/i386-common.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'gcc/common') diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index 1fe04a6..e2e4814 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -55,6 +55,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_AVX2_SET \ (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX_SET) #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM +#define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same as -msse4.2. */ @@ -123,6 +124,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_FMA_UNSET OPTION_MASK_ISA_FMA #define OPTION_MASK_ISA_AVX2_UNSET OPTION_MASK_ISA_AVX2 #define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM +#define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same as -mno-sse4.1. */ @@ -568,6 +570,19 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mprfchw: + if (value) + { + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PRFCHW_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PRFCHW_SET; + } + else + { + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PRFCHW_UNSET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PRFCHW_UNSET; + } + return true; + /* Comes from final.c -- no real reason to change it. */ #define MAX_CODE_ALIGN 16 -- cgit v1.1