From ba9c87d3255f168db811dd1fa69e5011d4e8194f Mon Sep 17 00:00:00 2001 From: "Cui,Lili" Date: Wed, 24 Jun 2020 13:08:11 +0800 Subject: Initial Sapphire Rapids and Alder Lake support from ISA r40 gcc/ * common/config/i386/cpuinfo.h (get_intel_cpu): Handle sapphirerapids. * common/config/i386/i386-common.c (processor_names): Add sapphirerapids and alderlake. (processor_alias_table): Add sapphirerapids and alderlake. * common/config/i386/i386-cpuinfo.h (processor_subtypes): Add INTEL_COREI7_ALDERLAKE and INTEL_COREI7_ALDERLAKE. * config.gcc: Add -march=sapphirerapids and alderlake. * config/i386/driver-i386.c (host_detect_local_cpu) Handle sapphirerapids and alderlake. * config/i386/i386-c.c (ix86_target_macros_internal): Handle sapphirerapids and alderlake. * config/i386/i386-options.c (m_SAPPHIRERAPIDS) : Define. (m_ALDERLAKE): Ditto. (m_CORE_AVX512) : Add m_SAPPHIRERAPIDS. (processor_cost_table): Add sapphirerapids and alderlake. (ix86_option_override_internal) Handle PTA_WAITPKG, PTA_ENQCMD, PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK. * config/i386/i386.h (ix86_size_cost) : Define SAPPHIRERAPIDS and ALDERLAKE. (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and PROCESSOR_ALDERLAKE. (PTA_ENQCMD): New. (PTA_CLDEMOTE): Ditto. (PTA_SERIALIZE): Ditto. (PTA_TSXLDTRK): New. (PTA_SAPPHIRERAPIDS): Ditto. (PTA_ALDERLAKE): Ditto. (processor_type) : Add PROCESSOR_SAPPHIRERAPIDS and PROCESSOR_ALDERLAKE. * doc/extend.texi: Add sapphirerapids and alderlake. * doc/invoke.texi: Add sapphirerapids and alderlake. gcc/testsuite/ * gcc.target/i386/funcspec-56.inc: Handle new march. * g++.target/i386/mv16.C: Handle new march --- gcc/common/config/i386/cpuinfo.h | 8 ++++++++ gcc/common/config/i386/i386-common.c | 6 ++++++ gcc/common/config/i386/i386-cpuinfo.h | 2 ++ 3 files changed, 16 insertions(+) (limited to 'gcc/common') diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index 3eda532..b14c7c6 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -456,6 +456,14 @@ get_intel_cpu (struct __processor_model *cpu_model, cpu_model->__cpu_type = INTEL_COREI7; cpu_model->__cpu_subtype = INTEL_COREI7_TIGERLAKE; break; + case 0x8f: + /* Sapphire Rapids. */ + cpu = "sapphirerapids"; + CHECK___builtin_cpu_is ("corei7"); + CHECK___builtin_cpu_is ("sapphirerapids"); + cpu_model->__cpu_type = INTEL_COREI7; + cpu_model->__cpu_subtype = INTEL_COREI7_SAPPHIRERAPIDS; + break; case 0x17: case 0x1d: /* Penryn. */ diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index 654df68..bb14305 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -1598,6 +1598,8 @@ const char *const processor_names[] = "cascadelake", "tigerlake", "cooperlake", + "sapphirerapids", + "alderlake", "intel", "geode", "k6", @@ -1703,6 +1705,10 @@ const pta processor_alias_table[] = M_CPU_SUBTYPE (INTEL_COREI7_TIGERLAKE), P_PROC_AVX512F}, {"cooperlake", PROCESSOR_COOPERLAKE, CPU_HASWELL, PTA_COOPERLAKE, M_CPU_SUBTYPE (INTEL_COREI7_COOPERLAKE), P_PROC_AVX512F}, + {"sapphirerapids", PROCESSOR_SAPPHIRERAPIDS, CPU_HASWELL, PTA_SAPPHIRERAPIDS, + M_CPU_SUBTYPE (INTEL_COREI7_SAPPHIRERAPIDS), P_PROC_AVX512F}, + {"alderlake", PROCESSOR_ALDERLAKE, CPU_HASWELL, PTA_ALDERLAKE, + M_CPU_SUBTYPE (INTEL_COREI7_ALDERLAKE), P_PROC_AVX2}, {"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, M_CPU_TYPE (INTEL_BONNELL), P_PROC_SSSE3}, {"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL, diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h index 96cf0ea..84ca97e 100644 --- a/gcc/common/config/i386/i386-cpuinfo.h +++ b/gcc/common/config/i386/i386-cpuinfo.h @@ -84,6 +84,8 @@ enum processor_subtypes INTEL_COREI7_CASCADELAKE, INTEL_COREI7_TIGERLAKE, INTEL_COREI7_COOPERLAKE, + INTEL_COREI7_SAPPHIRERAPIDS, + INTEL_COREI7_ALDERLAKE, CPU_SUBTYPE_MAX }; -- cgit v1.1