From 4bcb480d103b36c389daaf711f0f25d74379adb6 Mon Sep 17 00:00:00 2001 From: Haochen Jiang Date: Mon, 12 Aug 2024 15:30:07 +0800 Subject: Initial support for AVX10.2 gcc/ChangeLog: * common/config/i386/cpuinfo.h (get_available_features): Handle avx10.2. * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AVX10_2_256_SET): New. (OPTION_MASK_ISA2_AVX10_2_512_SET): Ditto. (OPTION_MASK_ISA2_AVX10_1_256_UNSET): Add OPTION_MASK_ISA2_AVX10_2_256_UNSET. (OPTION_MASK_ISA2_AVX10_1_512_UNSET): Add OPTION_MASK_ISA2_AVX10_2_512_UNSET. (OPTION_MASK_ISA2_AVX10_2_256_UNSET): New. (OPTION_MASK_ISA2_AVX10_2_512_UNSET): Ditto. (ix86_handle_option): Handle avx10.2-256 and avx10.2-512. * common/config/i386/i386-cpuinfo.h (enum processor_features): Add FEATURE_AVX10_2_256 and FEATURE_AVX10_2_512. * common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY for avx10.2-256 and avx10.2-512. * config/i386/i386-c.cc (ix86_target_macros_internal): Define __AVX10_2_256__ and __AVX10_2_512__. * config/i386/i386-isa.def (AVX10_2): Add DEF_PTA(AVX10_2_256) and DEF_PTA(AVX10_2_512). * config/i386/i386-options.cc (isa2_opts): Add -mavx10.2-256 and -mavx10.2-512. (ix86_valid_target_attribute_inner_p): Handle avx10.2-256 and avx10.2-512. * config/i386/i386.opt: Add option -mavx10.2, -mavx10.2-256 and -mavx10.2-512. * config/i386/i386.opt.urls: Regenerated. * doc/extend.texi: Document avx10.2, avx10.2-256 and avx10.2-512. * doc/invoke.texi: Document -mavx10.2, -mavx10.2-256 and -mavx10.2-512. * doc/sourcebuild.texi: Document target avx10.2, avx10.2-256, avx10.2-512. gcc/testsuite/ChangeLog: * g++.dg/other/i386-2.C: Ditto. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. --- gcc/common/config/i386/cpuinfo.h | 6 +++++ gcc/common/config/i386/i386-common.cc | 43 +++++++++++++++++++++++++++++++++-- gcc/common/config/i386/i386-cpuinfo.h | 2 ++ gcc/common/config/i386/i386-isas.h | 3 +++ 4 files changed, 52 insertions(+), 2 deletions(-) (limited to 'gcc/common') diff --git a/gcc/common/config/i386/cpuinfo.h b/gcc/common/config/i386/cpuinfo.h index 2ae77d3..2ae383e 100644 --- a/gcc/common/config/i386/cpuinfo.h +++ b/gcc/common/config/i386/cpuinfo.h @@ -1006,6 +1006,9 @@ get_available_features (struct __processor_model *cpu_model, if (ebx & bit_AVX10_256) switch (version) { + case 2: + set_feature (FEATURE_AVX10_2_256); + /* Fall through. */ case 1: set_feature (FEATURE_AVX10_1_256); break; @@ -1016,6 +1019,9 @@ get_available_features (struct __processor_model *cpu_model, if (ebx & bit_AVX10_512) switch (version) { + case 2: + set_feature (FEATURE_AVX10_2_512); + /* Fall through. */ case 1: set_feature (FEATURE_AVX10_1_512); break; diff --git a/gcc/common/config/i386/i386-common.cc b/gcc/common/config/i386/i386-common.cc index e38b1b2..fb74431 100644 --- a/gcc/common/config/i386/i386-common.cc +++ b/gcc/common/config/i386/i386-common.cc @@ -122,6 +122,11 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA2_AVX10_1_256_SET OPTION_MASK_ISA2_AVX10_1_256 #define OPTION_MASK_ISA2_AVX10_1_512_SET \ (OPTION_MASK_ISA2_AVX10_1_256_SET | OPTION_MASK_ISA2_AVX10_1_512) +#define OPTION_MASK_ISA2_AVX10_2_256_SET \ + (OPTION_MASK_ISA2_AVX10_1_256_SET | OPTION_MASK_ISA2_AVX10_2_256) +#define OPTION_MASK_ISA2_AVX10_2_512_SET \ + (OPTION_MASK_ISA2_AVX10_1_512_SET | OPTION_MASK_ISA2_AVX10_2_256_SET \ + | OPTION_MASK_ISA2_AVX10_2_512) /* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same as -msse4.2. */ @@ -307,8 +312,12 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA2_EVEX512_UNSET OPTION_MASK_ISA2_EVEX512 #define OPTION_MASK_ISA2_USER_MSR_UNSET OPTION_MASK_ISA2_USER_MSR #define OPTION_MASK_ISA2_AVX10_1_256_UNSET \ - (OPTION_MASK_ISA2_AVX10_1_256 | OPTION_MASK_ISA2_AVX10_1_512_UNSET) -#define OPTION_MASK_ISA2_AVX10_1_512_UNSET OPTION_MASK_ISA2_AVX10_1_512 + (OPTION_MASK_ISA2_AVX10_1_256 | OPTION_MASK_ISA2_AVX10_1_512_UNSET \ + | OPTION_MASK_ISA2_AVX10_2_256_UNSET) +#define OPTION_MASK_ISA2_AVX10_1_512_UNSET \ + (OPTION_MASK_ISA2_AVX10_1_512 | OPTION_MASK_ISA2_AVX10_2_512_UNSET) +#define OPTION_MASK_ISA2_AVX10_2_256_UNSET OPTION_MASK_ISA2_AVX10_2_256 +#define OPTION_MASK_ISA2_AVX10_2_512_UNSET OPTION_MASK_ISA2_AVX10_2_512 /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same as -mno-sse4.1. */ @@ -1370,6 +1379,36 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mavx10_2_256: + if (value) + { + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_2_256_SET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_2_256_SET; + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET; + } + else + { + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX10_2_256_UNSET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_2_256_UNSET; + } + return true; + + case OPT_mavx10_2_512: + if (value) + { + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA2_AVX10_2_512_SET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_2_512_SET; + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX2_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX2_SET; + } + else + { + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA2_AVX10_2_512_UNSET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA2_AVX10_2_512_UNSET; + } + return true; + case OPT_mfma: if (value) { diff --git a/gcc/common/config/i386/i386-cpuinfo.h b/gcc/common/config/i386/i386-cpuinfo.h index ccc6deb..b573166 100644 --- a/gcc/common/config/i386/i386-cpuinfo.h +++ b/gcc/common/config/i386/i386-cpuinfo.h @@ -267,6 +267,8 @@ enum processor_features FEATURE_USER_MSR, FEATURE_AVX10_1_256, FEATURE_AVX10_1_512, + FEATURE_AVX10_2_256, + FEATURE_AVX10_2_512, CPU_FEATURE_MAX }; diff --git a/gcc/common/config/i386/i386-isas.h b/gcc/common/config/i386/i386-isas.h index 2a092f7..a7c7e63 100644 --- a/gcc/common/config/i386/i386-isas.h +++ b/gcc/common/config/i386/i386-isas.h @@ -186,4 +186,7 @@ ISA_NAMES_TABLE_START ISA_NAMES_TABLE_ENTRY("avx10.1", FEATURE_AVX10_1_256, P_NONE, "-mavx10.1") ISA_NAMES_TABLE_ENTRY("avx10.1-256", FEATURE_AVX10_1_256, P_AVX10_1_256, "-mavx10.1-256") ISA_NAMES_TABLE_ENTRY("avx10.1-512", FEATURE_AVX10_1_512, P_AVX10_1_512, "-mavx10.1-512") + ISA_NAMES_TABLE_ENTRY("avx10.2", FEATURE_AVX10_2_256, P_NONE, "-mavx10.2") + ISA_NAMES_TABLE_ENTRY("avx10.2-256", FEATURE_AVX10_2_256, P_NONE, "-mavx10.2-256") + ISA_NAMES_TABLE_ENTRY("avx10.2-512", FEATURE_AVX10_2_512, P_NONE, "-mavx10.2-512") ISA_NAMES_TABLE_END -- cgit v1.1