From 3f97cb0b278d59b8923d0b10edfd60d357dc55a7 Mon Sep 17 00:00:00 2001 From: Alexander Ivchenko Date: Thu, 22 Aug 2013 06:06:03 +0000 Subject: i386-common.c (OPTION_MASK_ISA_AVX512F_SET): New. * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512F_SET): New. (OPTION_MASK_ISA_AVX512CD_SET): Ditto. (OPTION_MASK_ISA_AVX512PF_SET): Ditto. (OPTION_MASK_ISA_AVX512ER_SET): Ditto. (OPTION_MASK_ISA_AVX2_UNSET): Update. (OPTION_MASK_ISA_AVX512F_UNSET): New. (OPTION_MASK_ISA_AVX512CD_UNSET): Ditto. (OPTION_MASK_ISA_AVX512PF_UNSET): Ditto. (OPTION_MASK_ISA_AVX512ER_UNSET): Ditto. (ix86_handle_option): Handle OPT_mavx512f, OPT_mavx512cd, OPT_mavx512pf, OPT_mavx512er cases. * config/i386/constraints.md (v): New constraint. (Yi, Yj): Replace SSE_REGS with ALL_SSE_REGS. * config/i386/cpuid.h (bit_AVX512F, bit_AVX512PF, bit_AVX512ER) (bit_AVX512CD): New. * config/i386/driver-i386.c (host_detect_local_cpu): Detect AVX512F, AVX512ER, AVX512PF, AVX512CD features. * config/i386/i386-c.c (ix86_target_macros_internal): Conditionally define __AVX512F__, __AVX512ER__, __AVX512CD__, __AVX512PF__. * config/i386/i386-modes.def (VECTOR_MODES (INT, 128)) (VECTOR_MODES (FLOAT, 128), INT_MODE (XI, 64)): New modes. * config/i386/i386.c (regclass_map, dbx_register_map) (dbx64_register_map, svr4_dbx_register_map): Add new SSE registers. (gate_insert_vzeroupper): Disable vzeroupper for TARGET_AVX512F. (ix86_target_string): Define -mavx512f, -mavx512er, -mavx512cd, -mavx512pf options. (ix86_option_override_internal): Define PTA_AVX512F, PTA_AVX512ER, PTA_AVX512PF, PTA_AVX512CD. Handle -mavx512f, -mavx512er, -mavx512cd, -mavx512pf options. Fix formatting. (ix86_conditional_register_usage): Squash EXT_REX_SSE_REGs for 32-bit targets. Squash EVEX_SSE_REGS if AVX512F is disabled. (ix86_valid_target_attribute_inner_p): Handle -mavx512f, -mavx512er, -mavx512cd, -mavx512pf options. (standard_sse_constant_opcode): Add vpternlogd for 512-bit modes. (print_reg, ix86_print_operand): Handle 'g' to output 512-bit operands. (ix86_preferred_output_reload_class): Replace SSE_REGS with ALL_SSE_REGS. (ix86_hard_regno_mode_ok): Support 512-bit registers. (ix86_set_reg_reg_cost): Ditto. (x86_order_regs_for_local_alloc): Ditto. (MAX_VECT_LEN): Extend to 64-byte. (ix86_spill_class): Replace SSE_REGS with ALL_SSE_REGS. * config/i386/i386.h (TARGET_AVX512F, TARGET_AVX512PF) (TARGET_AVX512ER, TARGET_AVX512CD): New. (BIGGEST_ALIGNMENT): Extend to 512-bits. (FIRST_PSEUDO_REGISTER, FIXED_REGISTERS): Add new registers. (CALL_USED_REGISTERS, REG_ALLOC_ORDER): Likewise. (VALID_AVX512F_SCALAR_MODE, VALID_AVX512F_REG_MODE): New. (SSE_REG_MODE_P): Support new modes. (FIRST_MMX_REG, FIRST_REX_INT_REG, FIRST_REX_SSE_REG): Add comments. (FIRST_EXT_REX_SSE_REG, LAST_EXT_REX_SSE_REG): New. (reg_class, REG_CLASS_NAMES): Add EVEX_SSE_REGS, ALL_SSE_REGS. (SSE_CLASS_P, MAYBE_SSE_CLASS_P): Replace SSE_REGS with ALL_SSE_REGS. (REG_CLASS_CONTENTS): Add new registers. (SSE_REGNO_P, SSE_REGNO, HARD_REGNO_RENAME_OK): Support new registers. (EXT_REX_SSE_REGNO_P): New. (HI_REGISTER_NAMES): Add new registers. * config/i386/i386.md: Define constants for new registers. (mode): Add new 512-bit modes. (prefix): Support evex prefix. (isa): Support avx512f, noavx512f, fma_avx512f. (ssemodesuffix): Add new 512-bit modes. (movxi): New. (*movxi_internal_avx512f): Ditto. (*movdi_internal): Replace constraint "x" with the new constraint "v". Support MODE_XI. (*movsi_internal): Likewise. (*movdf_internal): Likewise. (*movsf_internal): Likewise. (*fop__comm_sse): Replace constraint "x" with new constraint "v". (3): Likewise. * config/i386/i386.opt (mavx512f, mavx512pf, mavx512er, mavx512cd): New. * config/i386/mmx.md (*mov_internal): Replace constraint "x" with the new constraint "v". * config/i386/sse.md (*mov_internal): Support new registers and modes. (_loadu): Replace constraint "x" with the new constraint "v". (_loaddqu): Likewise. (_storedqu): Likewise. (*3): Likewise. (_vm3): Likewise. (*mul3): Likewise. (_vmmul3): Likewise. (_div3): Likewise. (_vmdiv3): Likewise. (_sqrt2): Likewise. (_vmsqrt2): Likewise. (*3_finite): Likewise. (*3) : Likewise. (_vm3): Likewise. (*3) : Likewise. (*fma_fmadd_): Likewise. (*fma_fmsub_): Likewise. (*fma_fnmadd_): Likewise. (*fma_fnmsub_): Likewise. (*fma_fmaddsub_): Likewise. (*fma_fmsubadd_): Likewise. (*fmai_fmadd_): Likewise. (*fmai_fmsub_): Likewise. (*fmai_fnmadd_): Likewise. (*fmai_fnmsub_): Likewise. (sse_cvtsi2ss): Likewise. (sse_cvtsi2ssq): Likewise. (sse_cvtss2si): Likewise. (sse_cvtss2si_2): Likewise. (sse_cvtss2siq): Likewise. (sse_cvtss2siq_2): Likewise. (sse_cvttss2si): Likewise. (sse_cvtss2siq_2): Likewise. (float2): Likewise. (sse2_cvtsd2si_2): Likewise. (sse2_cvtsd2siq_2): Likewise. (*3): Likewise. (*_3): Likewise. (*_mul3): Likewise. (ashr3): Likewise. (3): Likewise. (avx2_3): Likewise. (*avx2_3): Likewise. (*andnot3): Likewise. (*3) : Likewise. (abs2): Likewise. (avx2_permvar): Likewise. (avx2_perm_1): Likewise. (*avx_vpermilp): Likewise. (avx_vpermilvar3): Likewise. (avx2_ashrv): Likewise. (avx2_v): Likewise. * doc/invoke.texi: Document -mavx512f, -mavx512pf, -mavx512er, -mavx512cd. * doc/rtl.texi: Document XImode. Co-Authored-By: Andrey Turetskiy Co-Authored-By: Anna Tikhonova Co-Authored-By: Ilya Tocar Co-Authored-By: Ilya Verbin Co-Authored-By: Kirill Yukhin Co-Authored-By: Maxim Kuznetsov Co-Authored-By: Michael Zolotukhin Co-Authored-By: Sergey Lega From-SVN: r201915 --- gcc/common/config/i386/i386-common.c | 69 +++++++++++++++++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-) (limited to 'gcc/common') diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index b73e369..8ca74b9 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -57,6 +57,14 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_XSAVE_SET OPTION_MASK_ISA_XSAVE #define OPTION_MASK_ISA_XSAVEOPT_SET \ (OPTION_MASK_ISA_XSAVEOPT | OPTION_MASK_ISA_XSAVE) +#define OPTION_MASK_ISA_AVX512F_SET \ + (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX2_SET) +#define OPTION_MASK_ISA_AVX512CD_SET \ + (OPTION_MASK_ISA_AVX512CD | OPTION_MASK_ISA_AVX512F_SET) +#define OPTION_MASK_ISA_AVX512PF_SET \ + (OPTION_MASK_ISA_AVX512PF | OPTION_MASK_ISA_AVX512F_SET) +#define OPTION_MASK_ISA_AVX512ER_SET \ + (OPTION_MASK_ISA_AVX512ER | OPTION_MASK_ISA_AVX512F_SET) #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW #define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED @@ -128,11 +136,18 @@ along with GCC; see the file COPYING3. If not see | OPTION_MASK_ISA_FMA4_UNSET | OPTION_MASK_ISA_F16C_UNSET \ | OPTION_MASK_ISA_AVX2_UNSET | OPTION_MASK_ISA_XSAVE_UNSET) #define OPTION_MASK_ISA_FMA_UNSET OPTION_MASK_ISA_FMA -#define OPTION_MASK_ISA_AVX2_UNSET OPTION_MASK_ISA_AVX2 #define OPTION_MASK_ISA_FXSR_UNSET OPTION_MASK_ISA_FXSR #define OPTION_MASK_ISA_XSAVE_UNSET \ (OPTION_MASK_ISA_XSAVE | OPTION_MASK_ISA_XSAVEOPT_UNSET) #define OPTION_MASK_ISA_XSAVEOPT_UNSET OPTION_MASK_ISA_XSAVEOPT +#define OPTION_MASK_ISA_AVX2_UNSET \ + (OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX512F_UNSET) +#define OPTION_MASK_ISA_AVX512F_UNSET \ + (OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX512CD_UNSET \ + | OPTION_MASK_ISA_AVX512PF_UNSET | OPTION_MASK_ISA_AVX512ER_UNSET) +#define OPTION_MASK_ISA_AVX512CD_UNSET OPTION_MASK_ISA_AVX512CD +#define OPTION_MASK_ISA_AVX512PF_UNSET OPTION_MASK_ISA_AVX512PF +#define OPTION_MASK_ISA_AVX512ER_UNSET OPTION_MASK_ISA_AVX512ER #define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM #define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW #define OPTION_MASK_ISA_RDSEED_UNSET OPTION_MASK_ISA_RDSEED @@ -313,6 +328,58 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mavx512f: + if (value) + { + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET; + } + else + { + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512F_UNSET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_UNSET; + } + return true; + + case OPT_mavx512cd: + if (value) + { + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512CD_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512CD_SET; + } + else + { + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512CD_UNSET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512CD_UNSET; + } + return true; + + case OPT_mavx512pf: + if (value) + { + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512PF_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512PF_SET; + } + else + { + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512PF_UNSET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512PF_UNSET; + } + return true; + + case OPT_mavx512er: + if (value) + { + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512ER_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512ER_SET; + } + else + { + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_AVX512ER_UNSET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512ER_UNSET; + } + return true; + case OPT_mfma: if (value) { -- cgit v1.1