From 9e11bfef7abb096dc1e06f1d9391fc7aff6a7127 Mon Sep 17 00:00:00 2001 From: Trevor Saunders Date: Thu, 9 Jul 2015 02:51:19 +0000 Subject: always define WORD_REGISTER_OPERATIONS gcc/ChangeLog: 2015-07-08 Trevor Saunders * defaults.h: Provide default for WORD_REGISTER_OPERATIONS. * config/alpha/alpha.h: Define WORD_REGISTER_OPERATIONS to 1. * config/arc/arc.h: Likewise. * config/arm/arm.h: Likewise. * config/bfin/bfin.h: Likewise. * config/epiphany/epiphany.h: Likewise. * config/frv/frv.h: Likewise. * config/ia64/ia64.h: Likewise. * config/iq2000/iq2000.h: Likewise. * config/lm32/lm32.h: Likewise. * config/m32r/m32r.h: Likewise. * config/mcore/mcore.h: Likewise. * config/mep/mep.h: Likewise. * config/microblaze/microblaze.h: Likewise. * config/mips/mips.h: Likewise. * config/mmix/mmix.h: Likewise. * config/mn10300/mn10300.h: Likewise. * config/nds32/nds32.h: Likewise. * config/nios2/nios2.h: Likewise. * config/pa/pa.h: Likewise. * config/rl78/rl78.h: Likewise. * config/sh/sh.h: Likewise. * config/sparc/sparc.h: Likewise. * config/stormy16/stormy16.h: Likewise. * config/tilegx/tilegx.h: Likewise. * config/tilepro/tilepro.h: Likewise. * config/v850/v850.h: Likewise. * config/xtensa/xtensa.h: Likewise. * doc/tm.texi: Regenerate. * doc/tm.texi.in: Adjust. * combine.c (simplify_set): Likewise. (simplify_comparison): Likewise. * expr.c (store_constructor): Likewise. * internal-fn.c (expand_arith_overflow): Likewise. * reload.c (push_reload): Likewise. (find_reloads): Likewise. (find_reloads_subreg_address): Likewise. * reload1.c (eliminate_regs_1): Likewise. * rtlanal.c (nonzero_bits1): Likewise. (num_sign_bit_copies1): Likewise. * simplify-rtx.c (simplify_truncation): Likewise. From-SVN: r225597 --- gcc/combine.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) (limited to 'gcc/combine.c') diff --git a/gcc/combine.c b/gcc/combine.c index d68515c..e4e1d3a 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -6716,10 +6716,9 @@ simplify_set (rtx x) / UNITS_PER_WORD) == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)) -#ifndef WORD_REGISTER_OPERATIONS - && (GET_MODE_SIZE (GET_MODE (src)) - < GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))) -#endif + && (WORD_REGISTER_OPERATIONS + || (GET_MODE_SIZE (GET_MODE (src)) + < GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) #ifdef CANNOT_CHANGE_MODE_CLASS && ! (REG_P (dest) && REGNO (dest) < FIRST_PSEUDO_REGISTER && REG_CANNOT_CHANGE_MODE_P (REGNO (dest), @@ -11424,7 +11423,7 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) /* Try a few ways of applying the same transformation to both operands. */ while (1) { -#ifndef WORD_REGISTER_OPERATIONS +#if !WORD_REGISTER_OPERATIONS /* The test below this one won't handle SIGN_EXTENDs on these machines, so check specially. */ if (code != GTU && code != GEU && code != LTU && code != LEU @@ -12078,11 +12077,9 @@ simplify_comparison (enum rtx_code code, rtx *pop0, rtx *pop1) However, if we commute the AND inside the SUBREG then they no longer have defined values and the meaning of the code has been changed. */ - && (0 -#ifdef WORD_REGISTER_OPERATIONS - || (mode_width > GET_MODE_PRECISION (tmode) - && mode_width <= BITS_PER_WORD) -#endif + && ((WORD_REGISTER_OPERATIONS + && mode_width > GET_MODE_PRECISION (tmode) + && mode_width <= BITS_PER_WORD) || (mode_width <= GET_MODE_PRECISION (tmode) && subreg_lowpart_p (XEXP (op0, 0)))) && CONST_INT_P (XEXP (op0, 1)) -- cgit v1.1