From 3576f984e8e8cc65385cffcba23f403632aa88c8 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 22 Sep 2011 12:26:41 +0000 Subject: re PR middle-end/50113 (soft-float MIPS64 compiler is miscompiling ggc-page.c) gcc/ PR middle-end/50113 PR middle-end/50061 * calls.c (emit_library_call_value_1): Use BLOCK_REG_PADDING to get the locate.where_pad value for register-only arguments. * config/arm/arm.c (arm_pad_arg_upward): Remove HFmode handling. (arm_pad_reg_upward): Handle null types. From-SVN: r179085 --- gcc/calls.c | 31 ++++++++++++++++++++----------- 1 file changed, 20 insertions(+), 11 deletions(-) (limited to 'gcc/calls.c') diff --git a/gcc/calls.c b/gcc/calls.c index 1413c8d..3fa70b5 100644 --- a/gcc/calls.c +++ b/gcc/calls.c @@ -3577,20 +3577,29 @@ emit_library_call_value_1 (int retval, rtx orgfun, rtx value, argvec[count].partial = targetm.calls.arg_partial_bytes (args_so_far, mode, NULL_TREE, 1); - locate_and_pad_parm (mode, NULL_TREE, + if (argvec[count].reg == 0 + || argvec[count].partial != 0 + || reg_parm_stack_space > 0) + { + locate_and_pad_parm (mode, NULL_TREE, #ifdef STACK_PARMS_IN_REG_PARM_AREA - 1, + 1, #else - argvec[count].reg != 0, + argvec[count].reg != 0, +#endif + argvec[count].partial, + NULL_TREE, &args_size, &argvec[count].locate); + args_size.constant += argvec[count].locate.size.constant; + gcc_assert (!argvec[count].locate.size.var); + } +#ifdef BLOCK_REG_PADDING + else + /* The argument is passed entirely in registers. See at which + end it should be padded. */ + argvec[count].locate.where_pad = + BLOCK_REG_PADDING (mode, NULL_TREE, + GET_MODE_SIZE (mode) <= UNITS_PER_WORD); #endif - argvec[count].partial, - NULL_TREE, &args_size, &argvec[count].locate); - - gcc_assert (!argvec[count].locate.size.var); - - if (argvec[count].reg == 0 || argvec[count].partial != 0 - || reg_parm_stack_space > 0) - args_size.constant += argvec[count].locate.size.constant; targetm.calls.function_arg_advance (args_so_far, mode, (tree) 0, true); } -- cgit v1.1