From f9982ef4f55bd3a63745e03ac6d68b4a92fa8bce Mon Sep 17 00:00:00 2001
From: Jakub Jelinek <jakub@redhat.com>
Date: Thu, 23 Nov 2023 12:59:54 +0100
Subject: expr: Fix &bitint_var handling in initializers [PR112336]

As the following testcase shows, we ICE when trying to emit ADDR_EXPR of
a bitint variable which doesn't have mode width.
The problem is in the EXTEND_BITINT stuff which makes sure we treat the
padding bits on memory reads from user bitint vars as undefined.
When expanding ADDR_EXPR on such vars inside outside of initializers,
expand_expr_addr* uses EXPAND_CONST_ADDRESS modifier and EXTEND_BITINT
does nothing, but in initializers it keeps using EXPAND_INITIALIZER
modifier.  So, we need to treat EXPAND_INITIALIZER the same as
EXPAND_CONST_ADDRESS for this regard.

2023-11-23  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/112336
	* expr.cc (EXTEND_BITINT): Don't call reduce_to_bit_field_precision
	if modifier is EXPAND_INITIALIZER.

	* gcc.dg/bitint-41.c: New test.
---
 gcc/expr.cc                      |  1 +
 gcc/testsuite/gcc.dg/bitint-41.c | 36 ++++++++++++++++++++++++++++++++++++
 2 files changed, 37 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/bitint-41.c

diff --git a/gcc/expr.cc b/gcc/expr.cc
index 556bcf7..d932067 100644
--- a/gcc/expr.cc
+++ b/gcc/expr.cc
@@ -10698,6 +10698,7 @@ expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
     && mode != BLKmode							\
     && modifier != EXPAND_MEMORY					\
     && modifier != EXPAND_WRITE						\
+    && modifier != EXPAND_INITIALIZER					\
     && modifier != EXPAND_CONST_ADDRESS)				\
    ? reduce_to_bit_field_precision ((expr), NULL_RTX, type) : (expr))
 
diff --git a/gcc/testsuite/gcc.dg/bitint-41.c b/gcc/testsuite/gcc.dg/bitint-41.c
new file mode 100644
index 0000000..d87ea08
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/bitint-41.c
@@ -0,0 +1,36 @@
+/* PR middle-end/112336 */
+/* { dg-do compile { target bitint } } */
+/* { dg-options "-std=c2x" } */
+
+unsigned _BitInt(1) v1;
+unsigned _BitInt(1) *p1 = &v1;
+signed _BitInt(2) v2;
+signed _BitInt(2) *p2 = &v2;
+unsigned _BitInt(11) v11;
+unsigned _BitInt(11) *p11 = &v11;
+signed _BitInt(12) v12;
+signed _BitInt(12) *p12 = &v12;
+unsigned _BitInt(21) v21;
+unsigned _BitInt(21) *p21 = &v21;
+signed _BitInt(22) v22;
+signed _BitInt(22) *p22 = &v22;
+unsigned _BitInt(31) v31;
+unsigned _BitInt(31) *p31 = &v31;
+signed _BitInt(32) v32;
+signed _BitInt(32) *p32 = &v32;
+unsigned _BitInt(41) v41;
+unsigned _BitInt(41) *p41 = &v41;
+signed _BitInt(42) v42;
+signed _BitInt(42) *p42 = &v42;
+#if __BITINT_MAXWIDTH__ >= 128
+unsigned _BitInt(127) v127;
+unsigned _BitInt(127) *p127 = &v127;
+signed _BitInt(128) v128;
+signed _BitInt(128) *p128 = &v128;
+#endif
+#if __BITINT_MAXWIDTH__ >= 258
+unsigned _BitInt(257) v257;
+unsigned _BitInt(257) *p257 = &v257;
+signed _BitInt(258) v258;
+signed _BitInt(258) *p258 = &v258;
+#endif
-- 
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