From f75ce96a7c4673b18100bbd9d0f6b8c382901b68 Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Wed, 16 Jun 2004 15:47:29 +0000 Subject: re PR target/15653 (Gcc 3.4 ICE on valid code) 2004-06-16 Vladimir Makarov PR target/15653 * config/ia64/ia64.c (ia64_dfa_new_cycle): Do not insert nops after shifts before asm. From-SVN: r83243 --- gcc/ChangeLog | 6 ++++++ gcc/config/ia64/ia64.c | 4 +++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f74b850d..0f7fd19 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2004-06-16 Vladimir Makarov + + PR target/15653 + * config/ia64/ia64.c (ia64_dfa_new_cycle): Do not insert nops + after shifts before asm. + 2004-06-16 Zdenek Dvorak PR tree-optimization/15993 diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index c29fee4..48866ae 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -6339,7 +6339,9 @@ ia64_dfa_new_cycle (FILE *dump, int verbose, rtx insn, int last_clock, } else if (reload_completed) setup_clocks_p = TRUE; - if (setup_clocks_p && ia64_tune == PROCESSOR_ITANIUM) + if (setup_clocks_p && ia64_tune == PROCESSOR_ITANIUM + && GET_CODE (PATTERN (insn)) != ASM_INPUT + && asm_noperands (PATTERN (insn)) == 0) { enum attr_itanium_class c = ia64_safe_itanium_class (insn); -- cgit v1.1